8t( H<$PHYTEC phyCORE-STM32MP1-3 Dev BoardG!phytec,phycore-stm32mp1-3phytec,phycore-stm32mp157c-somst,stm32mp157cpuscpu@0!arm,cortex-a7,&6Hrxtx disabledaudio-controller@4000c000!st,stm32h7-i2sH@ T3 C=>Hrxtx disabledaudio-controller@4000d000!st,stm32h7-spdifrxH@07kclk Ta C]^ Hrxrx-ctrl disabledserial@4000e000!st,stm32h7-uartH@ ]0q C+,Hrxtx disabledserial@4000f000!st,stm32h7-uartH@ ]0q C-.Hrxtxokaydefaultsleepidle   serial@40010000!st,stm32h7-uartH@ ]0qokaydefaultsleepidle   serial@40011000!st,stm32h7-uartH@ ]0q CABHrxtx disabledi2c@40012000!st,stm32mp15-i2cH@   eventerrorT 0L qokaydefaultsleepdcodec@18!ti,tlv320aic3007H,8ER0portendpoint@0H^n{Lendpoint@1H^n{Ltouch@44 !st,stmpe811HDTrtouchscreen !st,stmpe-ts leds@62 !nxp,pca9533Hbled-0powerCled-1powerCled-2 heartbeatC %heartbeati2c@40013000!st,stm32mp15-i2cH@0  eventerrorT!"0L q disabledi2c@40014000!st,stm32mp15-i2cH@@  eventerrorTHI0L q disabledi2c@40015000!st,stm32mp15-i2cH@P  eventerrorTkl0L q disabledcec@40016000 !st,stm32-cecH@` T^0 7cechdmi-cec disableddac@40017000!st,stm32h7-dac-coreH@p07pclk disableddac@1 !st,stm32-dac;H disableddac@2 !st,stm32-dac;H disabledserial@40018000!st,stm32h7-uartH@ ] 0q COPHrxtx disabledserial@40019000!st,stm32h7-uartH@ ]!0q CQRHrxtx disabledtimer@44000000!st,stm32-timersHD0T brkuptrg-comcc07intpC   Hch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmR disabledtimer@0!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@44001000!st,stm32-timersHD0T+,-. brkuptrg-comcc07intpC/012345Hch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmR disabledtimer@7!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledserial@44003000!st,stm32h7-uartHD0 ]0q CGHHrxtx disabledspi@44004000!st,stm32h7-spiHD@ T#0LH C%&Hrxtxokaydefaultsleep Maudio-controller@44004000!st,stm32h7-i2sHD@ T# C%&Hrxtx disabledspi@44005000!st,stm32h7-spiHDP TT0LI CSTHrxtx disabledtimer@44006000!st,stm32-timersHD` Tt global07int@CijklHch1uptrigcom disabledpwm !st,stm32-pwmR disabledtimer@14!st,stm32h7-timer-triggerH disabledtimer@44007000!st,stm32-timersHDp Tu global07int CmnHch1up disabledpwm !st,stm32-pwmR disabledtimer@15!st,stm32h7-timer-triggerH disabledtimer@44008000!st,stm32-timersHD Tv global07int CopHch1up disabledpwm !st,stm32-pwmR disabledtimer@16!st,stm32h7-timer-triggerH disabledspi@44009000!st,stm32h7-spiHD TU0LJ CUVHrxtx disabledsai@4400a000!st,stm32h7-sai DHDD TWLP disabledaudio-controller@4400a004!st,stm32-sai-sub-aH 07sai_ckCW disabledaudio-controller@4400a024!st,stm32-sai-sub-bH$ 07sai_ckCX disabledsai@4400b000!st,stm32h7-sai DHDD T[LQokay0*7pclkx8kx11kdefaultsleepaudio-controller@4400b004!st,stm32-sai-sub-aH  0 7sai_ckMCLKCY disabledHrxVportL[endpoint^^fwLaudio-controller@4400b024!st,stm32-sai-sub-bH$ 07sai_ckCZ disabledHtxLportLZendpoint^^fwLsai@4400c000!st,stm32h7-sai DHDD TrLR disabledaudio-controller@4400c004!st,stm32-sai-sub-aH 07sai_ckCq disabledaudio-controller@4400c024!st,stm32-sai-sub-bH$ 07sai_ckCr disableddfsdm@4400d000!st,stm32mp1-dfsdmHD07dfsdm disabledfilter@0!st,stm32-dfsdm-adc;H TnCeHrx disabledfilter@1!st,stm32-dfsdm-adc;H ToCfHrx disabledfilter@2!st,stm32-dfsdm-adc;H TpCgHrx disabledfilter@3!st,stm32-dfsdm-adc;H TqChHrx disabledfilter@4!st,stm32-dfsdm-adc;H TsC[Hrx disabledfilter@5!st,stm32-dfsdm-adc;H T~C\Hrx disableddma-controller@48000000 !st,stm32-dmaHH`T   /0GLL dma-controller@48001000 !st,stm32-dmaHH`T89:;<DEF0HLL!dma-router@48002000!st,stm32h7-dmamuxHH @ !0ILLadc@48003000!st,stm32mp1-adc-coreHH0TZ0J7busadc disabledL"adc@0!st,stm32mp1-adc;Hr"TC Hrx disabledadc@100!st,stm32mp1-adc;Hr"TC Hrx#vrefint disabledchannel@13H vrefintchannel@14Hvddcoremmc@48004000(!st,stm32-sdmmc2arm,pl18xarm,primecell%1HH@ T0x 7apb_pclkL#' disabledusb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI 0$ 7otgutmiL1dwc2 Tb=L  ^motgu}%okay& usb2-phymailbox@4c001000!st,stm32mp1-ipccHL]=e rxtx0SqokayLYdcmi@4c006000!st,stm32-dcmiHL` TNM0M7mclkCKHtx disabledrcc@50000000!st,stm32mp1-rccsysconHPLpwr@50001000!st,stm32mp1,pwr-regHP'(reg11reg11L>reg18reg18w@w@L?usb33usb332Z2ZL%pwr_mcu@50001014!st,stm32mp151-pwr-mcusysconHPLQinterrupt-controller@5000d000!st,stm32mp1-extisysconHPLsyscon@50020000!st,stm32mp157-syscfgsysconHP03Ltimer@50021000!st,stm32-lptimerHP ]007muxq disabledpwm!st,stm32-pwm-lpR disabledtrigger@1!st,stm32-lptimer-triggerH disabledcounter!st,stm32-lptimer-counter disabledtimer@50022000!st,stm32-lptimerHP  ]207muxq disabledpwm!st,stm32-pwm-lpR disabledtrigger@2!st,stm32-lptimer-triggerH disabledtimer@50023000!st,stm32-lptimerHP0 ]407muxq disabledpwm!st,stm32-pwm-lpR disabledtimer@50024000!st,stm32-lptimerHP@ ]507muxq disabledpwm!st,stm32-pwm-lpR disabledvrefbuf@50025000!st,stm32-vrefbufHPP`&%04 disabledsai@50027000!st,stm32h7-sai PpHPpPs TL disabledaudio-controller@50027004!st,stm32-sai-sub-aH 07sai_ckCc disabledaudio-controller@50027024!st,stm32-sai-sub-bH$ 07sai_ckCd disabledthermal@50028000!st,stm32-thermalHP T057pclkokayLhash@54002000!st,stm32f756-hashHT  TP0a C) Hin3 disabledrng@54003000 !st,stm32-rngHT00| okaydma-controller@58000000!st,stm32h7-mdmaHX Tz0d  0L)memory-controller@58002000!st,stm32mp1-fmc2-ebiHX 0y  disabledP`dhlnand-controller@4,0!st,stm32mp1-fmc2-nfcHH   T0HC) ) )  Htxrxecc disabledspi@58003000!st,stm32f469-qspiHX0p @qspiqspi_mm T\0C))Htxrx0z okaydefaultsleep*+,-flash@0!winbond,w25q128jedec,spi-norHJ[mmmc@58005000(!st,stm32-sdmmc2arm,pl18xarm,primecell%1HXP T10v 7apb_pclk #'okaydefaultopendrainsleep./0 |1Qmmc@58007000(!st,stm32-sdmmc2arm,pl18xarm,primecell%1HXp T|0w 7apb_pclk #'okaydefaultopendrainsleep234356Qcrc@58009000!st,stm32f7-crcHX0n disabledethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX  @stmmaceth]= macirq67stmmacethmac-clk-txmac-clk-rxeth-ckptp_refethstp00igh{p7-okay89defaultsleep 6rgmii-id?I:Tstmmac-axi-configcsL7mdio!snps,dwmac-mdioethernet-phy@1!ethernet-phy-ieee802.3-c22Hr;T L:usb@5800c000 !generic-ohciHX 0$o  TJokay<usbL=usb@5800d000 !generic-ehciHX 0$o  TK=okay<usbdisplay-controller@5a001000!st,stm32-ltdcHZTXY07lcd  disabledwatchdog@5a002000!st,stm32mp1-iwdgHZ 0: 7pclklsiokay usbphyc@5a006000!st,stm32mp1-usbphycHZ`0 >*?okayL$usb-phy@09HD(L<usb-phy@19HD(L&serial@5c000000!st,stm32h7-uartH\ ]0qokaydefaultsleepidle@ABCDEOspi@5c001000!st,stm32h7-spiH\ TV0 @0C)")#Hrxtx disabledi2c@5c002000!st,stm32mp15-i2cH\   eventerrorT_`0 B qokaydefaultsleepFGpmic@33 !st,stpmic1H3 ]Hregulators!st,stpmic1-regulators_IlIyIIJIIKKbuck1vddcoreOpbuck2vdd_ddrppLJbuck3vdd2Z2Z1L'buck4v3v32Z2ZLldo1 v1v8_audiow@w@TLldo2 dd_eth_2v5&%&%Tldo3vtt_ddr  q?ldo4vdd_usbTL(ldo5vdda,@ ,@ Taldo6 vdd_eth_1v0B@B@Tvref_ddr vref_ddrboostbst_outTLKpwr_sw1 vbus_otgT spwr_sw2vbus_swT sonkey!st,stpmic1-onkeyT onkey-fallingonkey-rising watchdog!st,stpmic1-wdteeprom@50!microchip,24c32atmel,24c32HPokayrtc@52!microcrystal,rv3028HRokayrtc@5c004000!st,stm32mp1-rtcH\@0A 7pclkrtc_ck ]okayefuse@5c005000!st,stm32mp15-bsecH\Ppart-number-otp@4Hvrefin-cal@52HRL#calib@5cH\calib@5eH^i2c@5c009000!st,stm32mp15-i2cH\  eventerrorT0 C  q disabledtamp@5c00a000 !st,stm32-tampsysconsimple-mfdH\LRpinctrl@50002000!st,stm32mp157-pinctrl P r `LLgpio@50002000H0TGPIOAokayLLHgpio@50003000H0UGPIOBokayLgpio@50004000H 0VGPIOCokayL gpio@50005000H00WGPIODokayL0gpio@50006000H@0XGPIOEokayL@gpio@50007000HP0YGPIOFokayLPL1gpio@50008000H`0ZGPIOGokayL`L;gpio@50009000Hp0[GPIOHokayLpgpio@5000a000H0\GPIOIokay L Lgpio@5000b000H0]GPIOJ disabledgpio@5000c000H0^GPIOK disabledadc1-ain-0pins[ #adc1-in6-0pins\adc12-ain-0pins#\]^adc12-ain-1pins\]adc12-usb-cc-pins-0pinscec-0pins cec-sleep-0pinscec-1pins cec-sleep-1pinsdac-ch1-0pinsdac-ch2-0pinsdcmi-0pins<xyz{|~Fwdcmi-sleep-0pins<xyz{|~Fwdcmi-1pins,&z{AK3Mdcmi-sleep-1pins,&z{AK3Mdcmi-2pins4 z@A~Fw dcmi-sleep-2pins4 z@A~Fwrgmii-0pins1 e d m n " B  !  $ pins2  $ pins3$ %     rgmii-sleep-0pins1<edmn"B!$%rgmii-1pins1 e d m n " B  !  $ pins2  $ pins3$ % v w   rgmii-sleep-1pins1<edmn"B!$%vwrgmii-2pins1 e d  n " B k !  $ pins2  $ pins3$ % v    rgmii-sleep-2pins1<edn"Bk!$%vrgmii-3L8pins1e m n " B  !  $ pins2  $ pins3$ % v    rgmii-sleep-3L9pins1<edmn"B!$%vrgmii-4pins1d m n " B   $ pins2$ % v w   rgmii-sleep-4pins10dmn"B$%vwrmii-0pins1m n   !  $ pins2 $ %  rmii-sleep-0pins1$mn!$%rmii-1pins1! m n  $ pins2  $ pins3  $ % pins4 rmii-sleep-1pins1$!$%mnrmii-2pins1m n    !  $ pins2 $ %  rmii-sleep-2pins1$mn!$%fmc-0pins144 5 ; < > ? 0 1 G H I J i  $ pins26  fmc-sleep-0pins845;<>?01GHIJ6ifmc-1pinsT4 5  > ? 0 1 G H I J K L M N O 8 9 : i l  $ fmc-sleep-1pinsT45>?01GHIJKLMNO89:ili2c1-0pins<_ i2c1-sleep-0pins<_i2c1-1Lpins^_ i2c1-sleep-1Lpins^_i2c2-0pinstu i2c2-sleep-0pinstui2c2-1pinsu i2c2-sleep-1pinsui2c2-2pinsQu i2c2-sleep-2pinsQui2c5-0pins   i2c5-sleep-0pins  i2c5-1pins01 i2c5-sleep-1pins01i2s2-0pins    $i2s2-sleep-0pins  ltdc-0pinspgZrsxyz |OEF}~9lj:8 $ ltdc-sleep-0pinspgZrsxyz |OEF}~9lj:8ltdc-1pinsp $ ltdc-sleep-1pinspltdc-2pins1T  36:KLMOt xyz} $ pins2N $ ltdc-sleep-2pins1X 36:KLMOtxyz}Nltdc-3pins1g $ pins2lMmsxy{|OE}Kt h9lj:L $ ltdc-sleep-3pinspgMmsxy{|OE}Kth9lj:Lmco1-0pins  $ mco1-sleep-0pins mco2-0pinsb $ mco2-sleep-0pinsbm-can1-0pins1}   $pins2 m_can1-sleep-0pins}m-can1-1pins1   $pins2 m_can1-sleep-1pins  m-can1-2pins1}   $pins2~ m_can1-sleep-2pins}~m-can2-0LNpins1   $pins2 m_can2-sleep-0LOpinspwm1-0pins IKN 4 $ pwm1-sleep-0pins IKNpwm1-1pinsI 4 $ pwm1-sleep-1pinsIpwm1-2pinsK $ pwm1-sleep-2pinsKpwm2-0pins 4 $ pwm2-sleep-0pinspwm3-0pins' 4 $ pwm3-sleep-0pins'pwm3-1pins $ pwm3-sleep-1pinspwm4-0pins>? 4 $ pwm4-sleep-0pins>?pwm4-1pins= 4 $ pwm4-sleep-1pins=pwm5-0pins{ 4 $ pwm5-sleep-0pins{pwm5-1pins {| $ pwm5-sleep-1pins {|pwm8-0pins 4 $ pwm8-sleep-0pinspwm8-1pins) $ pwm8-sleep-1pins)pwm12-0pinsv 4 $ pwm12-sleep-0pinsvqspi-clk-0L*pinsZ  $ qspi-clk-sleep-0L,pinsZqspi-bk1-0L+pinsX Y W V  $ qspi-bk1-sleep-0L-pinsXYWVqspi-bk2-0pinsr s j g  $ qspi-bk2-sleep-0pinsrsjgqspi-cs1-0pins   $ qspi-cs1-sleep-0pinsqspi-cs2-0pins   $ qspi-cs2-sleep-0pins sai2a-0pins @   $sai2a-sleep-0pins@sai2a-1Lpins1  =   $sai2a-sleep-1Lpins =sai2a-2pins = ; <   $sai2a-sleep-2pins =;<sai2b-0pins1 L M N   $pins2[ sai2b-sleep-0pins[LMNsai2b-1pins[ sai2b-sleep-1pins[sai2b-2pins1[ sai2b-sleep-2pins[sai2b-3Lpins1 r s   $pins2[ sai2b-sleep-3Lpins1r s[sai4a-0pins   $sai4a-sleep-0pinssdmmc1-b4-0pins1( ) * + 2   $pins2,   $sdmmc1-b4-od-0pins1( ) * +   $pins2,   $pins32  sdmmc1-b4-init-0pins1( ) * +   $sdmmc1-b4-sleep-0pins()*+,2sdmmc1-b4-1L.pins1( ) F + 2   $pins2,   $sdmmc1-b4-od-1L/pins1( ) F +   $pins2,   $pins32  sdmmc1-b4-sleep-1L0pins()F+,2sdmmc1-dir-0pins1 R '    $ pins2D  sdmmc1-dir-init-0pins1 R '    $ sdmmc1-dir-sleep-0pinsR'Dsdmmc1-dir-1pins1 R N    $ pins2D  sdmmc1-dir-sleep-1pinsRNDsdmmc2-b4-0L2pins1    f   $ pins2C   $ sdmmc2-b4-od-0L4pins1      $ pins2C   $ pins3f   sdmmc2-b4-sleep-0L5pinsCfsdmmc2-b4-1pins1    f   $pins2C   $sdmmc2-b4-od-1pins1      $pins2C   $pins3f  sdmmc2-d47-0pins E 3   $ sdmmc2-d47-sleep-0pins E3sdmmc2-d47-1pins & '   $sdmmc2-d47-sleep-1pins &'sdmmc2-d47-2pins  & '   $ sdmmc2-d47-sleep-2pins&'sdmmc2-d47-3pins E ' sdmmc2-d47-sleep-3pins E'sdmmc2-d47-4L3pins & 3   $ sdmmc2-d47-sleep-4L6pins &3sdmmc3-b4-0pins1P T U 7 Q   $ pins2o   $ sdmmc3-b4-od-0pins1P T U 7   $ pins2o   $ pins3Q   sdmmc3-b4-sleep-0pinsPTU7oQsdmmc3-b4-1pins1P T 5 7 0   $ pins2o   $ sdmmc3-b4-od-1pins1P T 5 7   $ pins2o   $ pins30   sdmmc3-b4-sleep-1pinsPT57o0spdifrx-0pinsl spdifrx-sleep-0pinslspi1-1pins1 $ pins2spi2-0pins1 $ pins2spi2-1pins1 $ pins2spi2-2pins1 $pins2 4spi4-0pinsLF $ pins2Mspi5-0pins1WY $ pins2Xstusb1600-0pins uart4-0L pins1k $ pins2 uart4-idle-0Lpins1kpins2 uart4-sleep-0L pinskuart4-1pins11  $ pins2 uart4-2pins1k $ pins2 uart4-3pins1  $ pins2 uart4-idle-3pins1 pins2 uart4-sleep-3pins uart5-0pins1 $ pins2 uart7-0pins1H $ pins2 GJIuart7-1pins1W $ pins2Vuart7-2pins1H $ pins2G uart7-idle-2pins1Hpins2G uart7-sleep-2pinsHGuart8-0pins1A  $ pins2@ uart8rtscts-0pinsg j usart1-0LApins1  $ pins2 usart1-idle-0LEpins1  usart1-sleep-0LCpins  usart2-0pins1U4 $ pins263usart2-sleep-0pinsU463usart2-1pins1U $ pins2TOusart2-sleep-1pinsUTOusart2-2pins154 $ pins263usart2-idle-2pins153pins24 $ pins36usart2-sleep-2pins5463usart3-0L pins1 $ pins2 usart3-idle-0L pins1pins2 usart3-sleep-0L pinsusart3-1pins1h  $ pins2  usart3-idle-1pins1pins2h  $ pins3  usart3-sleep-1pinshusart3-2pins1h  $ pins2  usart3-idle-2pins1pins2h  $ pins3  usart3-sleep-2pinshusart3-3pins1h  $ pins29;usart3-idle-3pins1 h;pins29usart3-sleep-3pinsh;9usart3-4pins1h  $ pins2; usart3-idle-4pins1;pins2h  $ pins3 usart3-sleep-4pinsh;usart3-5pins1< $ pins2 ;usbotg-hs-0pins usbotg-fs-dp-dm-0pins  pinctrl@54004000!st,stm32mp157-z-pinctrl T@r `LMgpio@54004000H0_GPIOZ C okayMLi2c2-0pins i2c2-sleep-0pinsi2c4-0LFpins i2c4-sleep-0LGpinsi2c6-0pins i2c6-sleep-0pinsspi1-0Lpins1 $ pins2spi1-sleep-0Lpins usart1-1L@pins1 $ pins2usart1-idle-1LDpins1pins2usart1-sleep-1LBpinscan@4400e000 !bosch,m_canHDD@m_canmessage_ramT  int0int10 7hclkcclk R  disabledcan@4400f000 !bosch,m_canHDD(@m_canmessage_ramT  int0int10 7hclkcclk R okaydefaultsleepNOgpu@59000000 !vivante,gcHY Tm0e~ 7buscore okaydsi@5a000000 !st,stm32-dsiHZ0P7pclkrefpx_clk a? 1apb disabledportsport@0Hendpointport@1Hendpointcryp@54001000!st,stm32mp1-crypHT TO0` okayahb!st,mlahbsimple-bus$ p800m4@10000000!st,stm32mp1-m4H08 !1mcu_rst {  Q RD RHokay STUVWX YYYY vq0vq1shutdowndetachrTDaliases /soc/ethernet@5800a000 /soc/i2c@5c002000/rtc@52 /soc/rtc@5c004000 /soc/mmc@58005000 /soc/mmc@58007000 /soc/mmc@48004000 /soc/serial@40010000 /soc/serial@4000f000 /soc/serial@5c000000chosen serial0:115200n8gpio-keys !gpio-keyskey-homeHome PH  )fkey-enterEnter PH )reserved-memoryretram@38000000!shared-dma-poolH8 4LSmcuram@30000000!shared-dma-poolH0 4LTmcuram2@10000000!shared-dma-poolH 4LUvdev0vring0@10040000!shared-dma-poolH 4LVvdev0vring1@10041000!shared-dma-poolH 4LWvdev0buffer@10042000!shared-dma-poolH @ 4LXsound!audio-graph-cardSTM32MP1-PHYCORE ;PlaybackMCLKCaptureMCLK CZ[regulator!regulator-fixedvinLK@LK@LI #address-cells#size-cellsmodelcompatibleclock-frequencydevice_typeregphandleinterruptsinterrupt-affinityinterrupt-parentmethod#interrupt-cellsinterrupt-controller#clock-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisst,syscfgstatusrangesinterrupt-namesclocksclock-namesdmasdma-names#pwm-cellsinterrupts-extendedwakeup-sourceresets#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pinctrl-2pinctrl-3st,syscfg-fmpi2c-analog-filteri2c-scl-rising-time-nsi2c-scl-falling-time-nsai3x-micbias-vgAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyremote-endpointframe-masterbitclock-mastervio-supplyvcc-supplyst,sample-timest,mod-12bst,ref-selst,adc-freqst,ave-ctrlst,touch-det-delayst,settlingst,fraction-zst,i-drivecolorfunctionlinux,default-trigger#io-channel-cellscs-gpiosst,syncmclk-fsdai-tdm-slot-numdai-tdm-slot-width#dma-cellsst,mem2memdma-requestsdma-mastersdma-channelsnvmem-cellsnvmem-cell-nameslabelarm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencyreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeotg-revusb33d-supplyphysphy-names#mbox-cellsst,proc-id#reset-cellsvdd-supplyvdd_3v3_usbfs-supplyregulator-nameregulator-min-microvoltregulator-max-microvolt#thermal-sensor-cellsdma-maxburstreg-namesspi-rx-bus-widthspi-max-frequencym25p,fast-readcd-gpiosdisable-wpst,neg-edgevmmc-supplynon-removableno-sdno-sdiovqmmc-supplymmc-ddr-3_3vst,sysconsnps,mixed-burstsnps,pblsnps,en-tx-lpi-clockgatingsnps,axi-configsnps,tsophy-modemax-speedphy-handlest,eth-clk-selsnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenti,rx-internal-delayti,tx-internal-delayti,fifo-depthti,min-output-impedanceenet-phy-lane-no-swapti,clk-output-selcompaniontimeout-secvdda1v1-supplyvdda1v8-supply#phy-cellsphy-supplyuart-has-rtsctsbuck1-supplybuck2-supplybuck3-supplybuck4-supplyldo1-supplyldo2-supplyldo3-supplyldo4-supplyldo5-supplyldo6-supplyboost-supplypwr_sw1-supplypwr_sw2-supplyregulator-always-onregulator-initial-modest,mask-resetregulator-over-current-protectionregulator-boot-onregulator-active-dischargepower-off-time-secst,packagegpio-controller#gpio-cellsst,bank-namengpiosgpio-rangespinmuxbias-disabledrive-open-drainslew-ratebias-pull-updrive-push-pullbias-pull-downst,bank-ioportbosch,mram-cfgphy-dsi-supplydma-rangesst,syscfg-holdbootst,syscfg-pddsst,syscfg-rsc-tblst,syscfg-m4-statememory-regionmboxesmbox-namesethernet0rtc0rtc1mmc0mmc1mmc2serial0serial1serial2stdout-pathlinux,codeno-maproutingdais