e8_(1_h,mecer,xms6rockchip,rk32297Mecer Xtreme Mini S6aliases=/serial@11010000E/serial@11020000M/serial@11030000U/spi@11090000Z/mmc@30000000_/mmc@30010000d/mmc@30020000cpuscpu@f00icpu,arm,cortex-a7uy@pscicpu@f01icpu,arm,cortex-a7uypscicpu@f02icpu,arm,cortex-a7uypscicpu@f03icpu,arm,cortex-a7uypsciopp-table-0,operating-points-v2opp-408000000Q~@ opp-600000000#Fopp-8160000000,B@opp-1008000000<opp-1200000000Gtxopp-1296000000M?d7opp-1392000000R<opp-1464000000WB\arm-pmu,arm,cortex-a7-pmu0LMNO!psci,arm,psci-1.0arm,psci-0.2smctimer,arm,armv7-timer40   Xn6oscillator ,fixed-clockXn6hxin24m{+display-subsystem,rockchip,display-subsystem i2s1@100b0000(,rockchip,rk3228-i2srockchip,rk3066-i2su @ i2s_clki2s_hclkQ  txrxdefault  disabledi2s0@100c0000(,rockchip,rk3228-i2srockchip,rk3066-i2su @ i2s_clki2s_hclkP txrx disabledspdif@100d0000,rockchip,rk3228-spdifu  S mclkhclk txdefault  disabledi2s2@100e0000(,rockchip,rk3228-i2srockchip,rk3066-i2su@ i2s_clki2s_hclkR txrx disabledsyscon@11000000&,rockchip,rk3228-grfsysconsimple-mfdu,io-domains",rockchip,rk3228-io-voltage-domainokay  power-controller!,rockchip,rk3228-power-controller2power-domain@4u8power-domain@5upower-domain@6upower-domain@7u power-domain@8uusb2phy@760,rockchip,rk3228-usb2phyu` phyclk husb480m_phy0{okayHotg-port$;<= otg-bvalidotg-idlinestateokay(Ghost-port >  linestateokay(Iusb2phy@800,rockchip,rk3228-usb2phyu phyclk husb480m_phy1{okayJotg-port D  linestateokay(Khost-port E  linestateokay(Lserial@11010000,snps,dw-apb-uartu 7Xn6MUbaudclkapb_pclkdefault 3= disabledserial@11020000,snps,dw-apb-uartu 8Xn6NVbaudclkapb_pclkdefault3= disabledserial@11030000,snps,dw-apb-uartu 9Xn6OWbaudclkapb_pclkdefault3=okayefuse@11040000,rockchip,rk3228-efuseu G pclk_efuseid@7ucpu_leakage@17ui2c@11050000,rockchip,rk3228-i2cu $i2cLdefault disabledi2c@11060000,rockchip,rk3228-i2cu %i2cMdefault disabledi2c@11070000,rockchip,rk3228-i2cu &i2cNdefault  disabledi2c@11080000,rockchip,rk3228-i2cu 'i2cOdefault! disabledspi@11090000,rockchip,rk3228-spiu  1ARspiclkapb_pclkdefault"#$%& disabledwatchdog@110a0000 ,rockchip,rk3228-wdtsnps,dw-wdtu  (b disabledpwm@110b0000,rockchip,rk3288-pwmu J^default' disabledpwm@110b0010,rockchip,rk3288-pwmu J^default(okayXpwm@110b0020,rockchip,rk3288-pwmu J^default)okayYpwm@110b0030,rockchip,rk3288-pwmu 0J^default* disabledtimer@110c0000,,rockchip,rk3228-timerrockchip,rk3288-timeru  + a+ pclktimerclock-controller@110e0000,rockchip,rk3228-cruu+xin24mU,{bHokb$#g0,eррxhррxhdma-controller@110f0000,arm,pl330arm,primecellu@ apb_pclk thermal-zonescpu-thermald-tripscpu_alert0pppassive.cpu_alert1$ppassive/cpu_crit_ pcriticalcooling-mapsmap0.0map1/0tsadc@11150000,rockchip,rk3228-tsadcu :HXtsadcapb_pclkoHyW tsadc-apbinitdefaultsleep0!1+05Ksokayb-hdmi-phy@12030000,rockchip,rk3228-hdmi-phyum+sysclkrefoclkrefpclk{ hhdmiphy_phyokay8gpu@20000000",rockchip,rk3228-maliarm,mali-400u H gpgpmmupp0ppmmu0pp1ppmmu1 buscorey2y~okay3video-codec@20020000(,rockchip,rk3228-vpurockchip,rk3399-vpuu     vepuvdpu aclkhclk4y2iommu@20020800,rockchip,iommuu    aclkifacey24video-codec@20030000*,rockchip,rk3228-vdecrockchip,rk3399-vdecu   axiahbcabaccoreo5y2iommu@20030480,rockchip,iommuu @ @  aclkifacey25vop@20050000,rockchip,rk3228-vopu   aclk_vopdclk_vophclk_vopydef axiahbdclk6y2okayport endpoint@0u7<iommu@20053f00,rockchip,iommuu ?   aclkifacey2okay6rga@20060000(,rockchip,rk3228-rgarockchip,rk3288-rgau  !aclkhclksclky2ykmn coreaxiahbiommu@20070800,rockchip,iommuu   aclkifacey2okayhdmi@200a0000,rockchip,rk3228-dw-hdmiu = #o8l{iahbisfrcecdefault 9:;y`hdmi8hdmiU,okayportsportendpoint@0u<7mmc@300000000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshcu0@   Drvbiuciuciu-driveciu-sampledefault =>?okaymmc@300100000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshcu0@   Eswbiuciuciu-driveciu-sampledefault @ABokay -C8Fmmc@300200000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshcu0@ X<4`S<4` Guybiuciuciu-driveciu-sampleadefault DEFySresetokay8usb@300400002,rockchip,rk3228-usbrockchip,rk3066-usbsnps,dwc2u0 otgotg@ G usb2-phyokayusb@30080000 ,generic-ehciu0  HIusbokayusb@300a0000 ,generic-ohciu0   HIusbokayusb@300c0000 ,generic-ehciu0   JKusbokayusb@300e0000 ,generic-ohciu0  JKusbokayusb@30100000 ,generic-ehciu0 B JLusbokayusb@30120000 ,generic-ohciu0 C JLusbokayethernet@30200000,rockchip,rk3228-gmacu0   macirq8~oMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macy8 stmmacethU,okayo|outputMrmii(Nmdio,snps,dwmac-mdioethernet-phy@04,ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22uy?Mqos@31030080,rockchip,rk3228-qossysconu1 qos@31030100,rockchip,rk3228-qossysconu1 qos@31030180,rockchip,rk3228-qossysconu1 qos@31030200,rockchip,rk3228-qossysconu1 qos@31040000,rockchip,rk3228-qossysconu1 qos@31050000,rockchip,rk3228-qossysconu1 qos@31060000,rockchip,rk3228-qossysconu1 qos@31070000,rockchip,rk3228-qossysconu1 qos@31070080,rockchip,rk3228-qossysconu1 interrupt-controller@32010000 ,arm,gic-400 u22 2@ 2`   pinctrl,rockchip,rk3228-pinctrlU,gpio@11110000,rockchip,gpio-banku 3@'gpio@11120000,rockchip,gpio-banku 4A'gpio@11130000,rockchip,gpio-banku 5B'Tgpio@11140000,rockchip,gpio-banku 6C'Spcfg-pull-up3Rpcfg-pull-down@Qpcfg-pull-noneOPpcfg-pull-none-drv-12ma\ Osdmmcsdmmc-clkkO=sdmmc-cmdkO>sdmmc-bus4@kOOOO?sdiosdio-clkkO@sdio-cmdkOAsdio-bus4@kOOOOBemmcemmc-clkkPDemmc-cmdkPEemmc-bus8kPPPPPPPPFgmacrgmii-pinskP PPOOOO O OPPPP PPrmii-pinskP PPOO OPPPPphy-pins kPPhdmihdmi-hpdkQ:hdmii2c-xfer kPP9hdmi-ceckP;i2c0i2c0-xfer kPPi2c1i2c1-xfer kPPi2c2i2c2-xfer kPP i2c3i2c3-xfer kPP!spi0spi0-clkk R"spi0-cs0kR%spi0-txk R#spi0-rxk R$spi0-cs1k R&spi1spi1-clkkRspi1-cs0kRspi1-rxkRspi1-txkRspi1-cs1kRi2s1i2s1-buskP P P P PPPPP pwm0pwm0-pinkP'pwm1pwm1-pinkP(pwm2pwm2-pink P)pwm3pwm3-pink P*spdifspdif-txkP tsadcotp-pinkP0otp-outkP1uart0uart0-xfer kPPuart0-ctskPuart0-rtskPuart1uart1-xfer k P Puart1-ctskPuart1-rtsk Puart2uart2-xfer kRPuart21-xfer k R Puart2-ctskPuart2-rtskPusbhost-vbus-drvkPUmemory@60000000imemoryu`@dc-12v-regulator,regulator-fixedydc_12vWext_gmac ,fixed-clockXsY@ hext_gmac{power-led ,gpio-ledsled-0 Sonsdio-pwrseq,mmc-pwrseq-simpleTTCvcc-host-regulator,regulator-fixed SdefaultU yvcc_hostVvcc-phy-regulator,regulator-fixedyvcc_phyw@w@Nvcc-sys-regulator,regulator-fixedyvcc_sysLK@LK@WVvccio-1v8-regulator,regulator-fixed yvccio_1v8w@w@Vvccio-3v3-regulator,regulator-fixed yvccio_3v32Z2ZV vdd-arm-regulator,pwm-regulator!Xa&Vyvdd_arm~\vdd-log-regulator,pwm-regulator!Ya&Vyvdd_logB@ 3 #address-cells#size-cellsinterrupt-parentcompatiblemodelserial0serial1serial2spi0mmc0mmc1mmc2device_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksenable-methodcpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsportsclock-namesdmasdma-namespinctrl-namespinctrl-0statusvccio1-supplyvccio2-supplyvccio4-supply#power-domain-cellspm_qosinterrupt-names#phy-cellsphy-supplyreg-shiftreg-io-width#pwm-cellsrockchip,grf#reset-cellsassigned-clocksassigned-clock-rates#dma-cellsarm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-modepower-domainsmali-supplyiommus#iommu-cellsremote-endpointassigned-clock-parentsphysphy-namesfifo-depthcap-mmc-highspeeddisable-wpbus-widthcap-sd-highspeedcap-sdio-irqmmc-pwrseqnon-removablevqmmc-supplymax-frequencyrockchip,default-sample-phasedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeclock_in_outphy-handlephy-modephy-is-integratedinterrupt-controller#interrupt-cellsrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltgpiosdefault-statereset-gpiosenable-active-highgpiovin-supplypwmspwm-supply