],8W(W\!,Rockchip RK3228 Evaluation board$2rockchip,rk3228-evbrockchip,rk3228aliases=/serial@11010000E/serial@11020000M/serial@11030000U/spi@11090000Z/mmc@30020000cpuscpu@f00_cpu2arm,cortex-a7kov@pscicpu@f01_cpu2arm,cortex-a7kovpscicpu@f02_cpu2arm,cortex-a7kovpscicpu@f03_cpu2arm,cortex-a7kovpsciopp-table-02operating-points-v2opp-408000000Q~@opp-600000000#Fopp-8160000000,B@opp-1008000000<opp-1200000000Gtxarm-pmu2arm,cortex-a7-pmu0LMNO psci2arm,psci-1.0arm,psci-0.2smctimer2arm,armv7-timer0   Cn6oscillator 2fixed-clockCn6Sxin24mf'display-subsystem2rockchip,display-subsystemsi2s1@100b0000(2rockchip,rk3228-i2srockchip,rk3066-i2sk @ yi2s_clki2s_hclkQ  txrxdefault  disabledi2s0@100c0000(2rockchip,rk3228-i2srockchip,rk3066-i2sk @ yi2s_clki2s_hclkP txrx disabledspdif@100d00002rockchip,rk3228-spdifk  S ymclkhclk txdefault  disabledi2s2@100e0000(2rockchip,rk3228-i2srockchip,rk3066-i2sk@ yi2s_clki2s_hclkR txrx disabledsyscon@11000000&2rockchip,rk3228-grfsysconsimple-mfdk(io-domains"2rockchip,rk3228-io-voltage-domain disabledpower-controller!2rockchip,rk3228-power-controller.power-domain@4k8 power-domain@5kpower-domain@6kpower-domain@7k power-domain@8kusb2phy@7602rockchip,rk3228-usb2phyk` yphyclk Susb480m_phy0f disabledBotg-port$;<=otg-bvalidotg-idlinestate disabledAhost-port > linestate disabledCusb2phy@8002rockchip,rk3228-usb2phyk yphyclk Susb480m_phy1f disabledDotg-port D linestate disabledEhost-port E linestate disabledFserial@110100002snps,dw-apb-uartk 7Cn6MUybaudclkapb_pclkdefault  disabledserial@110200002snps,dw-apb-uartk 8Cn6NVybaudclkapb_pclkdefault disabledserial@110300002snps,dw-apb-uartk 9Cn6OWybaudclkapb_pclkdefaultokayefuse@110400002rockchip,rk3228-efusek G ypclk_efuseid@7kcpu_leakage@17ki2c@110500002rockchip,rk3228-i2ck $yi2cLdefault disabledi2c@110600002rockchip,rk3228-i2ck %yi2cMdefault disabledi2c@110700002rockchip,rk3228-i2ck &yi2cNdefault disabledi2c@110800002rockchip,rk3228-i2ck 'yi2cOdefault disabledspi@110900002rockchip,rk3228-spik  1ARyspiclkapb_pclkdefault !" disabledwatchdog@110a0000 2rockchip,rk3228-wdtsnps,dw-wdtk  (b disabledpwm@110b00002rockchip,rk3288-pwmk ^default# disabledpwm@110b00102rockchip,rk3288-pwmk ^default$ disabledpwm@110b00202rockchip,rk3288-pwmk ^default% disabledpwm@110b00302rockchip,rk3288-pwmk 0^default& disabledtimer@110c0000,2rockchip,rk3228-timerrockchip,rk3288-timerk  + a' ypclktimerclock-controller@110e00002rockchip,rk3228-cruk'yxin24m (fH%kb$5#g0,eррxhррxhdma-controller@110f00002arm,pl330arm,primecellk@JU yapb_pclk thermal-zonescpu-thermalld)tripscpu_alert0pfpassive*cpu_alert1$fpassive+cpu_crit_ fcriticalcooling-mapsmap0*0map1+0tsadc@111500002rockchip,rk3228-tsadck :HXytsadcapb_pclk%H5oW tsadc-apbinitdefaultsleep,-,sokay/)hdmi-phy@120300002rockchip,rk3228-hdmi-phykm'ysysclkrefoclkrefpclkf Shdmiphy_phy disabled3gpu@20000000"2rockchip,rk3228-maliarm,mali-400k Hgpgpmmupp0ppmmu0pp1ppmmu1 ybuscoreJ.o~ disabledvideo-codec@20020000(2rockchip,rk3228-vpurockchip,rk3399-vpuk    vepuvdpu yaclkhclkX/J.iommu@200208002rockchip,iommuk    yaclkifaceJ._/video-codec@20030000*2rockchip,rk3228-vdecrockchip,rk3399-vdeck   yaxiahbcabaccore%5X0J.iommu@200304802rockchip,iommuk @ @  yaclkifaceJ._0vop@200500002rockchip,rk3228-vopk   yaclk_vopdclk_vophclk_vopodef axiahbdclkX1J. disabledportendpoint@0kl27iommu@20053f002rockchip,iommuk ?   yaclkifaceJ._ disabled1rga@20060000(2rockchip,rk3228-rgarockchip,rk3288-rgak  !yaclkhclksclkJ.okmn coreaxiahbiommu@200708002rockchip,iommuk   yaclkifaceJ._ disabledhdmi@200a00002rockchip,rk3228-dw-hdmik  #%|3l{yiahbisfrcecdefault 456o`hdmi3hdmi ( disabledportsportendpoint@0kl72mmc@3000000002rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshck0@   Drvybiuciuciu-driveciu-sampledefault 89: disabledmmc@3001000002rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshck0@   Eswybiuciuciu-driveciu-sampledefault ;<= disabledmmc@3002000002rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshck0@ C<4`<4` Guyybiuciuciu-driveciu-sampledefault >?@oSresetokay usb@3004000022rockchip,rk3228-usbrockchip,rk3066-usbsnps,dwc2k0 yotgotg#5D@ A usb2-phy disabledusb@30080000 2generic-ehcik0  BCusb disabledusb@300a0000 2generic-ohcik0   BCusb disabledusb@300c0000 2generic-ehcik0   DEusb disabledusb@300e0000 2generic-ohcik0  DEusb disabledusb@30100000 2generic-ehcik0 B DFusb disabledusb@30120000 2generic-ohcik0 C DFusb disabledethernet@302000002rockchip,rk3228-gmack0  macirq8~oMystmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_maco8 stmmaceth (okay%|5Soutput`GkrmiitHmdio2snps,dwmac-mdioethernet-phy@042ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22ko?Hqos@310300802rockchip,rk3228-qossysconk1  qos@310301002rockchip,rk3228-qossysconk1 qos@310301802rockchip,rk3228-qossysconk1  qos@310302002rockchip,rk3228-qossysconk1 qos@310400002rockchip,rk3228-qossysconk1 qos@310500002rockchip,rk3228-qossysconk1 qos@310600002rockchip,rk3228-qossysconk1 qos@310700002rockchip,rk3228-qossysconk1 qos@310700802rockchip,rk3228-qossysconk1 interrupt-controller@32010000 2arm,gic-400 k22 2@ 2`   pinctrl2rockchip,rk3228-pinctrl (gpio@111100002rockchip,gpio-bankk 3@gpio@111200002rockchip,gpio-bankk 4Agpio@111300002rockchip,gpio-bankk 5Bgpio@111400002rockchip,gpio-bankk 6Cpcfg-pull-upLpcfg-pull-downKpcfg-pull-noneJpcfg-pull-none-drv-12ma Isdmmcsdmmc-clkI8sdmmc-cmdI9sdmmc-bus4@IIII:sdiosdio-clkI;sdio-cmdI<sdio-bus4@IIII=emmcemmc-clkJ>emmc-cmdJ?emmc-bus8JJJJJJJJ@gmacrgmii-pinsJ JJIIII I IJJJJ JJrmii-pinsJ JJII IJJJJphy-pins JJhdmihdmi-hpdK5hdmii2c-xfer JJ4hdmi-cecJ6i2c0i2c0-xfer JJi2c1i2c1-xfer JJi2c2i2c2-xfer JJi2c3i2c3-xfer JJspi0spi0-clk Lspi0-cs0L!spi0-tx Lspi0-rx L spi0-cs1 L"spi1spi1-clkLspi1-cs0Lspi1-rxLspi1-txLspi1-cs1Li2s1i2s1-busJ J J J JJJJJ pwm0pwm0-pinJ#pwm1pwm1-pinJ$pwm2pwm2-pin J%pwm3pwm3-pin J&spdifspdif-txJ tsadcotp-pinJ,otp-outJ-uart0uart0-xfer JJuart0-ctsJuart0-rtsJuart1uart1-xfer  J Juart1-ctsJuart1-rts Juart2uart2-xfer LJuart21-xfer  L Juart2-ctsJuart2-rtsJmemory@60000000_memoryk`@vcc-phy-regulator2regulator-fixed 3vcc_phyBw@Zw@rG #address-cells#size-cellsinterrupt-parentmodelcompatibleserial0serial1serial2spi0mmc0device_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksenable-methodphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsportsclock-namesdmasdma-namespinctrl-namespinctrl-0status#power-domain-cellspm_qosinterrupt-names#phy-cellsreg-shiftreg-io-width#pwm-cellsrockchip,grf#reset-cellsassigned-clocksassigned-clock-rates#dma-cellsarm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypower-domainsiommus#iommu-cellsremote-endpointassigned-clock-parentsphysphy-namesfifo-depthmax-frequencybus-widthrockchip,default-sample-phasecap-mmc-highspeedmmc-ddr-1_8vdisable-wpnon-removabledr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeclock_in_outphy-supplyphy-modephy-handlephy-is-integratedinterrupt-controller#interrupt-cellsrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsenable-active-highregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-on