b 8[()[,radxa,rockrockchip,rk3188 7Radxa Rockaliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/serial@10124000h/serial@10126000p/serial@20064000x/serial@20068000/spi@20070000/spi@20074000/mmc@10214000oscillator ,fixed-clockn6xin24m<gpu@10090000",rockchip,rk3188-maliarm,mali-400  buscorex okayx 5gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3,video-codec@10104000(,rockchip,rk3188-vpurockchip,rk3066-vpu@   vepuvdpu (aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu,cache-controller@10138000,arm,pl310-cache:H4scu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer     disabledlocal-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gicTiserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uart@ "zbaudclkapb_pclk@L okaydefaultserial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uart` #zbaudclkapb_pclkAM okaydefaultqos@1012d000,rockchip,rk3066-qossyscon qos@1012e000,rockchip,rk3066-qossyscon qos@1012f000,rockchip,rk3066-qossyscon qos@1012f080,rockchip,rk3066-qossyscon qos@1012f100,rockchip,rk3066-qossyscon qos@1012f180,rockchip,rk3066-qossyscon qos@1012f200,rockchip,rk3066-qossyscon qos@1012f280,rockchip,rk3066-qossyscon usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg@@  usb2-phy okayusb@101c0000 ,snps,dwc2 otghost usb2-phy okayethernet@10204000,rockchip,rk3188-emac @< D hclkmacrefdrmii okay  default  mdioethernet-phy@0 mmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciu$rx-tx.Q9reset okaydefaultEQ[m~mmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciu$rx-tx.R9reset  disabledmmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciu$rx-tx.S9reset  disablednand-controller@10500000,rockchip,rk2928-nfcP@ ahb  disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @=reboot-mode,syscon-reboot-mode@RBRBRB RBpower-controller!,rockchip,rk3188-power-controllerpower-domain@7hOpower-domain@6 power-domain@8grf@20008000&,rockchip,rk3188-grfsysconsimple-mfd io-domains",rockchip,rk3188-io-voltage-domain  disabledusbphy,rockchip,rk3188-usb-phy okayusb-phy@10c Qphyclkusb-phy@11cRphyclkdma-controller@20018000,arm,pl330arm,primecell @ apb_pclk:dma-controller@2001c000,arm,pl330arm,primecell @ apb_pclk  disabledi2c@2002d000,rockchip,rk3188-i2c  (i2cP  disableddefaulti2c@2002f000,rockchip,rk3188-i2c  )Qi2c okaydefaultrtc@51,haoyu,hym8563Q defaultxin32kact8846@5a,active-semi,act8846Z okay)default A!L!W!b!m"y!!regulatorsREG1VCC_DDROOREG2VDD_LOGB@B@REG3VDD_ARM Yp6REG4VCC_IO2Z2Z"REG5VDD_10B@B@REG6 VDD_HDMI&%&%REG7VCC_18w@w@REG8VCCA_332Z2ZREG9 VCC_RMII2Z2Z REG10 VCCIO_WL2Z2ZREG11 VCC18_IOw@w@REG12VCC_28**pwm@20030000,rockchip,rk2928-pwm F  disableddefault#pwm@20030010,rockchip,rk2928-pwm F okaydefault$watchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdt K 3 okaypwm@20050020,rockchip,rk2928-pwm  G okaydefault%pwm@20050030,rockchip,rk2928-pwm 0G okaydefault&i2c@20056000,rockchip,rk3188-i2c ` *Ri2c  disableddefault'i2c@2005a000,rockchip,rk3188-i2c  +Si2c  disableddefault(i2c@2005e000,rockchip,rk3188-i2c  4Ti2c  disableddefault)serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uart @ $zbaudclkapb_pclkBN okaydefault*serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uart  %zbaudclkapb_pclkCO okaydefault+saradc@2006c000,rockchip,saradc  GJsaradcapb_pclkW 9saradc-apb  disabledspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spiEHspiclkapb_pclk &   $txrx  disableddefault,-./spi@20074000(,rockchip,rk3188-spirockchip,rk3066-spiFIspiclkapb_pclk ' @  $txrx  disableddefault0123dma-controller@20078000,arm,pl330arm,primecell @ apb_pclkcpusrockchip,rk3066-smpcpu@0cpu,arm,cortex-a94,@:5N6cpu@1cpu,arm,cortex-a94:5N6cpu@2cpu,arm,cortex-a94:5N6cpu@3cpu,arm,cortex-a94:5N6opp-table-0,operating-points-v2Y5opp-312000000dk Yy@opp-504000000d nkHopp-600000000d#Fk~opp-816000000d0,kopp-1008000000d<kg8opp-1200000000dGk0opp-1416000000dTfrkopp-1608000000d_"kpdisplay-subsystem,rockchip,display-subsystem78sram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3188-vop  aclk_vopdclk_vophclk_vop,def 9axiahbdclk  disabledport7vop@1010e000,rockchip,rk3188-vop aclk_vopdclk_vophclk_vop,ghi 9axiahbdclk  disabledport8timer@2000e000,,rockchip,rk3188-timerrockchip,rk3288-timer  .EW pclktimertimer@200380a0,,rockchip,rk3188-timerrockchip,rk3288-timer   @BZ pclktimeri2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2s   default9Ki2s_clki2s_hclk::$txrx  disabledsound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdif N mclkhclk:$tx  default; okayAclock-controller@20000000,rockchip,rk3188-cru <xin24mefuse@20010000,rockchip,rk3188-efuse @[ pclk_efusecpu_leakage@17pinctrl,rockchip,rk3188-pinctrl=gpio@2000a000,rockchip,rk3188-gpio-bank0  6UTigpio@2003c000,rockchip,gpio-bank  7VTigpio@2003e000,rockchip,gpio-bank  8WTiDgpio@20080000,rockchip,gpio-bank  9XTipcfg-pull-up?pcfg-pull-down,pcfg-pull-none;>emmcemmc-clkH>emmc-cmdH?emmc-rstH>emacemac-xferH>>>>>>>> emac-mdio H>> i2c0i2c0-xfer H>>i2c1i2c1-xfer H>>i2c2i2c2-xfer H>>'i2c3i2c3-xfer H>>(i2c4i2c4-xfer H>>)lcdc1lcdc1-dclkH>lcdc1-denH>lcdc1-hsyncH>lcdc1-vsyncH>lcdc1-rgb24H>>>>>>>>> > > > > >>>>>>>>>>>pwm0pwm0-outH>#pwm1pwm1-outH>$pwm2pwm2-outH>%pwm3pwm3-outH>&spi0spi0-clkH?,spi0-cs0H?/spi0-txH?-spi0-rxH?.spi0-cs1H?spi1spi1-clkH?0spi1-cs0H?3spi1-rxH?2spi1-txH?1spi1-cs1H?uart0uart0-xfer H?>uart0-ctsH>uart0-rtsH>uart1uart1-xfer H?>uart1-ctsH>uart1-rtsH>uart2uart2-xfer H? >*uart3uart3-xfer H ? >+uart3-ctsH >uart3-rtsH >sd0sd0-clkH>sd0-cmdH>sd0-cdH>sd0-wpH >sd0-pwrH>sd0-bus-width1H>sd0-bus-width4@H>>>>sdmmc-pwrH>Fsd1sd1-clkH>sd1-cmdH>sd1-cdH>sd1-wpH>sd1-bus-width1H>sd1-bus-width4@H>>>>i2s0i2s0-bus`H>>>>>>9spdifspdif-txH>;pcfg-output-lowV@act8846act8846-dvs0-ctlH@ hym8563rtc-intH?lan8720aphy-intH? ir-receiverir-recv-pinH >Cusbhost-vbus-drvH>Gotg-vbus-drvH>Ememory@60000000memory`gpio-keys ,gpio-keysakey-power lrt}GPIO Key Powerdgpio-leds ,gpio-ledsled-0}rock:green:user1 l offled-1}rock:blue:user2 loffled-2}rock:red:power loffsound,simple-audio-cardSPDIFsimple-audio-card,dai-link@1cpuAcodecBspdif-out,linux,spdif-ditBir-receiver,gpio-ir-receiver l defaultCusb-otg-regulator,regulator-fixed DdefaultE otg-vbusLK@LK@sdmmc-regulator,regulator-fixed sdmmc-supply2Z2Z defaultF "usb-host-regulator,regulator-fixed defaultG host-pwrLK@LK@vsys-regulator,regulator-fixedvsysLK@LK@! #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplydmasdma-namesfifo-depthreset-namesvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstsystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheclock-latencyoperating-points-v2cpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsrangesrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-lowautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervaldefault-statesimple-audio-card,namesound-daienable-active-highgpioregulator-boot-onstartup-delay-usvin-supply