I8( Stechnexion,omap3-thundertechnexion,omap3-tao3530ti,omap3430ti,omap34xxti,omap3 +,7TI OMAP3 Thunder baseboard with TAO3530 SOMchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000 s/displaycpus+cpu@0arm,cortex-a8|cpucpu pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ 5Shsusbb2-pins`p          mmc1-pinsPp "$&mmc2-pins0p(*,.02wlan-gpio-pinsp^uart3-pinspnApi2c3-pinspmcspi1-pins pmcspi3-pins pmcbsp3-pins p<>@Btwl4030-pinspAdss-dpi-pinsplte430-pinsp8backlight-pinsp:scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselhclock-mcbsp5-mux-fckti,composite-mux-clockmcbsp5_mux_fck clock-mcbsp3-mux-fckti,composite-mux-clockmcbsp3_mux_fckclock-mcbsp4-mux-fckti,composite-mux-clockmcbsp4_mux_fckmcbsp5_fckti,composite-clock clock@4 ti,clkselclock-mcbsp1-mux-fckti,composite-mux-clockmcbsp1_mux_fck clock-mcbsp2-mux-fckti,composite-mux-clockmcbsp2_mux_fckmcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clock mcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ 5Stwl4030-vpins-pins ptarget-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H `  )disabledaes1@0 ti,omap3-aesP0  5txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P  )disabledaes2@0 ti,omap3-aesP0AB5txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock?Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockOpZ!sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockq|dpll3_m2x2_ckfixed-factor-clockq| dpll4_x2_ckfixed-factor-clockq|corex2_fckfixed-factor-clock q|"wkup_l4_ickfixed-factor-clock!q|acorex2_d3_fckfixed-factor-clock"q|corex2_d5_fckfixed-factor-clock"q|clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock?omap_32k_fck fixed-clock?Gvirt_12m_ck fixed-clock?virt_13m_ck fixed-clock?]@virt_19200000_ck fixed-clock?$virt_26000000_ck fixed-clock?virt_38_4m_ck fixed-clock?Idpll4_ck@d00ti,omap3-dpll-per-clock!! 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Tclock-gpt11-gate-fckti,composite-gate-clockgpt11_gate_fck! Vclock-mmchs2-fckti,wait-gate-clock mmchs2_fckclock-mmchs1-fckti,wait-gate-clock mmchs1_fckclock-i2c3-fckti,wait-gate-clock i2c3_fckclock-i2c2-fckti,wait-gate-clock i2c2_fckclock-i2c1-fckti,wait-gate-clock i2c1_fckclock-mcbsp5-gate-fckti,composite-gate-clockmcbsp5_gate_fck  clock-mcbsp1-gate-fckti,composite-gate-clockmcbsp1_gate_fck  clock-mcspi4-fckti,wait-gate-clock mcspi4_fckRclock-mcspi3-fckti,wait-gate-clock mcspi3_fckRclock-mcspi2-fckti,wait-gate-clock mcspi2_fckRclock-mcspi1-fckti,wait-gate-clock mcspi1_fckRclock-uart2-fckti,wait-gate-clock uart2_fckRclock-uart1-fckti,wait-gate-clock uart1_fckR clock-hdq-fckti,wait-gate-clockhdq_fckSclock-modem-fckti,omap3-interface-clock modem_fck!clock-mspro-fckti,wait-gate-clock mspro_fckclock-ssi-ssr-gate-fck-3430es2 ti,composite-no-wait-gate-clockssi_ssr_gate_fck_3430es2"}clock-mmchs3-fckti,wait-gate-clock mmchs3_fckgpt10_fckti,composite-clockTUgpt11_fckti,composite-clockVWcore_96m_fckfixed-factor-clockXq|core_48m_fckfixed-factor-clock8q|Rcore_12m_fckfixed-factor-clockYq|Score_l3_ickfixed-factor-clockFq|Zclock@a10 ti,clksel clock-sdrc-ickti,wait-gate-clock sdrc_ickZclock-mmchs2-ickti,omap3-interface-clock mmchs2_ick[clock-mmchs1-ickti,omap3-interface-clock mmchs1_ick[clock-hdq-ickti,omap3-interface-clockhdq_ick[clock-mcspi4-ickti,omap3-interface-clock mcspi4_ick[clock-mcspi3-ickti,omap3-interface-clock mcspi3_ick[clock-mcspi2-ickti,omap3-interface-clock mcspi2_ick[clock-mcspi1-ickti,omap3-interface-clock mcspi1_ick[clock-i2c3-ickti,omap3-interface-clock i2c3_ick[clock-i2c2-ickti,omap3-interface-clock i2c2_ick[clock-i2c1-ickti,omap3-interface-clock i2c1_ick[clock-uart2-ickti,omap3-interface-clock uart2_ick[clock-uart1-ickti,omap3-interface-clock uart1_ick[ clock-gpt11-ickti,omap3-interface-clock gpt11_ick[ clock-gpt10-ickti,omap3-interface-clock gpt10_ick[ clock-mcbsp5-ickti,omap3-interface-clock mcbsp5_ick[ clock-mcbsp1-ickti,omap3-interface-clock mcbsp1_ick[ clock-omapctrl-ickti,omap3-interface-clock omapctrl_ick[clock-aes2-ickti,omap3-interface-clock aes2_ick[clock-sha12-ickti,omap3-interface-clock sha12_ick[clock-icr-ickti,omap3-interface-clockicr_ick[clock-des2-ickti,omap3-interface-clock des2_ick[clock-mspro-ickti,omap3-interface-clock mspro_ick[clock-mailboxes-ickti,omap3-interface-clockmailboxes_ick[clock-sad2d-ickti,omap3-interface-clock sad2d_ickFclock-hsotgusb-ick-3430es2"ti,omap3-hsotgusb-interface-clockhsotgusb_ick_3430es2Zclock-ssi-ick-3430es2ti,omap3-ssi-interface-clockssi_ick_3430es2\clock-mmchs3-ickti,omap3-interface-clock mmchs3_ick[gpmc_fckfixed-factor-clockZq|core_l4_ickfixed-factor-clockHq|[clock@e00 ti,clkselclock-dss-tv-fckti,gate-clock dss_tv_fck@clock-dss-96m-fckti,gate-clock dss_96m_fckXclock-dss2-alwon-fckti,gate-clockdss2_alwon_fck!clock-dss1-alwon-fck-3430es2ti,dss-gate-clockdss1_alwon_fck_3430es2]dummy_ck fixed-clock?clock@c00 ti,clksel clock-gpt1-gate-fckti,composite-gate-clockgpt1_gate_fck!_clock-gpio1-dbckti,gate-clock gpio1_dbck^clock-wdt2-fckti,wait-gate-clock wdt2_fck^clock-sr1-fckti,wait-gate-clocksr1_fck! clock-sr2-fckti,wait-gate-clocksr2_fck!clock-usim-gate-fckti,composite-gate-clockusim_gate_fckX gpt1_fckti,composite-clock_`wkup_32k_fckfixed-factor-clockGq|^clock@c10 ti,clksel clock-wdt2-ickti,omap3-interface-clock wdt2_ickaclock-wdt1-ickti,omap3-interface-clock wdt1_ickaclock-gpio1-ickti,omap3-interface-clock gpio1_ickaclock-omap-32ksync-ickti,omap3-interface-clockomap_32ksync_ickaclock-gpt12-ickti,omap3-interface-clock gpt12_ickaclock-gpt1-ickti,omap3-interface-clock gpt1_ickaclock-usim-ickti,omap3-interface-clock usim_icka per_96m_fckfixed-factor-clock1q|per_48m_fckfixed-factor-clock8q|bclock@1000 ti,clkselclock-uart3-fckti,wait-gate-clock uart3_fckb clock-gpt2-gate-fckti,composite-gate-clockgpt2_gate_fck!dclock-gpt3-gate-fckti,composite-gate-clockgpt3_gate_fck!fclock-gpt4-gate-fckti,composite-gate-clockgpt4_gate_fck!hclock-gpt5-gate-fckti,composite-gate-clockgpt5_gate_fck!jclock-gpt6-gate-fckti,composite-gate-clockgpt6_gate_fck!lclock-gpt7-gate-fckti,composite-gate-clockgpt7_gate_fck!nclock-gpt8-gate-fckti,composite-gate-clockgpt8_gate_fck! pclock-gpt9-gate-fckti,composite-gate-clockgpt9_gate_fck! rclock-gpio6-dbckti,gate-clock gpio6_dbckcclock-gpio5-dbckti,gate-clock gpio5_dbckcclock-gpio4-dbckti,gate-clock gpio4_dbckcclock-gpio3-dbckti,gate-clock gpio3_dbckcclock-gpio2-dbckti,gate-clock gpio2_dbckc clock-wdt3-fckti,wait-gate-clock wdt3_fckc clock-mcbsp2-gate-fckti,composite-gate-clockmcbsp2_gate_fck clock-mcbsp3-gate-fckti,composite-gate-clockmcbsp3_gate_fckclock-mcbsp4-gate-fckti,composite-gate-clockmcbsp4_gate_fckclock@1040 ti,clksel@clock-gpt2-mux-fckti,composite-mux-clock gpt2_mux_fckG!eclock-gpt3-mux-fckti,composite-mux-clock gpt3_mux_fckG!gclock-gpt4-mux-fckti,composite-mux-clock gpt4_mux_fckG!iclock-gpt5-mux-fckti,composite-mux-clock gpt5_mux_fckG!kclock-gpt6-mux-fckti,composite-mux-clock gpt6_mux_fckG!mclock-gpt7-mux-fckti,composite-mux-clock gpt7_mux_fckG!oclock-gpt8-mux-fckti,composite-mux-clock gpt8_mux_fckG!qclock-gpt9-mux-fckti,composite-mux-clock gpt9_mux_fckG!sgpt2_fckti,composite-clockdegpt3_fckti,composite-clockfggpt4_fckti,composite-clockhigpt5_fckti,composite-clockjkgpt6_fckti,composite-clocklmgpt7_fckti,composite-clocknogpt8_fckti,composite-clockpqgpt9_fckti,composite-clockrsper_32k_alwon_fckfixed-factor-clockGq|cper_l4_ickfixed-factor-clockHq|tclock@1010 ti,clkselclock-gpio6-ickti,omap3-interface-clock gpio6_icktclock-gpio5-ickti,omap3-interface-clock gpio5_icktclock-gpio4-ickti,omap3-interface-clock gpio4_icktclock-gpio3-ickti,omap3-interface-clock gpio3_icktclock-gpio2-ickti,omap3-interface-clock gpio2_ickt clock-wdt3-ickti,omap3-interface-clock wdt3_ickt clock-uart3-ickti,omap3-interface-clock uart3_ickt clock-uart4-ickti,omap3-interface-clock uart4_icktclock-gpt9-ickti,omap3-interface-clock gpt9_ickt clock-gpt8-ickti,omap3-interface-clock gpt8_ickt clock-gpt7-ickti,omap3-interface-clock gpt7_icktclock-gpt6-ickti,omap3-interface-clock gpt6_icktclock-gpt5-ickti,omap3-interface-clock gpt5_icktclock-gpt4-ickti,omap3-interface-clock gpt4_icktclock-gpt3-ickti,omap3-interface-clock gpt3_icktclock-gpt2-ickti,omap3-interface-clock gpt2_icktclock-mcbsp2-ickti,omap3-interface-clock mcbsp2_icktclock-mcbsp3-ickti,omap3-interface-clock mcbsp3_icktclock-mcbsp4-ickti,omap3-interface-clock mcbsp4_icktemu_src_ckti,clkdm-gate-clocku)secure_32k_fck fixed-clock?vgpt12_fckfixed-factor-clockvq|wdt1_fckfixed-factor-clockvq|security_l4_ick2fixed-factor-clockHq|wclock@a14 ti,clksel clock-aes1-ickti,omap3-interface-clock aes1_ickwclock-rng-ickti,omap3-interface-clockrng_ickwclock-sha11-ickti,omap3-interface-clock sha11_ickwclock-des1-ickti,omap3-interface-clock des1_ickwclock-pka-ickti,omap3-interface-clockpka_ickxclock@f00 ti,clkselclock-cam-mclkti,gate-clock cam_mclkyclock-csi2-96m-fckti,gate-clock csi2_96m_fckcam_ick@f10!ti,omap3-no-wait-interface-clockHsecurity_l3_ickfixed-factor-clockFq|xssi_l4_ickfixed-factor-clockHq|\sr_l4_ickfixed-factor-clockHq|dpll2_fck@40ti,divider-clock.O@Zzdpll2_ck@4ti,omap3-dpll-clock!z$@4{dpll2_m2_ck@44ti,divider-clock{ODZ|iva2_ck@0ti,wait-gate-clock|clock@a18 ti,clksel clock-mad2d-ickti,omap3-interface-clock mad2d_ickFclock-usbtll-ickti,omap3-interface-clock usbtll_ick[ssi_ssr_fck_3430es2ti,composite-clock}~ssi_sst_fck_3430es2fixed-factor-clockq|sys_d2_ckfixed-factor-clock!q|Iomap_96m_d2_fckfixed-factor-clockXq|Jomap_96m_d4_fckfixed-factor-clockXq|Komap_96m_d8_fckfixed-factor-clockXq|Lomap_96m_d10_fckfixed-factor-clockXq| Mdpll5_m2_d4_ckfixed-factor-clockq|Ndpll5_m2_d8_ckfixed-factor-clockq|Odpll5_m2_d16_ckfixed-factor-clockq|Pdpll5_m2_d20_ckfixed-factor-clockq|Qusim_fckti,composite-clockdpll5_ck@d04ti,omap3-dpll-clock!!  $ L 4dpll5_m2_ck@d50ti,divider-clockO PZsgx_gate_fck@b00ti,composite-gate-clock. core_d3_ckfixed-factor-clock.q|core_d4_ckfixed-factor-clock.q|core_d6_ckfixed-factor-clock.q|omap_192m_alwon_fckfixed-factor-clock%q|core_d2_ckfixed-factor-clock.q|sgx_mux_fck@b40ti,composite-mux-clock 2 @sgx_fckti,composite-clock sgx_ick@b10ti,wait-gate-clockF cpefuse_fck@a08ti,gate-clock! ts_fck@a08ti,gate-clockG usbtll_fck@a08ti,wait-gate-clock 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gpio@49056000ti,omap3-gpioI`!gpio5_o gpio@49058000ti,omap3-gpioI"gpio6_o serial@4806a000ti,omap3-uartH {H0125txrxuart1?lserial@4806c000ti,omap3-uartH{I0345txrxuart2?lserial@49020000ti,omap3-uartI{J0565txrxuart3?ldefaulti2c@48070000 ti,omap3-i2cH8+i2c1?'@twl@48H  ti,twl4030 defaultaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2 vdd_ehciw@w@regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio_o twl4030-usbti,twl4030-usb  &4=pwmti,twl4030-pwmHpwmledti,twl4030-pwmledHpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadScmadcti,twl4030-madcvi2c@48072000 ti,omap3-i2cH 9+i2c2i2c@48060000 ti,omap3-i2cH=+i2c3?defaultmailbox@48094000ti,omap3-mailboxmailboxH @mbox-dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@0#$%&'()* 5tx0rx0tx1rx1tx2rx2tx3rx3defaultspi@4809a000ti,omap2-mcspiH B+mcspi2 0+,-.5tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 05tx0rx0tx1rx1defaultspi@480ba000ti,omap2-mcspiH 0+mcspi40FG5tx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc10=>5txrxdefault mmc@480b4000ti,omap3-hsmmcH @Vmmc20/05txrxdefault"0mmc@480ad000ti,omap3-hsmmcH ^mmc30MN5txrx )disabledmmu@480bd400Cti,omap2-iommuH mmu_ispPmmu@5d000000Cti,omap2-iommu]mmu_iva )disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< `commontxrxpmcbsp10 5txrxfck )disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H rng@0 ti,omap2-rng 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timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHM2gpmc@6e000000ti,omap3430-gpmcgpmcn05rxtx7C+ _o0nand@0,0ti,omap2-nand  Udvsw$$$0 'H8HI6X+x-loader@0 jX-Loaderbootloaders@80000jU-Bootbootloaders_env@260000 jU-Boot Env&kernel@280000jKernel(@filesystem@680000 jFile Systemhtarget-module@480ab000ti,sysc-omap2ti,syscH H H revsyscsyss  fck+ H usb@0ti,omap3-musb\]`mcdmap{ 2 usb2-phy82dss@48050000 ti,omap3-dssH)okay dss_corefck+defaultdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll )disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH )disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  )disabled dss_vencfckportendpointssi-controller@48058000 ti,omap3-ssissi)okayHHsysgddG`gdd_mpu+  ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+ 5Sisp@480bc000 ti,omap3-ispH H |lports+bandgap@48002524H%$ti,omap34xx-bandgap target-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $sysc fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrev fckick+ P@opp-tableoperating-points-v2-ti-cpuopp-125000000sY@  opp-250000000沀 g8g8g8 opp-500000000e OOO opp-550000000 U txtxtx opp-600000000#F ppp opp-720000000*T ppp )thermal-zonescpu-thermal4JXN e tripscpu_alertu8passive cpu_critu_ criticalcooling-mapsmap0   memory@80000000|memoryhsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z phsusb2-phy-pinsusb-nop-xceiv =soundti,omap-twl4030 omap3beagleregulator-mmc2-sdio-poweronregulator-fixedregulator-mmc2-sdio-poweron00 'displaysamsung,lte430wq-f0cpanel-dpijlcddefault  portendpointpanel-timing?T@  *  + 8  B O \ fbacklightgpio-backlightdefault   v compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskstatusdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypassti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplycd-gpiosbus-widthnon-removablecap-power-off-card#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbspenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activedefault-on