8( mxDgumstix,omap3-overo-palo35gumstix,omap3-overoti,omap3630ti,omap3 +/7OMAP36xx/AM37xx/DM37xx Gumstix Overo on Palo35chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000%{/ocp@68000000/spi@48098000/display@1cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+'<Zwdefaultuart2-pins <>@Bi2c1-pinsmmc1-pins0mmc2-pins0(*,.02w3cbw003c-pinslhsusb2-pins@      twl4030-pinsAi2c3-pinsuart3-pinsnpdss-dpi-pins lb035-pinsDbacklight-pinsF!mcspi1-pins(ads7846-pins scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselhclock-mcbsp5-mux-fckti,composite-mux-clockmcbsp5_mux_fck  clock-mcbsp3-mux-fckti,composite-mux-clockmcbsp3_mux_fck clock-mcbsp4-mux-fckti,composite-mux-clockmcbsp4_mux_fck  mcbsp5_fckti,composite-clock clock@4 ti,clkselclock-mcbsp1-mux-fckti,composite-mux-clockmcbsp1_mux_fck  clock-mcbsp2-mux-fckti,composite-mux-clockmcbsp2_mux_fck  mcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clockmcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+'<Ztwl4030-vpins-pins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss  -;ick+ H ` aes1@0 ti,omap3-aesPH  Mtxrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss  -;ick+ H P aes2@0 ti,omap3-aesPHABMtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockWYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock gpr"sys_clkout1@d70ti,gate-clock p dpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clock!dpll4_x2_ckfixed-factor-clock corex2_fckfixed-factor-clock!#wkup_l4_ickfixed-factor-clock"bcorex2_d3_fckfixed-factor-clock#corex2_d5_fckfixed-factor-clock#clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockWomap_32k_fck fixed-clockWHvirt_12m_ck fixed-clockWvirt_13m_ck fixed-clockW]@virt_19200000_ck fixed-clockW$virt_26000000_ck fixed-clockWvirt_38_4m_ck fixed-clockWIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock"" D 0 dpll4_m2_ck@d48ti,divider-clock g? Hr$dpll4_m2x2_mul_ckfixed-factor-clock$%dpll4_m2x2_ck@d00ti,hsdiv-gate-clock%  &omap_96m_alwon_fckfixed-factor-clock&2dpll3_ck@d00ti,omap3-dpll-core-clock"" @ 0clock@1140 ti,clksel@clock-dpll3-m3ti,divider-clock dpll3_m3_ck gr,clock-dpll4-m6ti,divider-clock dpll4_m6_ck  g?r>clock-emu-src-mux ti,mux-clockemu_src_mux_ck"'()vclock-pclk-fckti,divider-clock pclk_fck* grclock-pclkx2-fckti,divider-clock pclkx2_fck* grclock-atclk-fckti,divider-clock atclk_fck* grclock-traceclk-src-fck ti,mux-clocktraceclk_src_fck"'() +clock-traceclk-fckti,divider-clock traceclk_fck+ grdpll3_m3x2_mul_ckfixed-factor-clock,-dpll3_m3x2_ck@d00ti,hsdiv-gate-clock-  .emu_core_alwon_ckfixed-factor-clock.'sys_altclk fixed-clockW5mcbsp_clks fixed-clockWcore_ckfixed-factor-clock/dpll1_fck@940ti,divider-clock/ g @r0dpll1_ck@904ti,omap3-dpll-clock"0  $ @ 4dpll1_x2_ckfixed-factor-clock1dpll1_x2m2_ck@944ti,divider-clock1g DrEcm_96m_fckfixed-factor-clock23clock@d40 ti,clksel @clock-dpll3-m2ti,divider-clock dpll3_m2_ck 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g@clkout2_src_ckti,composite-clockCDBmpu_ckfixed-factor-clockEFarm_fck@924ti,divider-clockF $gemu_mpu_alwon_ckfixed-factor-clockF)clock@a40 ti,clksel @clock-l3-ickti,divider-clockl3_ick/grGclock-l4-ickti,divider-clockl4_ickG grIclock-gpt10-mux-fckti,composite-mux-clockgpt10_mux_fckH" Vclock-gpt11-mux-fckti,composite-mux-clockgpt11_mux_fckH" Xclock-ssi-ssr-div-fck-3430es2ti,composite-divider-clockssi_ssr_div_fck_3430es2# $clock@c40 ti,clksel @clock-rm-ickti,divider-clockrm_ickI grclock-gpt1-mux-fckti,composite-mux-clock gpt1_mux_fckH"aclock-usim-mux-fckti,composite-mux-clock usim_mux_fck("JKLMNOPQR rclock@a00 ti,clksel clock-gpt10-gate-fckti,composite-gate-clockgpt10_gate_fck" Uclock-gpt11-gate-fckti,composite-gate-clockgpt11_gate_fck" Wclock-mmchs2-fckti,wait-gate-clock mmchs2_fck clock-mmchs1-fckti,wait-gate-clock mmchs1_fck clock-i2c3-fckti,wait-gate-clock i2c3_fck clock-i2c2-fckti,wait-gate-clock i2c2_fck clock-i2c1-fckti,wait-gate-clock i2c1_fck clock-mcbsp5-gate-fckti,composite-gate-clockmcbsp5_gate_fck  clock-mcbsp1-gate-fckti,composite-gate-clockmcbsp1_gate_fck  clock-mcspi4-fckti,wait-gate-clock mcspi4_fckS clock-mcspi3-fckti,wait-gate-clock mcspi3_fckS clock-mcspi2-fckti,wait-gate-clock mcspi2_fckS clock-mcspi1-fckti,wait-gate-clock mcspi1_fckS clock-uart2-fckti,wait-gate-clock uart2_fckS clock-uart1-fckti,wait-gate-clock uart1_fckS clock-hdq-fckti,wait-gate-clockhdq_fckT clock-modem-fckti,omap3-interface-clock modem_fck" clock-mspro-fckti,wait-gate-clock mspro_fck clock-ssi-ssr-gate-fck-3430es2 ti,composite-no-wait-gate-clockssi_ssr_gate_fck_3430es2# ~clock-mmchs3-fckti,wait-gate-clock mmchs3_fck gpt10_fckti,composite-clockUVgpt11_fckti,composite-clockWXcore_96m_fckfixed-factor-clockYcore_48m_fckfixed-factor-clock9Score_12m_fckfixed-factor-clockZTcore_l3_ickfixed-factor-clockG[clock@a10 ti,clksel clock-sdrc-ickti,wait-gate-clock sdrc_ick[ clock-mmchs2-ickti,omap3-interface-clock mmchs2_ick\ clock-mmchs1-ickti,omap3-interface-clock mmchs1_ick\ clock-hdq-ickti,omap3-interface-clockhdq_ick\ clock-mcspi4-ickti,omap3-interface-clock mcspi4_ick\ clock-mcspi3-ickti,omap3-interface-clock mcspi3_ick\ clock-mcspi2-ickti,omap3-interface-clock mcspi2_ick\ clock-mcspi1-ickti,omap3-interface-clock mcspi1_ick\ clock-i2c3-ickti,omap3-interface-clock i2c3_ick\ clock-i2c2-ickti,omap3-interface-clock i2c2_ick\ clock-i2c1-ickti,omap3-interface-clock i2c1_ick\ clock-uart2-ickti,omap3-interface-clock uart2_ick\ clock-uart1-ickti,omap3-interface-clock uart1_ick\ clock-gpt11-ickti,omap3-interface-clock gpt11_ick\ clock-gpt10-ickti,omap3-interface-clock gpt10_ick\ clock-mcbsp5-ickti,omap3-interface-clock mcbsp5_ick\ clock-mcbsp1-ickti,omap3-interface-clock mcbsp1_ick\ clock-omapctrl-ickti,omap3-interface-clock omapctrl_ick\ clock-aes2-ickti,omap3-interface-clock aes2_ick\ clock-sha12-ickti,omap3-interface-clock sha12_ick\ clock-icr-ickti,omap3-interface-clockicr_ick\ clock-des2-ickti,omap3-interface-clock des2_ick\ clock-mspro-ickti,omap3-interface-clock mspro_ick\ clock-mailboxes-ickti,omap3-interface-clockmailboxes_ick\ clock-sad2d-ickti,omap3-interface-clock sad2d_ickG clock-hsotgusb-ick-3430es2"ti,omap3-hsotgusb-interface-clockhsotgusb_ick_3430es2[ clock-ssi-ick-3430es2ti,omap3-ssi-interface-clockssi_ick_3430es2] clock-mmchs3-ickti,omap3-interface-clock mmchs3_ick\ gpmc_fckfixed-factor-clock[core_l4_ickfixed-factor-clockI\clock@e00 ti,clkselclock-dss-tv-fckti,gate-clock dss_tv_fckA clock-dss-96m-fckti,gate-clock dss_96m_fckY clock-dss2-alwon-fckti,gate-clockdss2_alwon_fck" clock-dss1-alwon-fck-3430es2ti,dss-gate-clockdss1_alwon_fck_3430es2^ dummy_ck fixed-clockWclock@c00 ti,clksel clock-gpt1-gate-fckti,composite-gate-clockgpt1_gate_fck" `clock-gpio1-dbckti,gate-clock gpio1_dbck_ clock-wdt2-fckti,wait-gate-clock wdt2_fck_ clock-sr1-fckti,wait-gate-clocksr1_fck" clock-sr2-fckti,wait-gate-clocksr2_fck" clock-usim-gate-fckti,composite-gate-clockusim_gate_fckY gpt1_fckti,composite-clock`awkup_32k_fckfixed-factor-clockH_clock@c10 ti,clksel clock-wdt2-ickti,omap3-interface-clock wdt2_ickb clock-wdt1-ickti,omap3-interface-clock wdt1_ickb clock-gpio1-ickti,omap3-interface-clock gpio1_ickb clock-omap-32ksync-ickti,omap3-interface-clockomap_32ksync_ickb clock-gpt12-ickti,omap3-interface-clock gpt12_ickb clock-gpt1-ickti,omap3-interface-clock gpt1_ickb clock-usim-ickti,omap3-interface-clock usim_ickb per_96m_fckfixed-factor-clock2 per_48m_fckfixed-factor-clock9cclock@1000 ti,clkselclock-uart3-fckti,wait-gate-clock uart3_fckc clock-gpt2-gate-fckti,composite-gate-clockgpt2_gate_fck" eclock-gpt3-gate-fckti,composite-gate-clockgpt3_gate_fck" gclock-gpt4-gate-fckti,composite-gate-clockgpt4_gate_fck" iclock-gpt5-gate-fckti,composite-gate-clockgpt5_gate_fck" kclock-gpt6-gate-fckti,composite-gate-clockgpt6_gate_fck" mclock-gpt7-gate-fckti,composite-gate-clockgpt7_gate_fck" oclock-gpt8-gate-fckti,composite-gate-clockgpt8_gate_fck" qclock-gpt9-gate-fckti,composite-gate-clockgpt9_gate_fck" sclock-gpio6-dbckti,gate-clock gpio6_dbckd clock-gpio5-dbckti,gate-clock gpio5_dbckd clock-gpio4-dbckti,gate-clock gpio4_dbckd clock-gpio3-dbckti,gate-clock gpio3_dbckd clock-gpio2-dbckti,gate-clock gpio2_dbckd clock-wdt3-fckti,wait-gate-clock wdt3_fckd clock-mcbsp2-gate-fckti,composite-gate-clockmcbsp2_gate_fck clock-mcbsp3-gate-fckti,composite-gate-clockmcbsp3_gate_fck clock-mcbsp4-gate-fckti,composite-gate-clockmcbsp4_gate_fck clock-uart4-fckti,wait-gate-clock uart4_fckc clock@1040 ti,clksel@clock-gpt2-mux-fckti,composite-mux-clock gpt2_mux_fckH"fclock-gpt3-mux-fckti,composite-mux-clock gpt3_mux_fckH" hclock-gpt4-mux-fckti,composite-mux-clock gpt4_mux_fckH" jclock-gpt5-mux-fckti,composite-mux-clock gpt5_mux_fckH" lclock-gpt6-mux-fckti,composite-mux-clock gpt6_mux_fckH" nclock-gpt7-mux-fckti,composite-mux-clock gpt7_mux_fckH" pclock-gpt8-mux-fckti,composite-mux-clock gpt8_mux_fckH" rclock-gpt9-mux-fckti,composite-mux-clock gpt9_mux_fckH" tgpt2_fckti,composite-clockefgpt3_fckti,composite-clockghgpt4_fckti,composite-clockijgpt5_fckti,composite-clockklgpt6_fckti,composite-clockmngpt7_fckti,composite-clockopgpt8_fckti,composite-clockqrgpt9_fckti,composite-clockstper_32k_alwon_fckfixed-factor-clockHdper_l4_ickfixed-factor-clockIuclock@1010 ti,clkselclock-gpio6-ickti,omap3-interface-clock gpio6_icku clock-gpio5-ickti,omap3-interface-clock gpio5_icku clock-gpio4-ickti,omap3-interface-clock gpio4_icku clock-gpio3-ickti,omap3-interface-clock gpio3_icku clock-gpio2-ickti,omap3-interface-clock gpio2_icku clock-wdt3-ickti,omap3-interface-clock wdt3_icku clock-uart3-ickti,omap3-interface-clock uart3_icku clock-uart4-ickti,omap3-interface-clock uart4_icku clock-gpt9-ickti,omap3-interface-clock gpt9_icku clock-gpt8-ickti,omap3-interface-clock gpt8_icku clock-gpt7-ickti,omap3-interface-clock gpt7_icku clock-gpt6-ickti,omap3-interface-clock gpt6_icku clock-gpt5-ickti,omap3-interface-clock gpt5_icku clock-gpt4-ickti,omap3-interface-clock gpt4_icku clock-gpt3-ickti,omap3-interface-clock gpt3_icku clock-gpt2-ickti,omap3-interface-clock gpt2_icku clock-mcbsp2-ickti,omap3-interface-clock mcbsp2_icku clock-mcbsp3-ickti,omap3-interface-clock mcbsp3_icku clock-mcbsp4-ickti,omap3-interface-clock mcbsp4_icku emu_src_ckti,clkdm-gate-clockv*secure_32k_fck fixed-clockWwgpt12_fckfixed-factor-clockw wdt1_fckfixed-factor-clockwsecurity_l4_ick2fixed-factor-clockIxclock@a14 ti,clksel clock-aes1-ickti,omap3-interface-clock aes1_ickx clock-rng-ickti,omap3-interface-clockrng_ickx clock-sha11-ickti,omap3-interface-clock sha11_ickx clock-des1-ickti,omap3-interface-clock des1_ickx clock-pka-ickti,omap3-interface-clockpka_icky clock@f00 ti,clkselclock-cam-mclkti,gate-clock cam_mclkz clock-csi2-96m-fckti,gate-clock csi2_96m_fck cam_ick@f10!ti,omap3-no-wait-interface-clockI security_l3_ickfixed-factor-clockGyssi_l4_ickfixed-factor-clockI]sr_l4_ickfixed-factor-clockIdpll2_fck@40ti,divider-clock/ g@r{dpll2_ck@4ti,omap3-dpll-clock"{$@4|dpll2_m2_ck@44ti,divider-clock|gDr}iva2_ck@0ti,wait-gate-clock} clock@a18 ti,clksel clock-mad2d-ickti,omap3-interface-clock mad2d_ickG clock-usbtll-ickti,omap3-interface-clock usbtll_ick\ ssi_ssr_fck_3430es2ti,composite-clock~ssi_sst_fck_3430es2fixed-factor-clocksys_d2_ckfixed-factor-clock"Jomap_96m_d2_fckfixed-factor-clockYKomap_96m_d4_fckfixed-factor-clockYLomap_96m_d8_fckfixed-factor-clockYMomap_96m_d10_fckfixed-factor-clockY Ndpll5_m2_d4_ckfixed-factor-clockOdpll5_m2_d8_ckfixed-factor-clockPdpll5_m2_d16_ckfixed-factor-clockQdpll5_m2_d20_ckfixed-factor-clockRusim_fckti,composite-clockdpll5_ck@d04ti,omap3-dpll-clock""  $ L 4dpll5_m2_ck@d50ti,divider-clockg Prsgx_gate_fck@b00ti,composite-gate-clock/  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H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc'H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss # 2 -;[ick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma @K X`gpio@48310000ti,omap3-gpioH1gpio1ew' gpio@49050000ti,omap3-gpioIgpio2w'gpio@49052000ti,omap3-gpioI gpio3w'gpio@49054000ti,omap3-gpioI@ gpio4w'gpio@49056000ti,omap3-gpioI`!gpio5w'gpio@49058000ti,omap3-gpioI"gpio6w'serial@4806a000ti,omap3-uartH HH12Mtxrxuart1Wlserial@4806c000ti,omap3-uartHIH34Mtxrxuart2Wlwdefaultserial@49020000ti,omap3-uartIJnH56Mtxrxuart3Wlwdefaulti2c@48070000 ti,omap3-i2cH8+i2c1wdefaultW'@twl@48H  ti,twl4030'wdefaultaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' 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