8 (  )isee,omap3-igep0020ti,omap3630ti,omap3 +!7IGEPv2 Rev. C (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+ *?]zdefaultgpmc-pins uart1-pinsRLuart3-pinsnpmcbsp2-pins  mmc1-pins0mmc2-pins0(*,.02i2c1-pinsi2c3-pinstwl4030-pinsAtfp410-pinsdss-dpi-pinsuart2-pins DFHJsmsc9221-pins lbee1usjyc-pins68:scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselhclock-mcbsp5-mux-fckti,composite-mux-clockmcbsp5_mux_fck   clock-mcbsp3-mux-fckti,composite-mux-clockmcbsp3_mux_fck clock-mcbsp4-mux-fckti,composite-mux-clockmcbsp4_mux_fck  mcbsp5_fckti,composite-clock clock@4 ti,clkselclock-mcbsp1-mux-fckti,composite-mux-clockmcbsp1_mux_fck  clock-mcbsp2-mux-fckti,composite-mux-clockmcbsp2_mux_fck  mcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clockmcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ *?]twl4030-vpins-pins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss# 0>ick+ H ` aes1@0 ti,omap3-aesPK  Ptxrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss# 0>ick+ H P aes2@0 ti,omap3-aesPKABPtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockZYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock jpu#sys_clkout1@d70ti,gate-clock p dpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clock "dpll4_x2_ckfixed-factor-clock!corex2_fckfixed-factor-clock"$wkup_l4_ickfixed-factor-clock#ccorex2_d3_fckfixed-factor-clock$corex2_d5_fckfixed-factor-clock$clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockZomap_32k_fck fixed-clockZIvirt_12m_ck fixed-clockZvirt_13m_ck fixed-clockZ]@virt_19200000_ck fixed-clockZ$virt_26000000_ck fixed-clockZvirt_38_4m_ck fixed-clockZIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock## D 0!dpll4_m2_ck@d48ti,divider-clock!j? Hu%dpll4_m2x2_mul_ckfixed-factor-clock%&dpll4_m2x2_ck@d00ti,hsdiv-gate-clock&  'omap_96m_alwon_fckfixed-factor-clock'3dpll3_ck@d00ti,omap3-dpll-core-clock## @ 0clock@1140 ti,clksel@clock-dpll3-m3ti,divider-clock dpll3_m3_ck ju-clock-dpll4-m6ti,divider-clock dpll4_m6_ck! j?u?clock-emu-src-mux ti,mux-clockemu_src_mux_ck#()*wclock-pclk-fckti,divider-clock pclk_fck+ juclock-pclkx2-fckti,divider-clock pclkx2_fck+ juclock-atclk-fckti,divider-clock atclk_fck+ juclock-traceclk-src-fck ti,mux-clocktraceclk_src_fck#()* ,clock-traceclk-fckti,divider-clock traceclk_fck, judpll3_m3x2_mul_ckfixed-factor-clock-.dpll3_m3x2_ck@d00ti,hsdiv-gate-clock.  /emu_core_alwon_ckfixed-factor-clock/(sys_altclk fixed-clockZ6mcbsp_clks fixed-clockZ core_ckfixed-factor-clock 0dpll1_fck@940ti,divider-clock0 j @u1dpll1_ck@904ti,omap3-dpll-clock#1  $ @ 4dpll1_x2_ckfixed-factor-clock2dpll1_x2m2_ck@944ti,divider-clock2j DuFcm_96m_fckfixed-factor-clock34clock@d40 ti,clksel @clock-dpll3-m2ti,divider-clock dpll3_m2_ck ju clock-omap-96m-fck ti,mux-clock omap_96m_fck4# Zclock-omap-54m-fck ti,mux-clock omap_54m_fck56 Bclock-omap-48m-fck ti,mux-clock omap_48m_fck76 :clock@e40 ti,clksel@clock-dpll4-m3ti,divider-clock dpll4_m3_ck! j u8clock-dpll4-m4ti,divider-clock dpll4_m4_ck!ju;dpll4_m3x2_mul_ckfixed-factor-clock89dpll4_m3x2_ck@d00ti,hsdiv-gate-clock9  5cm_96m_d2_fckfixed-factor-clock47omap_12m_fckfixed-factor-clock:[dpll4_m4x2_mul_ckti,fixed-factor-clock;<dpll4_m4x2_ck@d00ti,gate-clock<  _dpll4_m5_ck@f40ti,divider-clock!j?@u=dpll4_m5x2_mul_ckti,fixed-factor-clock=>dpll4_m5x2_ck@d00ti,hsdiv-gate-clock>  {dpll4_m6x2_mul_ckfixed-factor-clock?@dpll4_m6x2_ck@d00ti,hsdiv-gate-clock@  Aemu_per_alwon_ckfixed-factor-clockA)clock@d70 ti,clksel pclock-clkout2-src-gate ti,composite-no-wait-gate-clockclkout2_src_gate_ck0 Dclock-clkout2-src-muxti,composite-mux-clockclkout2_src_mux_ck0#4BEclock-sys-clkout2ti,divider-clock sys_clkout2C j@clkout2_src_ckti,composite-clockDECmpu_ckfixed-factor-clockFGarm_fck@924ti,divider-clockG $jemu_mpu_alwon_ckfixed-factor-clockG*clock@a40 ti,clksel @clock-l3-ickti,divider-clockl3_ick0juHclock-l4-ickti,divider-clockl4_ickH juJclock-gpt10-mux-fckti,composite-mux-clockgpt10_mux_fckI# Wclock-gpt11-mux-fckti,composite-mux-clockgpt11_mux_fckI# Yclock-ssi-ssr-div-fck-3430es2ti,composite-divider-clockssi_ssr_div_fck_3430es2$ $clock@c40 ti,clksel @clock-rm-ickti,divider-clockrm_ickJ juclock-gpt1-mux-fckti,composite-mux-clock gpt1_mux_fckI#bclock-usim-mux-fckti,composite-mux-clock usim_mux_fck(#KLMNOPQRS uclock@a00 ti,clksel clock-gpt10-gate-fckti,composite-gate-clockgpt10_gate_fck# Vclock-gpt11-gate-fckti,composite-gate-clockgpt11_gate_fck# Xclock-mmchs2-fckti,wait-gate-clock mmchs2_fck clock-mmchs1-fckti,wait-gate-clock mmchs1_fck clock-i2c3-fckti,wait-gate-clock i2c3_fck clock-i2c2-fckti,wait-gate-clock i2c2_fck clock-i2c1-fckti,wait-gate-clock i2c1_fck clock-mcbsp5-gate-fckti,composite-gate-clockmcbsp5_gate_fck   clock-mcbsp1-gate-fckti,composite-gate-clockmcbsp1_gate_fck   clock-mcspi4-fckti,wait-gate-clock mcspi4_fckT clock-mcspi3-fckti,wait-gate-clock mcspi3_fckT clock-mcspi2-fckti,wait-gate-clock mcspi2_fckT clock-mcspi1-fckti,wait-gate-clock mcspi1_fckT clock-uart2-fckti,wait-gate-clock uart2_fckT clock-uart1-fckti,wait-gate-clock uart1_fckT clock-hdq-fckti,wait-gate-clockhdq_fckU clock-modem-fckti,omap3-interface-clock modem_fck# clock-mspro-fckti,wait-gate-clock mspro_fck clock-ssi-ssr-gate-fck-3430es2 ti,composite-no-wait-gate-clockssi_ssr_gate_fck_3430es2$ clock-mmchs3-fckti,wait-gate-clock mmchs3_fck gpt10_fckti,composite-clockVWgpt11_fckti,composite-clockXYcore_96m_fckfixed-factor-clockZcore_48m_fckfixed-factor-clock:Tcore_12m_fckfixed-factor-clock[Ucore_l3_ickfixed-factor-clockH\clock@a10 ti,clksel clock-sdrc-ickti,wait-gate-clock sdrc_ick\ clock-mmchs2-ickti,omap3-interface-clock mmchs2_ick] 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clock-des2-ickti,omap3-interface-clock des2_ick] clock-mspro-ickti,omap3-interface-clock mspro_ick] clock-mailboxes-ickti,omap3-interface-clockmailboxes_ick] clock-sad2d-ickti,omap3-interface-clock sad2d_ickH clock-hsotgusb-ick-3430es2"ti,omap3-hsotgusb-interface-clockhsotgusb_ick_3430es2\ clock-ssi-ick-3430es2ti,omap3-ssi-interface-clockssi_ick_3430es2^ clock-mmchs3-ickti,omap3-interface-clock mmchs3_ick] gpmc_fckfixed-factor-clock\core_l4_ickfixed-factor-clockJ]clock@e00 ti,clkselclock-dss-tv-fckti,gate-clock dss_tv_fckB clock-dss-96m-fckti,gate-clock dss_96m_fckZ clock-dss2-alwon-fckti,gate-clockdss2_alwon_fck# clock-dss1-alwon-fck-3430es2ti,dss-gate-clockdss1_alwon_fck_3430es2_ dummy_ck fixed-clockZclock@c00 ti,clksel clock-gpt1-gate-fckti,composite-gate-clockgpt1_gate_fck# aclock-gpio1-dbckti,gate-clock gpio1_dbck` clock-wdt2-fckti,wait-gate-clock wdt2_fck` clock-sr1-fckti,wait-gate-clocksr1_fck# clock-sr2-fckti,wait-gate-clocksr2_fck# clock-usim-gate-fckti,composite-gate-clockusim_gate_fckZ gpt1_fckti,composite-clockabwkup_32k_fckfixed-factor-clockI`clock@c10 ti,clksel clock-wdt2-ickti,omap3-interface-clock wdt2_ickc clock-wdt1-ickti,omap3-interface-clock wdt1_ickc clock-gpio1-ickti,omap3-interface-clock gpio1_ickc clock-omap-32ksync-ickti,omap3-interface-clockomap_32ksync_ickc clock-gpt12-ickti,omap3-interface-clock gpt12_ickc clock-gpt1-ickti,omap3-interface-clock gpt1_ickc clock-usim-ickti,omap3-interface-clock usim_ickc per_96m_fckfixed-factor-clock3 per_48m_fckfixed-factor-clock:dclock@1000 ti,clkselclock-uart3-fckti,wait-gate-clock uart3_fckd clock-gpt2-gate-fckti,composite-gate-clockgpt2_gate_fck# fclock-gpt3-gate-fckti,composite-gate-clockgpt3_gate_fck# hclock-gpt4-gate-fckti,composite-gate-clockgpt4_gate_fck# jclock-gpt5-gate-fckti,composite-gate-clockgpt5_gate_fck# lclock-gpt6-gate-fckti,composite-gate-clockgpt6_gate_fck# nclock-gpt7-gate-fckti,composite-gate-clockgpt7_gate_fck# pclock-gpt8-gate-fckti,composite-gate-clockgpt8_gate_fck# rclock-gpt9-gate-fckti,composite-gate-clockgpt9_gate_fck# tclock-gpio6-dbckti,gate-clock gpio6_dbcke clock-gpio5-dbckti,gate-clock gpio5_dbcke clock-gpio4-dbckti,gate-clock gpio4_dbcke clock-gpio3-dbckti,gate-clock gpio3_dbcke clock-gpio2-dbckti,gate-clock gpio2_dbcke clock-wdt3-fckti,wait-gate-clock wdt3_fcke clock-mcbsp2-gate-fckti,composite-gate-clockmcbsp2_gate_fck  clock-mcbsp3-gate-fckti,composite-gate-clockmcbsp3_gate_fck  clock-mcbsp4-gate-fckti,composite-gate-clockmcbsp4_gate_fck  clock-uart4-fckti,wait-gate-clock uart4_fckd clock@1040 ti,clksel@clock-gpt2-mux-fckti,composite-mux-clock gpt2_mux_fckI#gclock-gpt3-mux-fckti,composite-mux-clock gpt3_mux_fckI# iclock-gpt4-mux-fckti,composite-mux-clock gpt4_mux_fckI# kclock-gpt5-mux-fckti,composite-mux-clock gpt5_mux_fckI# mclock-gpt6-mux-fckti,composite-mux-clock gpt6_mux_fckI# oclock-gpt7-mux-fckti,composite-mux-clock gpt7_mux_fckI# qclock-gpt8-mux-fckti,composite-mux-clock gpt8_mux_fckI# sclock-gpt9-mux-fckti,composite-mux-clock gpt9_mux_fckI# ugpt2_fckti,composite-clockfggpt3_fckti,composite-clockhigpt4_fckti,composite-clockjkgpt5_fckti,composite-clocklmgpt6_fckti,composite-clocknogpt7_fckti,composite-clockpqgpt8_fckti,composite-clockrsgpt9_fckti,composite-clocktuper_32k_alwon_fckfixed-factor-clockIeper_l4_ickfixed-factor-clockJvclock@1010 ti,clkselclock-gpio6-ickti,omap3-interface-clock gpio6_ickv clock-gpio5-ickti,omap3-interface-clock gpio5_ickv clock-gpio4-ickti,omap3-interface-clock gpio4_ickv clock-gpio3-ickti,omap3-interface-clock gpio3_ickv clock-gpio2-ickti,omap3-interface-clock gpio2_ickv clock-wdt3-ickti,omap3-interface-clock wdt3_ickv clock-uart3-ickti,omap3-interface-clock uart3_ickv clock-uart4-ickti,omap3-interface-clock uart4_ickv clock-gpt9-ickti,omap3-interface-clock gpt9_ickv clock-gpt8-ickti,omap3-interface-clock gpt8_ickv clock-gpt7-ickti,omap3-interface-clock gpt7_ickv clock-gpt6-ickti,omap3-interface-clock gpt6_ickv clock-gpt5-ickti,omap3-interface-clock gpt5_ickv clock-gpt4-ickti,omap3-interface-clock gpt4_ickv clock-gpt3-ickti,omap3-interface-clock gpt3_ickv clock-gpt2-ickti,omap3-interface-clock gpt2_ickv clock-mcbsp2-ickti,omap3-interface-clock mcbsp2_ickv clock-mcbsp3-ickti,omap3-interface-clock mcbsp3_ickv clock-mcbsp4-ickti,omap3-interface-clock mcbsp4_ickv emu_src_ckti,clkdm-gate-clockw+secure_32k_fck fixed-clockZxgpt12_fckfixed-factor-clockxwdt1_fckfixed-factor-clockxsecurity_l4_ick2fixed-factor-clockJyclock@a14 ti,clksel clock-aes1-ickti,omap3-interface-clock aes1_icky clock-rng-ickti,omap3-interface-clockrng_icky clock-sha11-ickti,omap3-interface-clock sha11_icky clock-des1-ickti,omap3-interface-clock des1_icky clock-pka-ickti,omap3-interface-clockpka_ickz clock@f00 ti,clkselclock-cam-mclkti,gate-clock cam_mclk{ clock-csi2-96m-fckti,gate-clock csi2_96m_fck cam_ick@f10!ti,omap3-no-wait-interface-clockJ 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regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@ vdds_dsiregulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpioz*twl4030-usbti,twl4030-usb  pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad*:madcti,twl4030-madcMi2c@48072000 ti,omap3-i2cH 9+i2c2i2c@48060000 ti,omap3-i2cH=+i2c3zdefaultZ eeprom@50 ti,eepromPmailbox@48094000ti,omap3-mailboxmailboxH @_k}mbox-dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@K#$%&'()* Ptx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2 K+,-.Ptx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 KPtx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4KFGPtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1K=>Ptxrxzdefault  mmc@480b4000ti,omap3-hsmmcH @Vmmc2K/0Ptxrxzdefaultmmc@480ad000ti,omap3-hsmmcH ^mmc3KMNPtxrx disabledmmu@480bd400%ti,omap2-iommuH mmu_isp2mmu@5d000000%ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< BcommontxrxRmcbsp1K Ptxrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyss#0>ick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?BcommontxrxsidetoneRmcbsp2mcbsp2_sidetoneK!"Ptxrxfckickokayzdefaultmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZBcommontxrxsidetoneRmcbsp3mcbsp3_sidetoneKPtxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 BcommontxrxRmcbsp4KPtxrxfcka disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR BcommontxrxRmcbsp5KPtxrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1KEPrxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss#' 0>fckick+ H1rtimer@0ti,omap3430-timerfck%Itarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss#' 0>fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss#' 0>fckick+ H0@timer@0ti,omap3430-timer_usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnKPrxtx%+*zzdefault  0, nand@0,0ti,omap2-nand   7micron,mt29c4g96mazFUgbch8w,,",(6 @R-R>(P+okayonenand@0,0ti,omap2-onenand hwU``  ``r-r Z )C[P>Zw.+ disabledethernet@gpmcsmsc,lan9221smsc,lan9115r*$  *$<-6 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5!fixedregulator-mmcsdioregulator-fixedvmmcsdio_fixed2Z2Zmmc2_pwrseqmmc-pwrseq-simple " "  compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypassti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpioswp-gpiosmmc-pwrseqnon-removablestatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-wrapgpmc,burst-readgpmc,burst-writegpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-deviceti,modelti,mcbspregulator-always-onlabeldefault-stategpiostartup-delay-usreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus