,8$( SKOV IMX6 CPU QuadCore#!skov,imx6q-skov-revc-lt2fsl,imx6qchosen ,/soc/bus@2100000/serial@21e8000aliases"8/soc/bus@2100000/ethernet@2188000B/soc/bus@2000000/can@2090000G/soc/bus@2000000/can@2094000L/soc/bus@2000000/gpio@209c000R/soc/bus@2000000/gpio@20a0000X/soc/bus@2000000/gpio@20a4000^/soc/bus@2000000/gpio@20a8000d/soc/bus@2000000/gpio@20ac000j/soc/bus@2000000/gpio@20b0000p/soc/bus@2000000/gpio@20b4000v/soc/bus@2100000/i2c@21a0000{/soc/bus@2100000/i2c@21a4000/soc/bus@2100000/i2c@21a8000/soc/ipu@2400000/soc/bus@2100000/mmc@2190000/soc/bus@2100000/mmc@2194000/soc/bus@2100000/mmc@2198000/soc/bus@2100000/mmc@219c0001/soc/bus@2000000/spba-bus@2000000/serial@2020000 /soc/bus@2100000/serial@21e8000 /soc/bus@2100000/serial@21ec000 /soc/bus@2100000/serial@21f0000 /soc/bus@2100000/serial@21f4000./soc/bus@2000000/spba-bus@2000000/spi@2008000./soc/bus@2000000/spba-bus@2000000/spi@200c000./soc/bus@2000000/spba-bus@2000000/spi@2010000./soc/bus@2000000/spba-bus@2000000/spi@2014000/soc/bus@2100000/usb@2184200/soc/bus@2100000/usb@2184000/soc/bus@2100000/usb@2184400/soc/bus@2100000/usb@2184600 /soc/bus@2000000/usbphy@20c9000 /soc/bus@2000000/usbphy@20ca000/soc/ipu@2800000./soc/bus@2000000/spba-bus@2000000/spi@2018000/mdio/soc/nand-controller@112000$/soc/bus@2100000/i2c@21a8000/rtc@51/soc/bus@2000000/snvs@20cc000clocksckil !fixed-clock"/ckih1 !fixed-clock"/osc !fixed-clock"/n6ldb!fsl,imx6q-ldbfsl,imx53-ldb? Cdisabled@J!"'()*8Qdi0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0] Cdisabledport@0]endpointaqMport@1]endpointaqQport@2]endpointaqWport@3]endpointaq[lvds-channel@1] Cdisabledport@0]endpointaqNport@1]endpointaqRport@2]endpointa qXport@3]endpointa q\pmu!arm,cortex-a9-pmuy  ^usbphynop1!usb-nop-xceiv Cdisabledq5usbphynop2!usb-nop-xceiv Cdisabledq6soc !simple-busy dma-controller@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh] 0    Jjq nand-controller@112000!fsl,imx6q-gpmi-nand] @ gpmi-nandbch bch(J0Qgpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bch rx-txCokaydefault hdmi@120000] s?J{| QiahbisfrCokay!fsl,imx6q-hdmiportsport@0]endpointaqKport@1]endpointaqOport@2]endpointaqUport@3]endpointaqYgpu@130000 !vivante,gc]@  JzJQbuscoreshader,gpu@134000 !vivante,gc]@@  Jy Qbuscore,timer@a00600!arm,cortex-a9-twd-timer]   yJinterrupt-controller@a01000!arm,cortex-a9-gic;L]yqcache-controller@a02000!arm,pl310-cache]  \ao { q]pcie@1ffc000!fsl,imx6q-pcie]@ dbiconfigpci0 xmsi; { z y xJQpciepcie_buspcie_phy Cdisabledbus@2000000!fsl,aips-bussimple-bus]spba-bus@2000000!fsl,spba-bussimple-bus]spdif@2004000!fsl,imx35-spdif]@@ 4 rxtxPJkv>:Qcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba Cdisabledspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspi]@ JppQipgper rxtxCokaydefault flash@0!jedec,spi-nor7]spi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspi]@  JqqQipgper rxtxCokaydefault adc@0!microchip,mcp3002] B@qispi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspi]@ !JrrQipgper rxtx Cdisabledspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspi]@@ "JssQipgper   rxtxCokaydefault adc@0!ti,tsc2046e-adc]defaultB@ *qtchannel@1]>Ochannel@3]>Ochannel@4]>Ochannel@5]>Oserial@2020000!fsl,imx6q-uartfsl,imx21-uart]@ JQipgper rxtx Cdisabledesai@2024000b!fsl,imx35-esai]@@ 3(JvQcorememextalfsysspba rxtx Cdisabledssi@2028000b!fsl,imx6q-ssifsl,imx51-ssi]@ .J Qipgbaud %&rxtxs Cdisabledssi@202c000b!fsl,imx6q-ssifsl,imx51-ssi]@ /J Qipgbaud )*rxtxs Cdisabledssi@2030000b!fsl,imx6q-ssifsl,imx51-ssi]@ 0J Qipgbaud -.rxtxs Cdisabledasrc@2034000!fsl,imx53-asrc]@@ 2JkQmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxcCokayspba-bus@203c000]@spi@2018000 !fsl,imx6q-ecspifsl,imx51-ecspi]@ #JttQipgper   rxtx Cdisabledvpu@2040000!fsl,imx6q-vpucnm,coda960]  bitjpegJQperahbaipstz@207c000]@pwm@2080000!fsl,imx6q-pwmfsl,imx27-pwm]@ SJ>Qipgper Cdisabledpwm@2084000!fsl,imx6q-pwmfsl,imx27-pwm]@@ TJ>QipgperCokaydefaultqwpwm@2088000!fsl,imx6q-pwmfsl,imx27-pwm]@ UJ>QipgperCokaydefault qqpwm@208c000!fsl,imx6q-pwmfsl,imx27-pwm]@ VJ>Qipgper Cdisabledcan@2090000!fsl,imx6q-flexcan] @ nJlmQipgper 4Cokaydefault!"can@2094000!fsl,imx6q-flexcan] @@ oJnoQipgper 4Cokaydefault#$timer@2098000!fsl,imx6q-gptfsl,imx31-gpt] @ 7JwxQipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpio] @BCL;%%%%%%% % % %%%%%%%t qjgpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpio] @DEL;@%%7%#%,qgpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpio] @@FGL;0%E%$%-qgpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpio] @HIL;0%%~ %Wqpgpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpio] @JKL;P%U%"%5%g %gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpio] @LML;p%%6%%%% %Vqvgpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpio] @@NOL;0% % % q:keypad@20b8000!fsl,imx6q-kppfsl,imx21-kpp] @ RJ> Cdisabledwatchdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdt] @ PJ>watchdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdt] @ QJ> Cdisabledclock-controller@20c4000!fsl,imx6q-ccm] @@WX"J& Qenet_ref_pad  &qanatop@20c8000#!fsl,imx6q-anatopsysconsimple-mfd] $16q'regulator-1p1!fsl,anatop-regulator"vdd1p11B@IOau 5regulator-3p0!fsl,anatop-regulator"vdd3p01*I0au ( 3@regulator-2p5!fsl,anatop-regulator"vdd2p51"UI)0au0 +xregulator-vddcore!fsl,anatop-regulator"vddarm1 I au@p+  q^regulator-vddpu!fsl,anatop-regulator"vddpu1 I B|u@ p+  q+regulator-vddsoc!fsl,anatop-regulator"vddsoc1 I au@p+  q_tempmon!fsl,imx6q-tempmony  1^'j()vcalibtemp_gradeJusbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy]  ,J'q1usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy]  -J'q4snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfd] @q*snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp*4snvs-poweroff!syscon-poweroff*8`` Cdisabledsnvs-powerkey!fsl,sec-v4.0-pwrkey* t Cdisabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000] @ 8epit@20d4000] @@ 9reset-controller@20d8000!fsl,imx6q-srcfsl,imx51-src] @[`qgpc@20dc000!fsl,imx6q-gpc] @L; YyJ>Qipgq pgcpower-domain@0]power-domain@1]+0JzJyqiomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfd]8qmux-controller !mmio-mux8 (( q,ipu1_csi0_mux !video-mux ,port@0]endpointa-q?port@1]endpointport@2]endpointa.qHipu2_csi1_mux !video-mux ,port@0]endpointa/qBport@1]endpointport@2]endpointa0qTpinctrl@20e0000!fsl,imx6q-iomuxc]@q%can1grp0-@0Dq!can1stbygrp-0qncan2grp0-0q#can2stbygrp- 0qoecspi1grp`-Xqecspi2grp`- Xqenetgrp-XHLH<< X08q8gpminandgrph- q i2c3grp0-,@x0@xq>mdiogrp0-qkpwm2grp-$Xqpwm3grp-<$Xq switchgrp-qluart2grp0- (qGusdhc3grp-pYYpYpYpYpY@@q9vccmmcgrp-Xqrvccmmciogrp-P Xqsecspi4grp`-@Xqtouchgrp-@qbacklightgrp-h|Xquipu1grp-\p`tdxh|ptx|qyi2c2grp0-@x@xq=dcic@20e4000]@@ |dcic@20e8000]@ }dma-controller@20ec000!fsl,imx6q-sdmafsl,imx35-sdma]@ J>Qipgahb6imx/sdma/sdma-imx6q.binqbus@2100000!fsl,aips-bussimple-bus]crypto@2100000 !fsl,sec-v4.0]  JQmemaclkipgemi_slowjr@1000!fsl,sec-v4.0-job-ring] ijr@2000!fsl,sec-v4.0-job-ring]  jaipstz@217c000]@usb@2184000!fsl,imx6q-usbfsl,imx27-usb]@ +JO1Z2fwCokay3usb@2184200!fsl,imx6q-usbfsl,imx27-usb]B (JO4Z2hostfwCokay3usb@2184400!fsl,imx6q-usbfsl,imx27-usb]D )JO5hsicZ2hostfw Cdisabledusb@2184600!fsl,imx6q-usbfsl,imx27-usb]F *JO6hsicZ2hostfw Cdisabledusbmisc@2184800!fsl,imx6q-usbmisc]HJq2ethernet@2188000!fsl,imx6q-fec]@ int0ppsvw Juu Qipgahbptpenet_clk_ref 4j7 vmac-addressCokaydefault8rmiiqmfixed-linkdmlb@218c000]@$5u~mmc@2190000!fsl,imx6q-usdhc]@ J Qipgahbper Cdisabledmmc@2194000!fsl,imx6q-usdhc]@@ J Qipgahbper Cdisabledmmc@2198000!fsl,imx6q-usdhc]@ J QipgahbperCokaydefault9 : : 3BS`mz;<mmc@219c000!fsl,imx6q-usdhc]@ J Qipgahbper Cdisabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2c]@ $J} Cdisabledi2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2c]@@ %J~Cokaydefault=/qi2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2c]@ &JCokaydefault>/rtc@51 !nxp,pcf85063]Q0romcp@21ac000]@memory-controller@21b0000!fsl,imx6q-mmdc]@Jmemory-controller@21b4000!fsl,imx6q-mmdc]@@ Cdisabledweim@21b8000!fsl,imx6q-weim]@ J Cdisabledefuse@21bc000!fsl,imx6q-ocotpsyscon]@Jspeed-grade@10]q`calib@38]8q(temp-grade@20] q)mac-addr@88]q7tzasc@21d0000]@ ltzasc@21d4000]@@ maudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmux]@ Cdisabledmipi@21dc000!fsl,imx6-mipi-csi2]@deJa Qdphyrefpix Cdisabledport@1]endpointa?q-port@2]endpointa@qIport@3]endpointaAqSport@4]endpointaBq/mipi@21e0000]@ Cdisabledportsport@0]endpointaCqLport@1]endpointaDqPport@2]endpointaEqVport@3]endpointaFqZvdoa@21e4000!fsl,imx6q-vdoa]@@ Jserial@21e8000!fsl,imx6q-uartfsl,imx21-uart]@ JQipgper rxtxCokaydefaultGserial@21ec000!fsl,imx6q-uartfsl,imx21-uart]@ JQipgper rxtx Cdisabledserial@21f0000!fsl,imx6q-uartfsl,imx21-uart]@ JQipgper  rxtx Cdisabledserial@21f4000!fsl,imx6q-uartfsl,imx21-uart]@@ JQipgper !"rxtx Cdisabledipu@2400000!fsl,imx6q-ipu]@@J Qbusdi0di1port@0]qaendpointaHq.port@1]qbendpointaIq@port@2]qeendpoint@0]aJqzendpoint@1]aKqendpoint@2]aLqCendpoint@3]aMqendpoint@4]aNqport@3]qfendpoint@0]endpoint@1]aOqendpoint@2]aPqDendpoint@3]aQqendpoint@4]aRqsram@900000 !mmio-sram] Jqsata@2200000!fsl,imx6q-ahci] @ 'JiQsatasata_refahb Cdisabledgpu@2204000 !vivante,gc] @@  Jy Qbuscore,ipu@2800000!fsl,imx6q-ipu]@J Qbusdi0di1port@0]qcendpointaSqAport@1]qdendpointaTq0port@2]qgendpoint@0]endpoint@1]aUqendpoint@2]aVqEendpoint@3]aWqendpoint@4]aXq port@3]qhendpoint@1]aYqendpoint@2]aZqFendpoint@3]a[qendpoint@4]a\q cpuscpu@0!arm,cortex-a9cpu]](Otx2   (Otx2   l,(Jh)Qarmpll2_pfd2_396msteppll1_swpll1_sys^)+3_j` vspeed_gradecpu@1!arm,cortex-a9cpu]](Otx2   (Otx2   l,(Jh)Qarmpll2_pfd2_396msteppll1_swpll1_sys^)+3_cpu@2!arm,cortex-a9cpu]](Otx2   (Otx2   l,(Jh)Qarmpll2_pfd2_396msteppll1_swpll1_sys^)+3_cpu@3!arm,cortex-a9cpu]](Otx2   (Otx2   l,(Jh)Qarmpll2_pfd2_396msteppll1_swpll1_sys^)+3_capture-subsystem!fsl,imx-capture-subsystem>abcddisplay-subsystem!fsl,imx-display-subsystem>efghiio-hwmon !iio-hwmonDiileds !gpio-ledsled-0PD1 jVstatus_on mheartbeatled-1PD2 j_offled-2PD3 j_onmdio!microchip,mdio-smi0defaultkjjswitch@0!microchip,ksz8873defaultly j]portsports@0] internalPlan1ports@1] internalPlan2ports@2]Pcpumrmiifixed-linkdphy-clock !fixed-clock"/ enet_ref_padq&regulator-3v3!regulator-fixed3"3v312ZI2Zqregulator-5v0!regulator-fixed"5v01LK@ILK@q3regulator-24v0!regulator-fixed"24v01n6In6qxregulator-can1-stby!regulator-fixeddefaultn "can1-3v312ZI2Z q"regulator-can2-stby!regulator-fixeddefaulto "can2-3v312ZI2Z p q$regulator-tft-vcom!pwm-regulatorqN  "tft_vcom16I6a6regulator-vcc-mmc!regulator-fixeddefaultr"mmc_vcc_supply12ZI2Za :dq;regulator-vcc-mmc-io!regulator-gpiodefaults3"mmc_io_supply voltage1w@I2Z :  w@2Zdq<touchscreen!resistive-adc-touch Dtttt $yz1z2x 5 N e },  backlight!pwm-backlightdefaultu vwN    xq|display!fsl,imx-parallel-displaydefaultyport@0]endpointazqJport@1]endpointa{q}panel!logictechno,lttd800480070-l2rt |portendpointa}q{ #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usb0usb1usb2usb3usbphy0usbphy1ipu1spi4mdio-gpio0nandrtc0rtc1#clock-cellsclock-frequencygprstatusclocksclock-namesregremote-endpointphandleinterrupt-parentinterrupts#phy-cellsranges#dma-cellsdma-channelsreg-namesinterrupt-namesdmasdma-namespinctrl-namespinctrl-0nand-on-flash-bbtddc-i2c-buspower-domains#cooling-cells#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridedevice_typebus-rangenum-lanesinterrupt-map-maskinterrupt-mapcs-gpiosspi-max-frequencyvref-supply#io-channel-cellsinterrupts-extendedsettling-time-usoversampling-ratio#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsfsl,stop-modexceiver-supplygpio-controller#gpio-cellsgpio-rangesassigned-clocksassigned-clock-parentsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonnvmem-cellsnvmem-cell-names#thermal-sensor-cellsfsl,anatopregmapvaluelinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_modephy_type#index-cellsphy-modephy-supplyspeedfull-duplexbus-widthwp-gpioscd-gpioscap-power-off-cardfull-pwr-cyclecap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50mmc-ddr-1_8vvmmc-supplyvqmmc-supplyquartz-load-femtofaradsfsl,weim-cs-gprnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportsio-channelslabelfunctiondefault-statelinux,default-triggerinterruptreset-gpiosethernetclock-output-namesvin-supplygpiopwmsvoltage-tableregulator-boot-onenable-active-highstartup-delay-usregulator-typestatesio-channel-namestouchscreen-min-pressuretouchscreen-inverted-ytouchscreen-swapped-x-ytouchscreen-x-plate-ohmstouchscreen-y-plate-ohmsenable-gpiosbrightness-levelsnum-interpolated-stepsdefault-brightness-levelbacklight