I38FX(F 5samsung,xyref5260samsung,exynos5260samsung,exynos5 +,7Samsung XYREF5260 board based on Exynos5260aliases=/soc/i2c@12da0000B/soc/i2c@12db0000G/soc/i2c@12dc0000L/soc/i2c@12dd0000Q/soc/pinctrl@11600000Z/soc/pinctrl@12290000c/soc/pinctrl@128b0000l/soc/serial@12c00000t/soc/serial@12c10000|/soc/serial@12c20000/soc/serial@12860000/soc/mmc@12140000/soc/mmc@12160000cpus+cpu-mapcluster0core0core1cluster1core0core1core2core3cpu@0cpuarm,cortex-a15cpu@1cpuarm,cortex-a15cpu@100cpuarm,cortex-a7 cpu@101cpuarm,cortex-a7 cpu@102cpuarm,cortex-a7 cpu@103cpuarm,cortex-a7 soc simple-bus+clock-controller@10010000samsung,exynos5260-clock-top   1fin_plldout_mem_plldout_bus_plldout_media_pllclock-controller@10200000samsung,exynos5260-clock-peri T  `Z\[XV]_fin_pllioclk_pcm_extclkioclk_i2s_cdclkioclk_spdif_extclkphyclk_hdmi_phy_ref_ckodout_aclk_peri_66dout_sclk_peri_uart0dout_sclk_peri_uart1dout_sclk_peri_uart2dout_sclk_peri_spi0_bdout_sclk_peri_spi1_bdout_sclk_peri_spi2_bdout_aclk_peri_audclock-controller@10600000samsung,exynos5260-clock-egl` fin_plldout_bus_pllclock-controller@10700000samsung,exynos5260-clock-kfcp fin_plldout_media_pllclock-controller@10a00000samsung,exynos5260-clock-g2d 9fin_plldout_aclk_g2d_333clock-controller@10ce0000samsung,exynos5260-clock-mif fin_pll clock-controller@11090000samsung,exynos5260-clock-mfc  8fin_plldout_aclk_mfc_333clock-controller@11830000samsung,exynos5260-clock-g3d fin_pllclock-controller@122e0000samsung,exynos5260-clock-fsys. dfin_pllphyclk_usbhost20_phy_phyclockphyclk_usbhost20_phy_freeclkphyclk_usbhost20_phy_clk48mohciphyclk_usbdrd30_udrd30_pipe_pclkphyclk_usbdrd30_udrd30_phyclockdout_aclk_fsys_200clock-controller@128c0000samsung,exynos5260-clock-aud  6fin_pllfout_aud_pllioclk_i2s_cdclkioclk_pcm_extclkclock-controller@133c0000samsung,exynos5260-clock-isp< CB$Afin_plldout_aclk_isp1_266dout_aclk_isp1_400mout_aclk_isp1_266clock-controller@13f00000samsung,exynos5260-clock-gscl >?.fin_plldout_aclk_gscl_400dout_aclk_gscl_333clock-controller@14550000samsung,exynos5260-clock-dispU\ _LKMfin_pllphyclk_dptx_phy_ch3_txd_clkphyclk_dptx_phy_ch2_txd_clkphyclk_dptx_phy_ch1_txd_clkphyclk_dptx_phy_ch0_txd_clkphyclk_hdmi_phy_tmds_clkophyclk_hdmi_phy_ref_clkophyclk_hdmi_phy_pixel_clkophyclk_hdmi_link_o_tmds_clkhiphyclk_mipi_dphy_4l_m_txbyte_clkhsphyclk_dptx_phy_o_ref_clk_24mphyclk_dptx_phy_clk_div2phyclk_mipi_dphy_4l_m_rxclkesc0phyclk_hdmi_phy_ref_ckoioclk_spdif_extclkdout_aclk_peri_auddout_aclk_disp_222dout_sclk_disp_pixeldout_aclk_disp_333interrupt-controller@10481000arm,gic-400arm,cortex-a15-gic HH H@ H`   chipid@10000000samsung,exynos4210-chipidtimer@100b0000.samsung,exynos5260-mctsamsung,exynos4210-mct    fin_pllmcthijkz{|}~cci@10f00000 arm,cci-400+ `slave-if@4000arm,cci-400-ctrl-iface@ slave-if@5000arm,cci-400-ctrl-ifacePpinctrl@11600000samsung,exynos5260-pinctrl` Owakeup-interrupt-controllersamsung,exynos4210-wakeup-eint  0gpa0-gpio-bank*:gpa1-gpio-bank*:gpa2-gpio-bank*:gpb0-gpio-bank*:gpb1-gpio-bank*:gpb2-gpio-bank*:gpb3-gpio-bank*:gpb4-gpio-bank*:gpb5-gpio-bank*:gpd0-gpio-bank*:gpd1-gpio-bank*:gpd2-gpio-bank*:gpe0-gpio-bank*:gpe1-gpio-bank*:gpf0-gpio-bank*:gpf1-gpio-bank*:gpk0-gpio-bank*:gpx0-gpio-bank*:` !"#$%&'gpx1-gpio-bank*:`()*+,-./gpx2-gpio-bank*:gpx3-gpio-bank*:uart0-data-pinsFgpa0-0gpa0-1Shxuart0-fctl-pinsFgpa0-2gpa0-3Shxuart1-data-pinsFgpa1-0gpa1-1Shxuart1-fctl-pinsFgpa1-2gpa1-3Shxuart2-data-pinsFgpa1-4gpa1-5Shxspi0-bus-pinsFgpa2-0gpa2-2gpa2-3Shxspi1-bus-pinsFgpa2-4gpa2-6gpa2-7Shxusb3-vbus0-en-pinsFgpa2-4Shxi2s1-bus-pins#Fgpb0-0gpb0-1gpb0-2gpb0-3gpb0-4Shxpcm1-bus-pins#Fgpb0-0gpb0-1gpb0-2gpb0-3gpb0-4Shxspdif1-bus-pinsFgpb0-0gpb0-1gpb0-2Shxspi2-bus-pinsFgpb1-0gpb1-2gpb1-3Shxi2c0-hs-bus-pinsFgpb3-0gpb3-1Shxi2c1-hs-bus-pinsFgpb3-2gpb3-3Shxi2c2-hs-bus-pinsFgpb3-4gpb3-5Shx i2c3-hs-bus-pinsFgpb3-6gpb3-7Shx!i2c4-bus-pinsFgpb4-0gpb4-1Shxi2c5-bus-pinsFgpb4-2gpb4-3Shxi2c6-bus-pinsFgpb4-4gpb4-5Shxi2c7-bus-pinsFgpb4-6gpb4-7Shxi2c8-bus-pinsFgpb5-0gpb5-1Shxi2c9-bus-pinsFgpb5-2gpb5-3Shxi2c10-bus-pinsFgpb5-4gpb5-5Shxi2c11-bus-pinsFgpb5-6gpb5-7Shxcam-gpio-a-pinsFFgpe0-0gpe0-1gpe0-2gpe0-3gpe0-4gpe0-5gpe0-6gpe0-7gpe1-0gpe1-1Shxcam-gpio-b-pins8Fgpf0-0gpf0-1gpf0-2gpf0-3gpf1-0gpf1-1gpf1-2gpf1-3Shxcam-i2c1-bus-pinsFgpf0-2gpf0-3Shxcam-i2c0-bus-pinsFgpf0-0gpf0-1Shxcam-spi0-bus-pinsFgpf1-0gpf1-1gpf1-2gpf1-3Shxcam-spi1-bus-pinsFgpf1-4gpf1-5gpf1-6gpf1-7Shxhdmi-hpd-irq-pinsFgpx3-7Shxpinctrl@12290000samsung,exynos5260-pinctrl) gpc0-gpio-bank*:gpc1-gpio-bank*:gpc2-gpio-bank*:gpc3-gpio-bank*:gpc4-gpio-bank*:sd0-clk-pinsFgpc0-0Shxsd0-cmd-pinsFgpc0-1Shxsd0-bus-width1-pinsFgpc0-2Shxsd0-bus-width4-pinsFgpc0-3gpc0-4gpc0-5Shxsd0-bus-width8-pinsFgpc3-0gpc3-1gpc3-2gpc3-3Shxsd0-rdqs-pinsFgpc0-6Shxsd1-clk-pinsFgpc1-0Shxsd1-cmd-pinsFgpc1-1Shxsd1-bus-width1-pinsFgpc1-2Shxsd1-bus-width4-pinsFgpc1-3gpc1-4gpc1-5Shxsd1-bus-width8-pinsFgpc4-0gpc4-1gpc4-2gpc4-3Shxsd2-clk-pinsFgpc2-0Shxsd2-cmd-pinsFgpc2-1Shxsd2-cd-pinsFgpc2-2Shxsd2-bus-width1-pinsFgpc2-3Shxsd2-bus-width4-pinsFgpc2-4gpc2-5gpc2-6Shxpinctrl@128b0000samsung,exynos5260-pinctrl gpz0-gpio-bank*:gpz1-gpio-bank*:system-controller@10d50000samsung,exynos5260-pmusysconserial@12c00000samsung,exynos4210-uart <uartclk_uart_baud0okayserial@12c10000samsung,exynos4210-uart ;uartclk_uart_baud0okayserial@12c20000samsung,exynos4210-uart :uartclk_uart_baud0okayserial@12860000samsung,exynos4210-uart  uartclk_uart_baud0okaymmc@12140000samsung,exynos5250-dw-mshc  +lbiuciu!l /@okay 8Sndefault|mmc@12150000samsung,exynos5250-dw-mshc  + kbiuciu"k /@ disabledmmc@12160000samsung,exynos5250-dw-mshc  + jbiuciu #j  /@okay 8Sndefault|i2c@12da0000samsung,exynos5260-hsi2c l+ndefault| hsi2c disabledi2c@12db0000samsung,exynos5260-hsi2c m+ndefault| hsi2c disabledi2c@12dc0000samsung,exynos5260-hsi2c n+ndefault|  hsi2c disabledi2c@12dd0000samsung,exynos5260-hsi2c o+ndefault|!hsi2c disabledmemory@20000000memory chosenserial2:115200n8xxti fixed-clockn6fin_pll clock-pcm-ext fixed-clock@ioclk_pcm_extclk clock-i2s-cd fixed-clockioclk_i2s_cdclk clock-spdif-ext fixed-clockioclk_spdif_extclkxrtcxti fixed-clockxrtcxti compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3pinctrl0pinctrl1pinctrl2serial0serial1serial2serial3mmc0mmc1cpudevice_typeregcci-control-portphandleranges#clock-cellsclocksclock-names#interrupt-cellsinterrupt-controllerinterruptsinterface-typegpio-controller#gpio-cellssamsung,pinssamsung,pin-functionsamsung,pin-pudsamsung,pin-drvstatusassigned-clocksassigned-clock-parentsassigned-clock-ratesfifo-depthbroken-cdcap-mmc-highspeedmmc-hs200-1_8vcard-detect-delaymmc-ddr-1_8vsamsung,dw-mshc-ciu-divsamsung,dw-mshc-sdr-timingsamsung,dw-mshc-ddr-timingpinctrl-namespinctrl-0bus-widthcap-sd-highspeeddisable-wpstdout-pathclock-frequencyclock-output-names