8( radxa,rock-5brockchip,rk3588 +7Radxa ROCK 5 Model Bcpus+cpu-mapcluster0core0=core1=core2=core3=cluster1core0=core1=cluster2core0=core1= cpu@0Acpuarm,cortex-a55MQpsci_r y 0, @@ 1@ Kcpu@100Acpuarm,cortex-a55MQpsci_r  @@1@ Kcpu@200Acpuarm,cortex-a55MQpsci_r  @@1@ Kcpu@300Acpuarm,cortex-a55MQpsci_r  @@1@ Kcpu@400Acpuarm,cortex-a76MQpsci_r y 0, @@1@Kcpu@500Acpuarm,cortex-a76MQpsci_r  @@1@Kcpu@600Acpuarm,cortex-a76MQpsci_r y 0, @@1@Kcpu@700Acpuarm,cortex-a76MQpsci_r  @@1@K idle-statesSpscicpu-sleeparm,idle-state`qdxK l2-cache-l0cache@K l2-cache-l1cache@Kl2-cache-l2cache@Kl2-cache-l3cache@Kl2-cache-b0cache@Kl2-cache-b1cache@Kl2-cache-b2cache@Kl2-cache-b3cache@Kl3-cachecache0@Kfirmwareopteelinaro,optee-tzXsmcscmi arm,scmi-smcԂ+protocol@14MK protocol@16Mpmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0Xsmcclock-0 fixed-clock )׫splltimerarm,armv8-timerP    %-sec-physphysvirthyp-physhyp-virtclock-1 fixed-clock n6xin24mclock-2 fixed-clock xin32ksram@10f000 mmio-sramM=+sram@0arm,scmi-shmemMKusb@fc800000"rockchip,rk3588-ehcigeneric-ehciMrDIusbSaokayusb@fc840000"rockchip,rk3588-ohcigeneric-ohciMrDIusbSaokayusb@fc880000"rockchip,rk3588-ehcigeneric-ehciMrD IusbSaokayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohciMrD IusbSaokaysyscon@fd58c000rockchip,rk3588-sys-grfsysconMXK`syscon@fd5b0000rockchip,rk3588-php-grfsysconM[K#syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsysconM[Ksyscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsysconM\@Ksyscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdM]@+usb2-phy@8000rockchip,rk3588-usb2phyMhoophyapbr{phyclk usb480m_phy2aokayKhost-portaokay!Ksyscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdM]@+usb2-phy@c000rockchip,rk3588-usb2phyMhp ophyapbr{phyclk usb480m_phy3aokayKhost-portaokay"K syscon@fd5f0000rockchip,rk3588-iocsysconM_Ksram@fd600000 mmio-sramM`=`+clock-controller@fd7c0000rockchip,rk3588-cruM|y]q@A.2Fq)׫ׄe/ׄ eZ р #Ki2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2cM=rts {i2cpclk$default+aokayregulator@42rockchip,rk8602MBvdd_cpu_big0_s0dp,DY!Kregulator-state-memdregulator@43 rockchip,rk8603rockchip,rk8602MCvdd_cpu_big1_s0dp,DY!Kregulator-state-memdserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartMKr{baudclkapb_pclk}%%txrx&default adisabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwmMr {pwmpclk'default adisabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwmMr {pwmpclk(defaultaokayKpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwmM r {pwmpclk)default adisabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwmM0r {pwmpclk*default adisabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfdMpower-controller!rockchip,rk3588-power-controller+aokayKpower-domain@8M+power-domain@9M  r!#" +,-+power-domain@10M r!#".power-domain@11M r!#"/power-domain@12M r0123power-domain@13M +power-domain@14M(r4power-domain@15M r5power-domain@16Mr 678+power-domain@17M r 9:;power-domain@21Mr <=>?@ABC+power-domain@23MrCADpower-domain@14M r4power-domain@15Mr5power-domain@22MrEpower-domain@24Mr[Z]FG+power-domain@25M8rZHpower-domain@26M8rQIJpower-domain@27M0rKLMN+power-domain@28M rOPpower-domain@29M(rQRpower-domain@30Mrz{Spower-domain@31M8rWTUVWpower-domain@33M!rWZ[power-domain@34M"rWZ[power-domain@37M%r2Xpower-domain@38M&r45power-domain@40M(Yi2s@fddc0000rockchip,rk3588-i2s-tdmMr{mclk_txmclk_rxhclky}ZtxShotx-m adisabledi2s@fddf0000rockchip,rk3588-i2s-tdmMr445{mclk_txmclk_rxhclky1}ZtxShotx-m adisabledi2s@fddfc000rockchip,rk3588-i2s-tdmMr00,{mclk_txmclk_rxhclky-}ZrxShorx-m adisabledqos@fdf35000rockchip,rk3588-qossysconMP K0qos@fdf35200rockchip,rk3588-qossysconMR K1qos@fdf35400rockchip,rk3588-qossysconMT K2qos@fdf35600rockchip,rk3588-qossysconMV K3qos@fdf36000rockchip,rk3588-qossysconM` KSqos@fdf39000rockchip,rk3588-qossysconM KXqos@fdf3d800rockchip,rk3588-qossysconM KYqos@fdf3e000rockchip,rk3588-qossysconM KUqos@fdf3e200rockchip,rk3588-qossysconM KTqos@fdf3e400rockchip,rk3588-qossysconM KVqos@fdf3e600rockchip,rk3588-qossysconM KWqos@fdf40000rockchip,rk3588-qossysconM KQqos@fdf40200rockchip,rk3588-qossysconM KRqos@fdf40400rockchip,rk3588-qossysconM KKqos@fdf40500rockchip,rk3588-qossysconM KLqos@fdf40600rockchip,rk3588-qossysconM KMqos@fdf40800rockchip,rk3588-qossysconM KNqos@fdf41000rockchip,rk3588-qossysconM KOqos@fdf41100rockchip,rk3588-qossysconM KPqos@fdf60000rockchip,rk3588-qossysconM K6qos@fdf60200rockchip,rk3588-qossysconM K7qos@fdf60400rockchip,rk3588-qossysconM K8qos@fdf61000rockchip,rk3588-qossysconM K9qos@fdf61200rockchip,rk3588-qossysconM K:qos@fdf61400rockchip,rk3588-qossysconM K;qos@fdf62000rockchip,rk3588-qossysconM K4qos@fdf63000rockchip,rk3588-qossysconM0 K5qos@fdf64000rockchip,rk3588-qossysconM@ KDqos@fdf66000rockchip,rk3588-qossysconM` K<qos@fdf66200rockchip,rk3588-qossysconMb K=qos@fdf66400rockchip,rk3588-qossysconMd K>qos@fdf66600rockchip,rk3588-qossysconMf K?qos@fdf66800rockchip,rk3588-qossysconMh K@qos@fdf66a00rockchip,rk3588-qossysconMj KAqos@fdf66c00rockchip,rk3588-qossysconMl KBqos@fdf66e00rockchip,rk3588-qossysconMn KCqos@fdf67000rockchip,rk3588-qossysconMp KEqos@fdf67200rockchip,rk3588-qossysconMr qos@fdf70000rockchip,rk3588-qossysconM K.qos@fdf71000rockchip,rk3588-qossysconM K/qos@fdf72000rockchip,rk3588-qossysconM K+qos@fdf72200rockchip,rk3588-qossysconM" K,qos@fdf72400rockchip,rk3588-qossysconM$ K-qos@fdf80000rockchip,rk3588-qossysconM KHqos@fdf81000rockchip,rk3588-qossysconM KIqos@fdf81200rockchip,rk3588-qossysconM KJqos@fdf82000rockchip,rk3588-qossysconM KFqos@fdf82200rockchip,rk3588-qossysconM" KGpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?0rCH>MR){aclk_mstaclk_slvaclk_dbipclkauxpipeApciP-syspmcmsglegacyerr `[[[[->M0\0UD] Ipcie-phyS"T= @ @0M @@_dbiapbconfigh). opwrpipe+ adisabledlegacy-interrupt-controlleri K[pcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O0rDI?NSs){aclk_mstaclk_slvaclk_dbipclkauxpipeApciP-syspmcmsglegacyerr `^^^^->M@\@UD_ Ipcie-phyS"T= @ @0M A@_dbiapbconfigh*/ opwrpipe+ adisabledlegacy-interrupt-controlleri K^ethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20aM -macirqeth_wake_irq(r67Y^50{stmmacethclk_mac_refpclk_macaclk_macptp_refS!h$ ostmmaceth`~#abc adisabledmdiosnps,dwmac-mdio+stmmac-axi-configKarx-queues-config Kbqueue0queue1tx-queues-configKcqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahciM!(rb_eTo{satapmaliverxoobrefasic5+ adisabledsata-port@0MG@D_ Isata-phyT c sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahciM#(rdagVq{satapmaliverxoobrefasic5+ adisabledsata-port@0MG@D] Isata-phyT c mmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshcM,@ r  {biuciuciu-driveciu-sampler} defaultdefgS(aokay hijmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshcM-@ r{biuciuciu-driveciu-sampler} defaultkS% adisabledmmc@fe2e0000rockchip,rk3588-dwcmshcM.y-., n6 (r,*+-.{corebusaxiblocktimer} lmnopdefault(hocorebusaxiblocktimeraokay%i2s@fe470000rockchip,rk3588-i2s-tdmMGr+/({mclk_txmclk_rxhclky)-}%%txrxS&h*+ otx-mrx-m?defaultqrstuaokayportKendpointZi2semvKi2s@fe480000rockchip,rk3588-i2s-tdmMHry}u{mclk_txmclk_rxhclk}%%txrxh^_ otx-mrx-m?default(wxyz{|}~ adisabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sMIr{i2s_clki2s_hclky}txrxS&?default adisabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sMJr%{i2s_clki2s_hclky"}txrxS&?default adisabledinterrupt-controller@fe600000 arm,gic-v3 M`h i}a8=+Kmsi-controller@fe640000arm,gic-v3-itsMdK\msi-controller@fe660000arm,gic-v3-itsMfKppi-partitionsinterrupt-partition-0Kinterrupt-partition-1 Kdma-controller@fea10000arm,pl330arm,primecellM@ VWrn {apb_pclkK%dma-controller@fea30000arm,pl330arm,primecellM@ XYro {apb_pclkKi2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2cMr{ {i2cpclk>default+ adisabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2cMr| {i2cpclk?default+ adisabledi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2cMr} {i2cpclk@default+ adisabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2cMr~ {i2cpclkAdefault+ adisabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2cMr {i2cpclkBdefault+ adisabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timerM !rTW {pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdtMrdc {tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiMFr{spiclkapb_pclk}%%txrx default+ adisabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiMGr{spiclkapb_pclk}%%txrx default+ adisabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiMHr{spiclkapb_pclk}txrxdefault+aokayy pmic@0rockchip,rk806B@M hdefault!!!! !,!8!D!P!\!iv!!dvs1-null-pinsgpio_pwrctrl2 pin_fun0Kdvs2-null-pinsgpio_pwrctrl2 pin_fun0Kdvs3-null-pinsgpio_pwrctrl3 pin_fun0Kregulatorsdcdc-reg1dp,~D0 vdd_gpu_s0regulator-state-memddcdc-reg2dp,~D0vdd_cpu_lit_s0K regulator-state-memddcdc-reg3 L, qD0 vdd_log_s0regulator-state-memd qdcdc-reg4dp,~D0 vdd_vdenc_s0regulator-state-memddcdc-reg5 L, D0 vdd_ddr_s0regulator-state-memd Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7,D0vdd_2v0_pldo_s3Kregulator-state-mem dcdc-reg82Z,2Z vcc_3v3_s3Kiregulator-state-mem 2Zdcdc-reg9 vddq_ddr_s0regulator-state-memddcdc-reg10w@,w@ vcc_1v8_s3regulator-state-mem w@pldo-reg1w@,w@ avcc_1v8_s0Kregulator-state-memdpldo-reg2w@,w@ vcc_1v8_s0regulator-state-memdw@pldo-reg3O,O avdd_1v2_s0regulator-state-memdpldo-reg42Z,2ZD0 vcc_3v3_s0regulator-state-memdpldo-reg5w@,2ZD0 vccio_sd_s0Kjregulator-state-memdpldo-reg6w@,w@ pldo6_s3regulator-state-mem w@nldo-reg1 q, q vdd_0v75_s3regulator-state-mem  qnldo-reg2 P, Pvdd_ddr_pll_s0regulator-state-memd Pnldo-reg3 q, q avdd_0v75_s0regulator-state-memdnldo-reg4 P, P vdd_0v85_s0regulator-state-memdnldo-reg5 q, q vdd_0v75_s0regulator-state-memdspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiMIr{spiclkapb_pclk}txrx default+ adisabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartMLr{baudclkapb_pclk}%% txrxdefault adisabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartMMr{baudclkapb_pclk}% % txrxdefaultaokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartMNr{baudclkapb_pclk}% % txrxdefault adisabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartMOr{baudclkapb_pclk} txrxdefault adisabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartMPr{baudclkapb_pclk} txrxdefault adisabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartMQr{baudclkapb_pclk} txrxdefault adisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartMRr{baudclkapb_pclk}ZZtxrxdefault adisabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartMSr{baudclkapb_pclk}Z Z txrxdefault adisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartMTr{baudclkapb_pclk}Z Z txrxdefault adisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmMrLK {pwmpclkdefault adisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmMrLK {pwmpclkdefault adisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmM rLK {pwmpclkdefault adisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmM0rLK {pwmpclkdefault adisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmMrON {pwmpclkdefault adisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmMrON {pwmpclkdefault adisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmM rON {pwmpclkdefault adisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmM0rON {pwmpclkdefault adisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmMrRQ {pwmpclkdefault adisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmMrRQ {pwmpclkdefault adisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmM rRQ {pwmpclkdefault adisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmM0rRQ {pwmpclkdefault adisabledtsadc@fec00000rockchip,rk3588-tsadcMr{tsadcapb_pclkyhVWotsadc-apbtsadc#:Ql gpiootpoutv adisabledadc@fec10000rockchip,rk3588-saradcMr{saradcapb_pclkhU osaradc-apbaokayi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cMr {i2cpclkCdefault+aokayrtc@51haoyu,hym8563MQhym8563default hi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cMr {i2cpclkDdefault+aokayaudio-codec@11everest,es8316Mr1{mclky1portendpointmKvi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cMr {i2cpclkEdefault+ adisabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiMJr{spiclkapb_pclk}Z Ztxrx default+ adisabledefuse@fecc0000rockchip,rk3588-otpM r{otpapb_pclkphyarbh ootpapbarb+cpu-code@2Mid@7Mcpu-leakage@17Mcpu-leakage@18Mcpu-leakage@19Mlog-leakage@1aMgpu-leakage@1bMcpu-version@1cMnpu-leakage@28M(codec-leakage@29M)dma-controller@fed10000arm,pl330arm,primecellM@ Z[rp {apb_pclkKZphy@fee00000rockchip,rk3588-naneng-combphyMrvW {refapbpipeyh<Cophyapb# adisabledK_phy@fee20000rockchip,rk3588-naneng-combphyMrxW {refapbpipeyh>Eophyapb# adisabledK]sram@ff001000 mmio-sramM=+pinctrlrockchip,rk3588-pinctrl=+Kgpio@fd8a0000rockchip,gpio-bankMrqr iKhgpio@fec20000rockchip,gpio-bankMrst iKgpio@fec30000rockchip,gpio-bankMruv@ igpio@fec40000rockchip,gpio-bankMrwx` igpio@fec50000rockchip,gpio-bankMryz iKpcfg-pull-upKpcfg-pull-downKpcfg-pull-none Kpcfg-pull-none-drv-level-2  Kpcfg-pull-up-drv-level-1 Kpcfg-pull-up-drv-level-2 Kpcfg-pull-none-smt  )Kauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout >Klemmc-bus8 >Kmemmc-clk >Knemmc-cmd >Koemmc-data-strobe >Kpeth1fspigmac1gpuhdmii2c0i2c0m2-xfer >K$i2c1i2c1m0-xfer >  Ki2c2i2c2m0-xfer >  Ki2c3i2c3m0-xfer >  Ki2c4i2c4m0-xfer >  Ki2c5i2c5m0-xfer >  Ki2c6i2c6m0-xfer >  Ki2c7i2c7m0-xfer >  Ki2c8i2c8m0-xfer >  Ki2s0i2s0-lrck >Kqi2s0-mclk >Kri2s0-sclk >Ksi2s0-sdi0 >Kti2s0-sdo0 >Kui2s1i2s1m0-lrck >Kwi2s1m0-sclk >Kxi2s1m0-sdi0 >Kyi2s1m0-sdi1 >Kzi2s1m0-sdi2 >K{i2s1m0-sdi3 >K|i2s1m0-sdo0 > K}i2s1m0-sdo1 > K~i2s1m0-sdo2 > Ki2s1m0-sdo3 > Ki2s2i2s2m1-lrck >Ki2s2m1-sclk > Ki2s2m1-sdi > Ki2s2m1-sdo > Ki2s3i2s3-lrck >Ki2s3-sclk >Ki2s3-sdi >Ki2s3-sdo >Kjtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp >Kpmupwm0pwm0m0-pins >K'pwm1pwm1m0-pins >K(pwm2pwm2m0-pins >K)pwm3pwm3m0-pins >K*pwm4pwm4m0-pins > Kpwm5pwm5m0-pins > Kpwm6pwm6m0-pins > Kpwm7pwm7m0-pins > Kpwm8pwm8m0-pins > Kpwm9pwm9m0-pins > Kpwm10pwm10m0-pins > Kpwm11pwm11m0-pins > Kpwm12pwm12m0-pins > Kpwm13pwm13m0-pins > Kpwm14pwm14m0-pins > Kpwm15pwm15m0-pins > Krefclksatasata0sata1sata2sdiosdiom1-pins` >Kksdmmcsdmmc-bus4@ >Kgsdmmc-clk >Kdsdmmc-cmd >Kesdmmc-det >Kfspdif0spdif1spi0spi0m0-pins0 >Kspi0m0-cs0 >Kspi0m0-cs1 >Kspi1spi1m1-pins0 >Kspi1m1-cs0 >Kspi1m1-cs1 >Kspi2spi2m2-pins0 > Kspi2m2-cs0 > Kspi3spi3m1-pins0 > Kspi3m1-cs0 >Kspi3m1-cs1 >Kspi4spi4m0-pins0 >Kspi4m0-cs0 >Kspi4m0-cs1 >Ktsadctsadc-shut >Kuart0uart0m1-xfer > K&uart1uart1m1-xfer >  Kuart2uart2m0-xfer > Kuart3uart3m1-xfer >  Kuart4uart4m1-xfer >  Kuart5uart5m1-xfer >  Kuart6uart6m1-xfer >  Kuart7uart7m1-xfer >  Kuart8uart8m1-xfer >  Kuart9uart9m1-xfer >  Kvopbt656gpio-functsadc-gpio-func >Keth0gmac0hym8563hym8563-int >Ksoundhp-detect >Kusbvcc5v0-host-en >Ksyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsysconM[Ksyscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsysconM\Ki2s@fddc8000rockchip,rk3588-i2s-tdmM܀r{mclk_txmclk_rxhclky}ZtxShotx-m adisabledi2s@fddf4000rockchip,rk3588-i2s-tdmM@r99?{mclk_txmclk_rxhclky6}ZtxShotx-m adisabledi2s@fddf8000rockchip,rk3588-i2s-tdmM߀r++'{mclk_txmclk_rxhclky(}ZrxShorx-m adisabledi2s@fde00000rockchip,rk3588-i2s-tdmMr&&"{mclk_txmclk_rxhclky#}ZrxShorx-m adisabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+0r@E;JOt){aclk_mstaclk_slvaclk_dbipclkauxpipeApciP-syspmcmsglegacyerr `->MUD Ipcie-phyS"T= @ @0M @@_dbiapbconfigh&+ opwrpipe adisabledlegacy-interrupt-controlleri Kpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+0rAF<KPu){aclk_mstaclk_slvaclk_dbipclkauxpipeApciP-syspmcmsglegacyerr `->MUD Ipcie-phyS"T= @ @@0M @@@_dbiapbconfigh', opwrpipe adisabledlegacy-interrupt-controlleri Kpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /0rBG=LQ){aclk_mstaclk_slvaclk_dbipclkauxpipeApciP-syspmcmsglegacyerr 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MIC2Mic JackHeadphonesHPOLHeadphonesHPOR  defaultpwm-fanpwm-fan _ ! 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