8( ڐ ',friendlyarm,nanopi-r5srockchip,rk35687FriendlyElec NanoPi R5Saliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe310000/ethernet@fe2a0000cpus cpu@0cpu,arm,cortex-a55psci%9D cpu@100cpu,arm,cortex-a55psci%9D cpu@200cpu,arm,cortex-a55psci%9D cpu@300cpu,arm,cortex-a55psci%9D opp-table-0,operating-points-v2LDopp-408000000WQ ^ 0l@opp-600000000W#F ^ 0opp-816000000W0, ^ 0}opp-1104000000WAʹ ^ 0opp-1416000000WTfr ^ 0opp-1608000000W_" ^0opp-1800000000WkI ^0opp-1992000000Wv ^000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14Dopp-table-1,operating-points-v2DEopp-200000000W ^ opp-300000000W^ opp-400000000Wׄ^ opp-600000000W#F^ opp-700000000W)'^ opp-800000000W/^B@hdmi-sound,simple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24mDxin32k ,fixed-clock=Mxin32k` jdefaultsram@10f000 ,mmio-sram xsram@0,arm,scmi-shmemDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost utmi_wideokay usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wideokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A"(-Dusb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usbokayusb@fd880000 ,generic-ehci usbokayusb@fd8c0000 ,generic-ohci usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdDio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay<JXftsyscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconDsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconDsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀDclock-controller@fdd00000,rockchip,rk3568-pmucruDclock-controller@fdd20000,rockchip,rk3568-cruxin24m G Di2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk` jdefault okayregulator@1c ,tcs,tcs4525vdd_cpu.BT 5l0!Dregulator-state-mempmic@20,rockchip,rk809 "jdefault`#$$$$$$&$2$>$JregulatorsDCDC_REG1 vdd_logic.BXT lpqregulator-state-memDCDC_REG2vdd_gpu.XT lpqDFregulator-state-memDCDC_REG3vcc_ddr.BXregulator-state-memoDCDC_REG4vdd_npuXT lpqregulator-state-memDCDC_REG5vcc_1v8.BTw@lw@Dregulator-state-memLDO_REG1vdda0v9_imageT~l~DSregulator-state-memLDO_REG2 vdda_0v9.BT l regulator-state-memLDO_REG3 vdda0v9_pmu.BT l regulator-state-memo LDO_REG4 vccio_acodecT2Zl2ZDregulator-state-memLDO_REG5 vccio_sdTw@l2ZDregulator-state-memLDO_REG6 vcc3v3_pmu.BT2Zl2ZDregulator-state-memo2ZLDO_REG7 vcca_1v8.BTw@lw@Dregulator-state-memLDO_REG8 vcca1v8_pmu.BTw@lw@regulator-state-memow@LDO_REG9vcca1v8_imageTw@lw@DTregulator-state-memSWITCH_REG1vcc_3v3.BDregulator-state-memSWITCH_REG2 vcc3v3_sd.BDXregulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk%%`&jdefault disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`'jdefault disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`(jdefault disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk`)jdefault disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk`*jdefault disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller Dpower-domain@7+power-domain@8 ,-.power-domain@9  /01power-domain@10 234567power-domain@11 8power-domain@13 9power-domain@14 :;<power-domain@15 =>?@ABCDgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus%EokayFDvideo-codec@fdea0400,rockchip,rk3568-vpu  aclkhclkG iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface DGrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Zaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkH iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface DHmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sample!,рreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth:IJ[JnK disabledmdio,snps,dwmac-mdio stmmac-axi-configDIrx-queues-configDJqueue0tx-queues-configDKqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2L okay,rockchip,rk3568-vopports Dport@0 endpoint@2MDUport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkifaceokayDLdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyN apb disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyO apb disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefjdefault `PQR okay STDports port@0endpointUDMport@1endpointVDqos@fe128000,rockchip,rk3568-qossyscon D+qos@fe138080,rockchip,rk3568-qossyscon D:qos@fe138100,rockchip,rk3568-qossyscon D;qos@fe138180,rockchip,rk3568-qossyscon D<qos@fe148000,rockchip,rk3568-qossyscon D,qos@fe148080,rockchip,rk3568-qossyscon D-qos@fe148100,rockchip,rk3568-qossyscon D.qos@fe150000,rockchip,rk3568-qossyscon D8qos@fe158000,rockchip,rk3568-qossyscon D2qos@fe158100,rockchip,rk3568-qossyscon D3qos@fe158180,rockchip,rk3568-qossyscon D4qos@fe158200,rockchip,rk3568-qossyscon D5qos@fe158280,rockchip,rk3568-qossyscon D6qos@fe158300,rockchip,rk3568-qossyscon D7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon D=qos@fe190280,rockchip,rk3568-qossyscon DAqos@fe190300,rockchip,rk3568-qossyscon DBqos@fe190380,rockchip,rk3568-qossyscon DCqos@fe190400,rockchip,rk3568-qossyscon DDqos@fe198000,rockchip,rk3568-qossyscon D9qos@fe1a8000,rockchip,rk3568-qossyscon D/qos@fe1a8080,rockchip,rk3568-qossyscon D0qos@fe1a8100,rockchip,rk3568-qossyscon D1pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsilegacyerr+($aclk_mstaclk_slvaclk_dbipclkauxpci5`HWWWWVgv pcie-phyTx @@pipe okay "legacy-interrupt-controller HDWmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sample!,рresetokayXjdefault`YZ[\mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sample!,рreset disabledspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc`]jdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}corebusaxiblocktimerokay, jdefault `^_`i2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9mclk_txmclk_rxhclka txPQ tx-mrx-mokayDi2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:mclk_txmclk_rxhclkaa rxtxRS tx-mrx-mjdefault0`bcdefghijklm disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;mclk_txmclk_rxhclkaa txrxTmjdefault`nopq disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkaa txrxUV tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclka  rx`rstuvwjdefaultXpdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\a txjdefault`x disableddma-controller@fe530000,arm,pl330arm,primecellS@ *  apb_pclkAD%dma-controller@fe550000,arm,pl330arm,primecellU@*  apb_pclkADai2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclk`yjdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk`zjdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclk`{jdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclk`|jdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclk`}jdefault okayrtc@51,haoyu,hym8563Q" Mrtcic_32koutjdefault`~Jwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk%% txrxjdefault `  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk%% txrxjdefault `  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk%% txrxjdefault `  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk%% txrxjdefault `  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk%%`jdefault disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk%%`jdefaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk%%`jdefault disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk%% `jdefault disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk% % `jdefault disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk% % `jdefault disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk%%`jdefault disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk%%`jdefault disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk%%`jdefault disabledthermal-zonescpu-thermalLdbptripscpu_alert0ppassiveDcpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermalLbptripsgpu-thresholdppassivegpu-target$passiveDgpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq sf@ `tsadcapb_pclksjinitdefaultsleep`okay Dsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclk saradc-apb okay 0pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclk`jdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclk`jdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclk`jdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclk`jdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclk`jdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclk`jdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe" < N dokayDphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe% < N dokayDphy@fe870000,rockchip,rk3568-csi-dphyypclk dapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz d apb disabledDNmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ d apb disabledDOusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy0_480m  ookayDhost-port dokay Dotg-port dokayDusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy1_480m  ookayhost-port dokay Dotg-port dokayDpinctrl,rockchip,rk3568-pinctrl  xDgpio@fdd60000,rockchip,gpio-bank !.    D"gpio@fe740000,rockchip,gpio-bankt "cd   gpio@fe750000,rockchip,gpio-banku #ef  @  Dgpio@fe760000,rockchip,gpio-bankv $gh  `  Dgpio@fe770000,rockchip,gpio-bankw %ij   Dpcfg-pull-up Dpcfg-pull-none Dpcfg-pull-none-drv-level-1  Dpcfg-pull-none-drv-level-2  Dpcfg-pull-none-drv-level-3  Dpcfg-pull-up-drv-level-1  Dpcfg-pull-up-drv-level-2  Dpcfg-pull-none-smt  Dacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 D cpuebcedpdpemmcemmc-bus8   D^emmc-clk D_emmc-cmd D`eth0eth1flashfspifspi-pins` D]gmac0gmac0-miim Dgmac0-rx-bus20 Dgmac0-tx-bus20    Dgmac0-rgmii-clk Dgmac0-rgmii-bus@ Deth-phy0-reset-pin Dgmac1gpuhdmitxhdmitxm0-cec DRhdmitx-scl DPhdmitx-sda DQi2c0i2c0-xfer  D i2c1i2c1-xfer  Dyi2c2i2c2m0-xfer Dzi2c3i2c3m0-xfer D{i2c4i2c4m0-xfer   D|i2c5i2c5m0-xfer   D}i2s1i2s1m0-lrckrx Dei2s1m0-lrcktx Ddi2s1m0-sclkrx Dci2s1m0-sclktx Dbi2s1m0-sdi0  Dfi2s1m0-sdi1  Dgi2s1m0-sdi2  Dhi2s1m0-sdi3 Dii2s1m0-sdo0 Dji2s1m0-sdo1 Dki2s1m0-sdo2  Dli2s1m0-sdo3  Dmi2s2i2s2m0-lrcktx Doi2s2m0-sclktx Dni2s2m0-sdi Dpi2s2m0-sdo Dqi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk Drpdmm0-clk1 Dspdmm0-sdi0  Dtpdmm0-sdi1  Dupdmm0-sdi2  Dvpdmm0-sdi3 Dwpmicpmic-int D#pmupwm0pwm0m0-pins D'pwm1pwm1m0-pins D(pwm2pwm2m0-pins D)pwm3pwm3-pins D*pwm4pwm4-pins Dpwm5pwm5-pins Dpwm6pwm6-pins Dpwm7pwm7-pins Dpwm8pwm8m0-pins  Dpwm9pwm9m0-pins  Dpwm10pwm10m0-pins  Dpwm11pwm11m0-pins Dpwm12pwm12m0-pins Dpwm13pwm13m0-pins Dpwm14pwm14m0-pins Dpwm15pwm15m0-pins Drefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ DYsdmmc0-clk DZsdmmc0-cmd D[sdmmc0-det D\sdmmc1sdmmc2spdifspdifm0-tx Dxspi0spi0m0-pins0 Dspi0m0-cs0 Dspi0m0-cs1 Dspi1spi1m0-pins0  Dspi1m0-cs0 Dspi1m0-cs1 Dspi2spi2m0-pins0 Dspi2m0-cs0 Dspi2m0-cs1 Dspi3spi3m0-pins0   Dspi3m0-cs0 Dspi3m0-cs1 Dtsadctsadc-shutorg Dtsadc-pin Duart0uart0-xfer D&uart1uart1m0-xfer   Duart2uart2m0-xfer Duart3uart3m0-xfer Duart4uart4m0-xfer Duart5uart5m0-xfer Duart6uart6m0-xfer Duart7uart7m0-xfer Duart8uart8m0-xfer Duart9uart9m0-xfer Dvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2hym8563hym8563-int D~usbvcc5v0-usb-host-en Dvcc5v0-usb-otg-en Dgpio-ledslan1-led-pin Dlan2-led-pin Dpower-led-pin Dwan-led-pin Dsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ^ sata-phy disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconDqos@fe190080,rockchip,rk3568-qossyscon D>qos@fe190100,rockchip,rk3568-qossyscon D?qos@fe190200,rockchip,rk3568-qossyscon D@syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀDphy@fe8c0000,rockchip,rk3568-pcie3-phy d&'wrefclk_mrefclk_npclkphy okay Dpcie@fe270000,rockchip,rk3568-pcie +($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr5`HVgv pcie-phy0@@'Tx @@@dbiapbconfigpipeokay " 'legacy-interrupt-controller Dpcie@fe280000,rockchip,rk3568-pcie +($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr5`HVgv  pcie-phy0@(Tx @@dbiapbconfigpipeokay  'legacy-interrupt-controller Dethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth:J[nokaysY@ 7output D Orgmiijdefault` X" h ~:P < /mdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22`jdefaultDstmmac-axi-configDrx-queues-configDqueue0tx-queues-configDqueue0phy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe < N dokayDchosen serial2:1500000n8hdmi-con,hdmi-connectoraportendpointDVvdd-usbc-regulator,regulator-fixed vdd_usbc.BTLK@lLK@Dvcc3v3-sys-regulator,regulator-fixed vcc3v3_sys.BT2Zl2ZD$vcc5v0-sys-regulator,regulator-fixed vcc5v0_sys.BTLK@lLK@D!vcc3v3-pcie-regulator,regulator-fixed vcc3v3_pcieT2Zl2Z  "  @!Dvcc5v0-usb-regulator,regulator-fixed vcc5v0_usb.BTLK@lLK@Dvcc5v0-usb-host-regulator,regulator-fixed  c"jdefault`vcc5v0_usb_host.BTLK@lLK@Dvcc5v0-usb-otg-regulator,regulator-fixed  c"jdefault`vcc5v0_usb_otgTLK@lLK@Dpcie30-avdd0v9-regulator,regulator-fixedpcie30_avdd0v9.BT l $pcie30-avdd1v8-regulator,regulator-fixedpcie30_avdd1v8.BTw@lw@$gpio-leds ,gpio-ledsjdefault`led-lan1  lan  led-lan2  lan  led-power  power heartbeat led-wan  wan  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