8˜( @d ',radxa,cm3-ioradxa,cm3rockchip,rk3566%7Radxa Compute Module 3(CM3) IO Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55 psci/: cpu@100cpu,arm,cortex-a55 psci/: cpu@200cpu,arm,cortex-a55 psci/: cpu@300cpu,arm,cortex-a55 psci/: opp-table-0,operating-points-v2B:opp-408000000MQ T 0b@opp-600000000M#F T 0opp-816000000M0, T 0sopp-1104000000MAʹ T 0opp-1416000000MTfr T 0opp-1608000000M_" T0opp-1800000000MkI T0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14:opp-table-1,operating-points-v2:@opp-200000000M T opp-300000000MT opp-400000000MׄT opp-600000000M#FT opp-700000000M)'T opp-800000000M/TB@hdmi-sound,simple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   xin24m ,fixed-clock3n6Cxin24m:xin32k ,fixed-clock3Cxin32kV `defaultsram@10f000 ,mmio-sram nsram@0,arm,scmi-shmem:sata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@usatapmaliverxoob _ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciusatapmaliverxoob ` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ uref_clksuspend_clkbus_clkotg utmi_wideokay usb2-phy high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ uref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wideokayinterrupt-controller@fd400000 ,arm,gic-v3 @F   A&(1:usb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usb disabledusb@fd880000 ,generic-ehci usb disabledusb@fd8c0000 ,generic-ohci usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd:io-domains&,rockchip,rk3568-pmu-io-voltage-domainokay@N\jxsyscon@fdc50000 ,rockchip,rk3566-pipe-grfsyscon:syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd:syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon:syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon:syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon:syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀ:clock-controller@fdd00000,rockchip,rk3568-pmucru:clock-controller@fdd20000,rockchip,rk3568-cruuxin24m G :i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- ui2cpclkV`default okayregulator@1c ,tcs,tcs45251vdd_cpu@Tf 4~5 :regulator-state-mempmic@20,rockchip,rk817 Crk817-clkout1rk817-clkout2!`defaultV"   " . : F :regulatorsDCDC_REG1 1vdd_logic@TRf ~pqregulator-state-memi DCDC_REG2 1vdd_gpu_npu@TRf ~pq:Aregulator-state-memDCDC_REG31vcc_ddr@TRregulator-state-memiDCDC_REG4 1vcc3v3_sys@TRf2Z~2Z:regulator-state-memi2ZLDO_REG1 1vcca1v8_pmu@Tfw@~w@regulator-state-memiw@LDO_REG2 1vdda_0v9@Tf ~ :regulator-state-memLDO_REG3 1vdda0v9_pmu@Tf ~ regulator-state-memi LDO_REG4 1vccio_acodec@Tf2Z~2Z:regulator-state-memLDO_REG5 1vccio_sd@Tfw@~2Z:regulator-state-memLDO_REG6 1vcc3v3_pmu@Tf2Z~2Z:regulator-state-memi2ZLDO_REG7 1vcc_1v8_p@Tfw@~w@:regulator-state-memLDO_REG8 1vcc1v8_dvp@Tfw@~w@regulator-state-memLDO_REG9 1vcc2v8_dvp@Tf*~*regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,ubaudclkapb_pclk##V$`default disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 upwmpclkV%`default disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 upwmpclkV&`default disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 upwmpclkV'`default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 upwmpclkV(`default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller :power-domain@7)power-domain@8 *+,power-domain@9  -./power-domain@10 012345power-domain@11 6power-domain@13 7power-domain@14 89:power-domain@15;<=>?gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpuugpubus@okayA:video-codec@fdea0400,rockchip,rk3568-vpu  uaclkhclkB iommu@fdea0800,rockchip,rk3568-iommu@  uaclkiface :Brga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Zuaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu @ uaclkhclkC iommu@fdee0800,rockchip,rk3568-iommu@ ? uaclkiface :Cmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d ubiuciuciu-driveciu-sample&рreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wustmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth4DDUEhF{okay GsY@inputHrgmii`defaultVIJKLMN O N F.mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22:Hstmmac-axi-config :Drx-queues-config:Equeue0tx-queues-config2:Fqueue0vop@fe040000 0@Hvopgamma-lut (%uaclkhclkdclk_vp0dclk_vp1dclk_vp2P okay,rockchip,rk3566-vopports :port@0 endpoint@2RQ:Yport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  uaclkifaceokay:Pdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DupclkdphyR apb disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EupclkdphyS apb disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((uiahbisfrcecref`default VTUV bokaysWX:ports port@0endpointRY:Qport@1endpointRZ:qos@fe128000,rockchip,rk3568-qossyscon :)qos@fe138080,rockchip,rk3568-qossyscon :8qos@fe138100,rockchip,rk3568-qossyscon :9qos@fe138180,rockchip,rk3568-qossyscon ::qos@fe148000,rockchip,rk3568-qossyscon :*qos@fe148080,rockchip,rk3568-qossyscon :+qos@fe148100,rockchip,rk3568-qossyscon :,qos@fe150000,rockchip,rk3568-qossyscon :6qos@fe158000,rockchip,rk3568-qossyscon :0qos@fe158100,rockchip,rk3568-qossyscon :1qos@fe158180,rockchip,rk3568-qossyscon :2qos@fe158200,rockchip,rk3568-qossyscon :3qos@fe158280,rockchip,rk3568-qossyscon :4qos@fe158300,rockchip,rk3568-qossyscon :5qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon :;qos@fe190280,rockchip,rk3568-qossyscon :<qos@fe190300,rockchip,rk3568-qossyscon :=qos@fe190380,rockchip,rk3568-qossyscon :>qos@fe190400,rockchip,rk3568-qossyscon :?qos@fe198000,rockchip,rk3568-qossyscon :7qos@fe1a8000,rockchip,rk3568-qossyscon :-qos@fe1a8080,rockchip,rk3568-qossyscon :.qos@fe1a8100,rockchip,rk3568-qossyscon :/pcie@fe260000,rockchip,rk3568-pcie0@&Hdbiapbconfig<KJIHGsyspmcmsilegacyerr($uaclk_mstaclk_slvaclk_dbipclkauxpci `[[[[ pcie-phyTn @@pipe  disabledlegacy-interrupt-controller  H:[mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b ubiuciuciu-driveciu-sample&рresetokay*;F`defaultV\]^_`mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c ubiuciuciu-driveciu-sample&рresetokay ;*S`va`default VbcdFwifi@1,brcm,bcm43455-fmace host-wake`defaultVfspi@fe300000 ,rockchip,sfc0@ exvuclk_sfchclk_sfcVg`default disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}ucorebusaxiblocktimerokay& `defaultVhijkFi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9umclk_txmclk_rxhclkltxPQ tx-mrx-mb disabled:i2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:umclk_txmclk_rxhclkllrxtxRS tx-mrx-m`default0Vmnopqrstuvwxb disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;umclk_txmclk_rxhclklltxrxTm`defaultVyz{|b disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<umclk_txmclk_rxhclklltxrxUV tx-mrx-mb disabledpdm@fe440000,rockchip,rk3568-pdmD LZYupdm_clkpdm_hclkl rxV}~`defaultXpdm-mb disabledspdif@fe460000,rockchip,rk3568-spdifF f umclkhclk_\ltx`defaultVb disableddma-controller@fe530000,arm,pl330arm,primecellS@   uapb_pclk:#dma-controller@fe550000,arm,pl330arm,primecellU@  uapb_pclk:li2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG ui2cpclkV`default  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI ui2cpclkV`default  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK ui2cpclkV`default  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM ui2cpclkV`default  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO ui2cpclkV`default  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  utclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQuspiclkapb_pclk##txrx`default V  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSuspiclkapb_pclk##txrx`default V  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUuspiclkapb_pclk##txrx`default V  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWuspiclkapb_pclk##txrx`default V  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte uubaudclkapb_pclk## V`defaultokaybluetooth,brcm,bcm4345c5ulpo e  e  e`default V  "serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# ubaudclkapb_pclk##V`defaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$ubaudclkapb_pclk##V`default disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(ubaudclkapb_pclk## V`default disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,ubaudclkapb_pclk# # V`default disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30ubaudclkapb_pclk# # V`default disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74ubaudclkapb_pclk##V`default disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8ubaudclkapb_pclk##V`default disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<ubaudclkapb_pclk##V`default disabledthermal-zonescpu-thermal /d E Stripscpu_alert0 cp opassive:cpu_alert1 c$ opassivecpu_crit cs o criticalcooling-mapsmap0 z0  gpu-thermal / E Stripsgpu-threshold cp opassivegpu-target c$ opassive:gpu-crit cs o criticalcooling-mapsmap0 z tsadc@fe710000,rockchip,rk3568-tsadcq sf@ `utsadcapb_pclk s`initdefaultsleepV   okay  :saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]usaradcapb_pclk saradc-apb okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY upwmpclkV`default disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY upwmpclkV`default disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY upwmpclkV`default disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY upwmpclkV`default disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ upwmpclkV`default disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ upwmpclkV`default disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ upwmpclkV`default disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ upwmpclkV`default disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ upwmpclkV`default disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ upwmpclkV`default disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ upwmpclkV`default disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ upwmpclkV`default disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} urefapbpipe"  1 Gokay:phy@fe840000,rockchip,rk3568-naneng-combphy%~ urefapbpipe%  1 G disabled:phy@fe870000,rockchip,rk3568-csi-dphyyupclk Gapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy urefpclkz G apb disabled:Rmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy urefpclk{ G apb disabled:Susb2phy@fe8a0000,rockchip,rk3568-usb2phyuphyclkCclk_usbphy0_480m  Rokay:host-port Gokay b:otg-port Gokay:usb2phy@fe8b0000,rockchip,rk3568-usb2phyuphyclkCclk_usbphy1_480m  Rokayhost-port Gokay:otg-port Gokay:pinctrl,rockchip,rk3568-pinctrl m n:gpio@fdd60000,rockchip,gpio-bank !.  z   :!gpio@fe740000,rockchip,gpio-bankt "cd z   gpio@fe750000,rockchip,gpio-banku #ef z @   :egpio@fe760000,rockchip,gpio-bankv $gh z `   :gpio@fe770000,rockchip,gpio-bankw %ij z   :Opcfg-pull-up :pcfg-pull-none :pcfg-pull-none-drv-level-1  :pcfg-pull-none-drv-level-2  :pcfg-pull-none-drv-level-3  :pcfg-pull-none-drv-level-15  :pcfg-pull-up-drv-level-1  :pcfg-pull-up-drv-level-2  :pcfg-pull-none-smt  :acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 : cpuebcedpdpemmcemmc-bus8   :hemmc-clk :iemmc-cmd :jemmc-datastrobe :keth0eth1flashfspifspi-pins` :ggmac0gmac1gmac1m0-miim :Igmac1m0-clkinout :Ngmac1m0-rx-bus20    :Kgmac1m0-tx-bus20  :Jgmac1m0-rgmii-clk :Lgmac1m0-rgmii-bus@ :Mgpuhdmitxhdmitxm0-cec :Vhdmitx-scl :Thdmitx-sda :Ui2c0i2c0-xfer  :i2c1i2c1-xfer  :i2c2i2c2m0-xfer :i2c3i2c3m0-xfer :i2c4i2c4m0-xfer   :i2c5i2c5m0-xfer   :i2s1i2s1m0-lrckrx :pi2s1m0-lrcktx :oi2s1m0-sclkrx :ni2s1m0-sclktx :mi2s1m0-sdi0  :qi2s1m0-sdi1  :ri2s1m0-sdi2  :si2s1m0-sdi3 :ti2s1m0-sdo0 :ui2s1m0-sdo1 :vi2s1m0-sdo2  :wi2s1m0-sdo3  :xi2s2i2s2m0-lrcktx :zi2s2m0-sclktx :yi2s2m0-sdi :{i2s2m0-sdo :|i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk :}pdmm0-clk1 :~pdmm0-sdi0  :pdmm0-sdi1  :pdmm0-sdi2  :pdmm0-sdi3 :pmicpmic-int-l :"pmupwm0pwm0m0-pins :%pwm1pwm1m0-pins :&pwm2pwm2m0-pins :'pwm3pwm3-pins :(pwm4pwm4-pins :pwm5pwm5-pins :pwm6pwm6-pins :pwm7pwm7-pins :pwm8pwm8m0-pins  :pwm9pwm9m0-pins  :pwm10pwm10m0-pins  :pwm11pwm11m0-pins :pwm12pwm12m0-pins :pwm13pwm13m0-pins :pwm14pwm14m0-pins :pwm15pwm15m0-pins :refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ :\sdmmc0-clk :]sdmmc0-cmd :^sdmmc0-det :_sdmmc0-pwren :`sdmmc1sdmmc1-bus4@ :bsdmmc1-clk :csdmmc1-cmd :dsdmmc2spdifspdifm0-tx :spi0spi0m0-pins0 :spi0m0-cs0 :spi0m0-cs1 :spi1spi1m0-pins0  :spi1m0-cs0 :spi1m0-cs1 :spi2spi2m0-pins0 :spi2m0-cs0 :spi2m0-cs1 :spi3spi3m0-pins0   :spi3m0-cs0 :spi3m0-cs1 :tsadctsadc-shutorg :tsadc-pin :uart0uart0-xfer :$uart1uart1m0-xfer   :uart1m0-ctsn :uart1m0-rtsn  :uart2uart2m0-xfer :uart3uart3m0-xfer :uart4uart4m0-xfer :uart5uart5m0-xfer :uart6uart6m0-xfer :uart7uart7m0-xfer :uart8uart8m0-xfer :uart9uart9m0-xfer :vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2bluetoothbt-host-wake-h  :bt-reg-on-h :bt-wake-host-h  :ledsuser-led2 :pi-nled-activity :wifiwifi-reg-on-h :wifi-host-wake-h :fsdcardsdmmc-pwren usbvcc5v0-host-en-h :leds ,gpio-ledsled-0 !  status timer on`defaultVled-1 O  activity heartbeat`defaultVvcc-sys-regulator,regulator-fixed1vcc_sys@TfLK@~LK@: vcc-1v8-regulator,regulator-fixed1vcc_1v8@Tfw@~w@:vcc-3v3-regulator,regulator-fixed1vcc_3v3@Tf2Z~2Z:vcca-1v8-regulator,regulator-fixed 1vcca_1v8@Tfw@~w@:pwrseq-sdio,mmc-pwrseq-simple uext_clock`defaultV e:achosen !serial2:1500000n8external-gmac1-clock ,fixed-clock3sY@ Cgmac1_clkin:Ghdmi-con,hdmi-connectoraportendpointR:Zvcc5v0-usb30-regulator,regulator-fixed 1vcc5v0_usb30 - `defaultV@fLK@~LK@ :vcca1v8-image-regulator,regulator-fixed1vcca1v8_image@Tfw@~w@:Xvdda0v9-image-regulator,regulator-fixed1vcca0v9_image@Tf ~ :W interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaysnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplybus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vmmc-supplymmc-hs200-1_8vdma-namesarm,pl330-periph-burst#dma-cellsdevice-wakeup-gpioshost-wakeup-gpiosreset-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplyrockchip,pmugpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinscolorfunctionlinux,default-triggerdefault-statestdout-pathenable-active-high