8(Mpgoogle,scarlet-rev15-sku7google,scarlet-rev15google,scarlet-rev14-sku7google,scarlet-rev14google,scarlet-rev13-sku7google,scarlet-rev13google,scarlet-rev12-sku7google,scarlet-rev12google,scarlet-rev11-sku7google,scarlet-rev11google,scarlet-rev10-sku7google,scarlet-rev10google,scarlet-rev9-sku7google,scarlet-rev9google,scarlet-rev8-sku7google,scarlet-rev8google,scarlet-rev7-sku7google,scarlet-rev7google,scarlet-rev6-sku7google,scarlet-rev6google,scarlet-rev5-sku7google,scarlet-rev5google,scarlet-rev4-sku7google,scarlet-rev4google,scarlet-rev3-sku7google,scarlet-rev3google,scarletgoogle,grurockchip,rk3399 +7tabletDGoogle ScarletaliasesJ/ethernet@fe300000T/i2c@ff3c0000Y/i2c@ff110000^/i2c@ff120000c/i2c@ff130000h/i2c@ff3d0000m/i2c@ff140000r/i2c@ff150000w/i2c@ff160000|/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid ( < Gcpu@1cpuarm,cortex-a53pscid ( < Gcpu@2cpuarm,cortex-a53pscid ( < Gcpu@3cpuarm,cortex-a53pscid ( < Gcpu@100cpuarm,cortex-a72psci  ( <Gthermal-idleO'[cpu@101cpuarm,cortex-a72psci  ( <Gthermal-idleO'[idle-stateskpscicpu-sleeparm,idle-statexx[G cluster-sleeparm,idle-statex[G display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clkokay( (;V@o'Z'Z'Z; 7P(/pmu_a53arm,cortex-a53-pmu=pmu_a72arm,cortex-a72-pmu=psci arm,psci-1.0smctimerarm,armv8-timer@=   Hxin24m fixed-clock_n6oxin24mGpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ Gaclkaclk-perfhclkpm0=123syslegacyclient` , pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(%coremgmtmgmt-stickypipepmpclkaclkokay 1:defaultHRbrinterrupt-controllerGpcie@0,0+pcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm8(%coremgmtmgmt-stickypipepmpclkaclk , pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 :defaultH disabledethernet@fe300000rockchip,rk3399-gmac0= macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac  %stmmaceth! disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@=@р Mbiuciuciu-driveciu-sample y%reset disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@=Aр/  Lbiuciuciu-driveciu-sample z%resetokay:defaultH"#$%&DN` q' z()mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13= !N/рNclk_xinclk_ahboemmc_cardclock*  phy_arasan okayD #Gusb@fe380000 generic-ehci8=+, usb disabledusb@fe3a0000 generic-ohci:=+, usbokay+bluetooth@1usbcf3,e300usb4ca,301a:defaultH- '=wakeupusb@fe3c0000 generic-ehci<=./ usb disabledusb@fe3e0000 generic-ohci>= ./ usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% %usb3-otgokay10usb@fe800000 snps,dwc3=irefbus_earlysuspend8host12 usb2-phyusb3-phy @utmi_wideIa okayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& %usb3-otg disabledusb@fe900000 snps,dwc3=nrefbus_earlysuspend8otg34 usb2-phyusb3-phy @utmi_wideIa  disableddp@fec00000rockchip,rk3399-cdn-dp= r/  ruocore-clkpclkspdifgrf5  HJ%spdifdptxapbcore!okay10Gportsport+endpoint@06Gendpoint@17Ginterrupt-controller@fee00000 arm,gic-v3+P = Gmsi-controller@fee20000arm,gic-v3-itsGppi-partitionsinterrupt-partition-0Ginterrupt-partition-1Gsaradc@ff100000rockchip,rk3399-saradc=>"Pesaradcapb_pclk %saradc-apb disabledcrypto@ff8b0000rockchip,rk3399-crypto@=hclk_masterhclk_slavesclk%masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@=hclk_masterhclk_slavesclk%masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cA/ AU i2cpclk=;:defaultH8+ disabledi2c@ff120000rockchip,rk3399-i2cB/ BV i2cpclk=#:defaultH9+okay_42L,digitizer@9 hid-over-i2c  '=c:defaultH:;i2c@ff130000rockchip,rk3399-i2cC/ CW i2cpclk=":defaultH<+okay_42L,touchscreen@10elan,ekth3500 '=:defaultH=> r i2c@ff140000rockchip,rk3399-i2cD/ DX i2cpclk=&:defaultH?+ disabledi2c@ff150000rockchip,rk3399-i2cE/ EY i2cpclk=%:defaultH@+ disabledi2c@ff160000rockchip,rk3399-i2cF/ FZ i2cpclk=$:defaultHAB+okay_42L,camera@36 ovti,ov56956:defaultHCxvclk~DE rFportendpointGGcamera@3c ovti,ov2685<:defaultHHxvclk~D rFportendpointIGserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclk=c:defaultHJ disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclk=b:defaultHK disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclk=d:defaultHLokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclk=e:defaultHM disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclk=DN N txrx:defaultHOPQR+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk=5N N txrx:defaultsleepHSTUV+okayWflash@0jedec,spi-norspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk=4NNtxrx:defaultHXYZ[+okaycr50@0 google,cr50 '=:defaultH\ 5spi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclk=CNNtxrx:defaultH]^_`+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk=aa txrx:defaultHbcde +okayec@0google,cros-ec-spi '=:defaultHf-i2c-tunnelgoogle,cros-ec-i2c-tunnel+sbs-battery@bsbs,sbs-battery extcon0google,extcon-usbc-cros-ec+G0keyboard-controllergoogle,cros-ec-keyb>N aD{;<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ithermal-zonescpu-thermaldgtripscpu_alert0?passiveGhcpu_alert1X?passiveGicpu_crits ?criticalcooling-mapsmap0hmap1iHgpu-thermaldgtripsgpu_alert0$?passiveGjgpu_crits ?criticalcooling-mapsmap0j ktsadc@ff260000rockchip,rk3399-tsadc&=aO/ qOdtsadcapb_pclk %tsadc-apb!s:initdefaultsleepHlml okay  5Ggqos@ffa58000rockchip,rk3399-qossyscon Guqos@ffa5c000rockchip,rk3399-qossyscon Gvqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Gyqos@ffa70080rockchip,rk3399-qossyscon Gzqos@ffa74000rockchip,rk3399-qossyscon@ Gwqos@ffa76000rockchip,rk3399-qossyscon` Gxqos@ffa90000rockchip,rk3399-qossyscon G{qos@ffa98000rockchip,rk3399-qossyscon Gnqos@ffaa0000rockchip,rk3399-qossyscon G|qos@ffaa0080rockchip,rk3399-qossyscon G}qos@ffaa8000rockchip,rk3399-qossyscon G~qos@ffaa8080rockchip,rk3399-qossyscon Gqos@ffab0000rockchip,rk3399-qossyscon Goqos@ffab0080rockchip,rk3399-qossyscon Gpqos@ffab8000rockchip,rk3399-qossyscon Gqqos@ffac0000rockchip,rk3399-qossyscon Grqos@ffac0080rockchip,rk3399-qossyscon Gsqos@ffac8000rockchip,rk3399-qossyscon Gqos@ffac8080rockchip,rk3399-qossyscon Gqos@ffad0000rockchip,rk3399-qossyscon Gqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Gtpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller P+G power-domain@34" dn Ppower-domain@33! dop Ppower-domain@31 dq Ppower-domain@32   drs Ppower-domain@35# dt Ppower-domain@25l Ppower-domain@23 du Ppower-domain@22f dv Ppower-domain@27L dw Ppower-domain@28 dx Ppower-domain@8~} Ppower-domain@9  Ppower-domain@24 dyz Ppower-domain@15 P+power-domain@21r d{ Ppower-domain@19 d|} Ppower-domain@20 d~ Ppower-domain@16 P+power-domain@17 d Ppower-domain@18 d Psyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2Gio-domains&rockchip,rk3399-pmu-io-voltage-domainokay kspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk=<:defaultH+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclk=f:defaultH disabledi2c@ff3c0000rockchip,rk3399-i2c< /   i2cpclk=9:defaultH+ disabledi2c@ff3d0000rockchip,rk3399-i2c= /   i2cpclk=8:defaultH+ disabledi2c@ff3e0000rockchip,rk3399-i2c> /   i2cpclk=::defaultH+okay_42L,da7219@1a dlg,da7219 '=Ymclk z ( diff:defaultH   Gda7219_aad   2   32ms_64ms  0  @ P! `>pwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB r:defaultHokayGpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB r:defaultHokayGpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  r:defaultHokayGpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 r:defaultHokayGdfi@ff630000c@rockchip,rk3399-dfi=y pclk_ddr_monokayGvideo-codec@ff650000rockchip,rk3399-vpue =rq vepuvdpu aclkhclk } iommu@ff650800rockchip,iommue@=s aclkiface  Gvideo-codec@ff660000rockchip,rk3399-vdecf=t axiahbcabaccore } iommu@ff660480rockchip,iommu f@f@=u aclkiface  Giommu@ff670800rockchip,iommug@=* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah=7maclkhclksclkjgi %coreaxiahb !efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@ =   apb_pclkGadma-controller@ff6e0000arm,pl330arm,primecelln@ =   apb_pclkGNclock-controller@ff750000rockchip,rk3399-pmucruuxin24m /(JGclock-controller@ff760000rockchip,rk3399-cruvxin24m! @BCxD/#F_^;рxh<4`/ׄ ׄׄGsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+G!io-domains"rockchip,rk3399-io-voltage-domainokay    )mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf  okayGusb2phy@e450rockchip,rk3399-usb2phyP{phyclkoclk_usbphy0_480mokayG+host-port = linestateokayG,otg-port 0=ghjotg-bvalidotg-idlinestateokayG1usb2phy@e460rockchip,rk3399-usb2phy`|phyclkoclk_usbphy1_480m disabledG.host-port = linestateokayG/otg-port 0=lmootg-bvalidotg-idlinestateokayG3phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okayG*pcie-phyrockchip,rk3399-pcie-phyrefclk %phyokayGphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~/ L%uphyuphy-pipeuphy-tcphy!okay10dp-port G5usb3-port G2phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref/ M%uphyuphy-pipeuphy-tcphy! disableddp-port usb3-port G4watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|=xrktimer@ff850000rockchip,rk3399-timer=QhZ pclktimerspdif@ff870000rockchip,rk3399-spdif=Batx mclkhclkU okayGi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s!='aatxrxi2s_clki2s_hclkV:bclk_onbclk_offH okayGi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s=(aatxrxi2s_clki2s_hclkW:defaultH  disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s=)aatxrxi2s_clki2s_hclkX  disabledGvop@ff8f0000rockchip,rk3399-vop-lit =w/ׄaclk_vopdclk_vophclk_vop }  %axiahbdclkokayport+Gendpoint@0Gendpoint@1Gendpoint@2Gendpoint@3Gendpoint@4G7iommu@ff8f3f00rockchip,iommu?=w aclkiface  okayGvop@ff900000rockchip,rk3399-vop-big =v/ׄaclk_vopdclk_vophclk_vop }  %axiahbdclkokayport+Gendpoint@0Gendpoint@1Gendpoint@2Gendpoint@3Gendpoint@4G6iommu@ff903f00rockchip,iommu?=v aclkiface  okayGisp0@ff910000rockchip,rk3399-cif-isp@=+nispaclkhclk } dphy okayports+port@0+endpoint@0GGendpoint@1GIiommu@ff914000rockchip,iommu @P=+ aclkiface   okayGisp1@ff920000rockchip,rk3399-cif-isp@=,oispaclkhclk } dphy  disabledports+port@0+iommu@ff924000rockchip,iommu @P=, aclkiface   Ghdmi-soundsimple-audio-card 1i2s J dhdmi-sound disabledsimple-audio-card,cpu {simple-audio-card,codec {hdmi@ff940000rockchip,rk3399-dw-hdmi=(tqpoiahbisfrcecgrfref ! disabledGportsport+endpoint@0Gendpoint@1Gdsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi=- porefpclkphy_cfggrf %apb!+okay ports+port@0+endpoint@0Gendpoint@1Gport@1endpointGpanel@0  :defaultHkingdisplay,kd097d04 ports+port@0endpointGport@1endpoint@1Gdsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi=. qorefpclkphy_cfggrf %apb!+ okayGports+port@0+endpoint@0Gendpoint@1Gport@1endpointGdp@ff970000rockchip,rk3399-edp= jlo dppclkgrf:defaultH %dp! disabledports+port@0+endpoint@0Gendpoint@1Gport@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600= jobmmugpu #okay( Gkpinctrlrockchip,rk3399-pinctrl!+:default Hgpio@ff720000rockchip,gpio-bankr=   CLK_32K_APEC_IN_RW_ODSPK_PA_ENWLAN_PERST_1V8_LWLAN_PD_1V8_LWLAN_RF_KILL_1V8_LBIGCPU_DVS_PWMSD_CD_L_JTAG_ENBT_EN_BT_RF_KILL_1V8_LPMUIO2_33_18_L_PP3300_S0_ENTOUCH_RESET_LAP_EC_WARM_RESET_REQPEN_RESET_LAP_FLASH_WP_LGgpio@ff730000rockchip,gpio-banks=   PEN_INT_ODLPEN_EJECT_ODLBT_HOST_WAKE_1V8_LWLAN_HOST_WAKE_1V8_LTOUCH_INT_ODLAP_EC_S3_S0_LAP_EC_OVERTEMPAP_SPI_FLASH_MISOAP_SPI_FLASH_MOSI_RAP_SPI_FLASH_CLK_RAP_SPI_FLASH_CS_L_RSD_CARD_DET_ODLAP_EXPANSION_IO1AP_EXPANSION_IO2AP_I2C_DISP_SDAAP_I2C_DISP_SCLH1_INT_ODLEC_AP_INT_ODLLITCPU_DVS_PWMAP_I2C_AUDIO_SDAAP_I2C_AUDIO_SCLAP_EXPANSION_IO3HEADSET_INT_ODLAP_EXPANSION_IO4G'gpio@ff780000rockchip,gpio-bankxP=   AP_I2C_PEN_SDAAP_I2C_PEN_SCLSD_IO_PWR_ENUCAM_RST_LPP1250_CAM_ENWCAM_RST_LAP_EXPANSION_IO5AP_I2C_CAM_SDAAP_I2C_CAM_SCLAP_H1_SPI_MISOAP_H1_SPI_MOSIAP_H1_SPI_CLKAP_H1_SPI_CS_LUART_EXPANSION_TX_AP_RXUART_AP_TX_EXPANSION_RXUART_EXPANSION_RTS_AP_CTSUART_AP_RTS_EXPANSION_CTSAP_SPI_EC_MISOAP_SPI_EC_MOSIAP_SPI_EC_CLKAP_SPI_EC_CS_LPP2800_CAM_ENCLK_24M_CAMWLAN_PCIE_CLKREQ_1V8_LSD_PWR_3000_1800_LGFgpio@ff788000rockchip,gpio-bankxQ=   I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDI_0STRAP_LCDBIAS_LSTRAP_FEATURE_1STRAP_FEATURE_2I2S0_SDO_0gpio@ff790000rockchip,gpio-bankyR=   I2S_MCLKAP_I2C_EXPANSION_SDAAP_I2C_EXPANSION_SCLDMIC_ENAP_I2C_TS_SDAAP_I2C_TS_SCLGPU_DVS_PWMUART_DBG_TX_AP_RXUART_AP_TX_DBG_RXBL_ENBL_PWMDISPLAY_RST_LPPVARP_LCD_ENPPVARN_LCD_ENSD_SLOT_PWR_ENGpcfg-pull-up Gpcfg-pull-down Gpcfg-pull-none Gpcfg-pull-none-12ma   Gpcfg-pull-none-13ma   Gpcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma   pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high &Gpcfg-output-low 2pcfg-input-enable =pcfg-input-pull-up = pcfg-input-pull-down = clockclk-32k JGcifcif-clkin J cif-clkouta J edpedp-hpd JGgmacrgmii-pins J    rmii-pins J     i2c0i2c0-xfer JGi2c1i2c1-xfer JG8i2c2i2c2-xfer JG9i2c3i2c3-xfer JG<i2c4i2c4-xfer J  Gi2c5i2c5-xfer J  G?i2c6i2c6-xfer J  G@i2c7i2c7-xfer JGAi2c8i2c8-xfer JGi2s0i2s0-2ch-bus` Ji2s0-2ch-bus-bclk-off` Ji2s0-8ch-bus` JGi2s0-8ch-bus-bclk-off` JGi2s1i2s1-2ch-busP JGi2s1-2ch-bus-bclk-offP Jsdio0sdio0-bus1 Jsdio0-bus4@ Jsdio0-cmd Jsdio0-clk Jsdio0-cd Jsdio0-pwr Jsdio0-bkpwr Jsdio0-wp Jsdio0-int Jsdmmcsdmmc-bus1 Jsdmmc-bus4@ J   G&sdmmc-clk J G"sdmmc-cmd J G#sdmmc-cd JG$sdmmc-wp Jsdmmc-cd-pin J G%suspendap-pwroff JGddrio-pwroff Jspdifspdif-bus Jspdif-bus-1 Jspi0spi0-clk JGOspi0-cs0 JGRspi0-cs1 Jspi0-tx JGPspi0-rx JGQspi1spi1-clk J GSspi1-cs0 J GVspi1-rx JGUspi1-tx JGTspi1-sleep@ J  GWspi2spi2-clk J GXspi2-cs0 J G[spi2-rx J GZspi2-tx J GYspi3spi3-clk JGspi3-cs0 JGspi3-rx JGspi3-tx JGspi4spi4-clk JG]spi4-cs0 JG`spi4-rx JG_spi4-tx JG^spi5spi5-clk JGbspi5-cs0 JGespi5-rx JGdspi5-tx JGctestclktest-clkout0 Jtest-clkout1 JGBtest-clkout2 Jtsadcotp-pin JGlotp-out JGmuart0uart0-xfer JGJuart0-cts Juart0-rts Juart1uart1-xfer J  GKuart2auart2a-xfer J uart2buart2b-xfer Juart2cuart2c-xfer JGLuart3uart3-xfer JGMuart3-cts Juart3-rts Juart4uart4-xfer JGuarthdcpuarthdcp-xfer Jpwm0pwm0-pin JGpwm0-pin-pull-down Jvop0-pwm-pin Jvop1-pwm-pin Jpwm1pwm1-pin JGpwm1-pin-pull-down Jpwm2pwm2-pin JGpwm2-pin-pull-down Jpwm3apwm3a-pin JGpwm3bpwm3b-pin Jhdmihdmi-i2c-xfer Jhdmi-cec Jpciepci-clkreqn-cpm JGpci-clkreqnb-cpm JGpcfg-pull-none-8ma  Gbacklight-enablebl-en JGcros-ecec-ap-int-l JGfdiscrete-regulatorssd-io-pwr-en JGsd-pwr-1800-sel JGsd-slot-pwr-en JGdisplay-rst-l JGppvarp-lcd-en JGppvarn-lcd-en JGcodecheadset-int-l JGmic-int J max98357asdmode-en JGtouchscreentouch-int-l JG=touch-reset-l J G>trackpadap-i2c-tp-pu-en J trackpad-int-l Jwifiwlan-module-reset-l J bt-host-wake-l JG-bt-en-1v8-l JGwlan-pd-1v8-l JGwlan-rf-kill-1v8-l JGwifi-perst-l JGwlan-host-wake-l Jwrite-protectap-fw-wp J pcfg-pull-none-6ma  Gcamerapp1250-dvdd JGpp2800-avdd JGucam_rst JGHwcam_rst JGCdigitizerpen-int-odl JG:pen-reset-l J G;dmicdmic-en JGpenpen-eject-odl JGtpmh1-int-od-l JG\opp-table-0operating-points-v2 XG opp00 cQ j 5 x@opp01 c#F j opp02 c0, j Popp03 c< j opp04 cG jopp05 cTfr j opp06 cZJ j0opp-table-1operating-points-v2 XG opp00 cQ j 5 x@opp01 c#F j 5opp02 c0, j opp03 c< j Popp04 cG j opp05 cTfr jopp06 c_" j opp07 ckI j0opp08 cx) jopp-table-2operating-points-v2Gopp00 c  j 5opp01 c@ j 5opp02 cׄ j opp03 ce j Popp04 c#F jHopp05 c/ jg8opp-table-3operating-points-v2Gopp00 cׄ j opp01 c'Z j opp02 c/ j opp03 c7P( j  chosen serial2:115200n8ppvar-sysregulator-fixed ppvar_sys  Gpp1200-lpddrregulator-fixed pp1200_lpddr   O O pp1800regulator-fixed pp1800   w@ w@ Gpp3300regulator-fixed pp3300   2Z 2Z Gpp5000regulator-fixed pp5000   LK@ LK@ ppvar-bigcpu-pwmpwm-regulator ppvar_bigcpu_pwm    !d 5d   5J Gppvar-bigcpuvctrl-regulator ppvar_bigcpu 5J  H T 5J gBGppvar-litcpu-pwmpwm-regulator ppvar_litcpu_pwm    !d 5d   =J NGppvar-litcpuvctrl-regulator ppvar_litcpu =J N H T =JN gG ppvar-gpu-pwmpwm-regulator ppvar_gpu_pwm    !d 5d   3p PGppvar-gpuvctrl-regulator ppvar_gpu 3p P H T 3pP gGpp900-appp3000-sd-slotregulator-fixed pp3000_sd_slot:defaultH   G(ppvar-sd-card-ioregulator-gpio ppvar_sd_card_io:defaultH  F 4F!w@2Z w@ 2ZG)pp3300-trackpadap-rtc-clk fixed-clock_oxin32kmax98357amaxim,max98357a:defaultH  okayGsoundrockchip,rk3399-gru-sound  pp1250-s3regulator-fixed pp1250_s3     Gpp1250-dvddregulator-fixed pp1250_dvdd:defaultH  F  GEpp900-s0regulator-fixed pp900_s0     Gppvarn-lcdregulator-fixed ppvarn_lcd:defaultH   ppvarp-lcdregulator-fixed ppvarp_lcd:defaultH   pp900-s3regulator-fixed pp900_s3     pp2800-avddregulator-fixed pp2800_avdd:defaultH  F d GDbt-3v3regulator-fixed bt_3v3:defaultH   Gwlan-3v3regulator-fixed wlan_3v3:defaultH   ' Gbacklightpwm-backlight :defaultH B@Gdmic dmic-codec :defaultH Ggpio-keys gpio-keys:defaultHswitch-pen-insert Pen Insert 4'#.? compatibleinterrupt-parent#address-cells#size-cellschassis-typemodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusrockchip,pd-idle-nsrockchip,sr-idle-nsrockchip,sr-mc-gate-idle-nsrockchip,srpd-lite-idle-nsrockchip,standby-idle-nsrockchip,ddr3_odt_dis_freqrockchip,lpddr3_odt_dis_freqrockchip,lpddr4_odt_dis_freqrockchip,sr-mc-gate-idle-dis-freq-hzrockchip,srpd-lite-idle-dis-freq-hzrockchip,standby-idle-dis-freq-hzcenter-supplyinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiospinctrl-namespinctrl-0vpcie3v3-supplyvpcie1v8-supplyvpcie0v9-supplypcie-reset-suspendinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthassigned-clocksassigned-clock-ratesbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removableextcondr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsi2c-scl-falling-time-nsi2c-scl-rising-time-nshid-descr-addrreset-gpiosavdd-supplydvdd-supplydovdd-supplydata-lanesreg-shiftreg-io-widthdmasdma-namespinctrl-1spi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countgoogle,usb-port-idkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymappolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplydlg,micbias-lvldlg,mic-amp-in-selVDD-supplyVDDMIC-supplyVDDIO-supplydlg,adc-1bit-rptdlg,btn-avgdlg,btn-cfgdlg,mic-det-thrdlg,jack-ins-debdlg,jack-det-ratedlg,jack-rem-debdlg,a-d-btn-thrdlg,d-b-btn-thrdlg,b-c-btn-thrdlg,c-mic-btn-thr#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightenable-gpiospower-supplymali-supplygpio-controller#gpio-cellsgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitctrl-supplyctrl-voltage-rangeregulator-settling-time-up-usenable-active-highgpiosdmode-gpiossdmode-delayrockchip,cpurockchip,codecstartup-delay-usregulator-enable-ramp-delaydmicen-gpioswakeup-delay-mslabellinux,codelinux,input-typewakeup-source