8( ',Qualcomm Technologies, Inc. SM4450 QRD2qcom,sm4450-qrdqcom,sm4450chosen =console=hvc0clocksxo-board 2fixed-clockFVsleep-clk 2fixed-clockF}Vcpus cpu@0ccpu2arm,cortex-a55ospscipsci l2-cache2cachel3-cache2cachecpu@100ccpu2arm,cortex-a55ospscipsci l2-cache2cachecpu@200ccpu2arm,cortex-a55ospscipscil2-cache2cachecpu@300ccpu2arm,cortex-a55ospscipscil2-cache2cachecpu@400ccpu2arm,cortex-a55ospscipscil2-cache2cachecpu@500ccpu2arm,cortex-a55ospsci pscil2-cache2cache cpu@600ccpu2arm,cortex-a78ospsci pscil2-cache2cache cpu@700ccpu2arm,cortex-a78ospsci pscil2-cache2cache cpu-mapcluster0core0 core1 core2core3core4core5core6core7idle-statespscicpu-sleep-0-02arm,idle-state@  ->cpu-sleep-1-02arm,idle-state@ X->domain-idle-statescluster-sleep-02domain-idle-stateAD  -cluster-sleep-12domain-idle-stateA3D  -!fmemory@a0000000cmemoryopmu2arm,armv8-pmuv3 Opsci 2arm,psci-1.0zsmcpower-domain-cpu0Znpower-domain-cpu1Znpower-domain-cpu2Znpower-domain-cpu3Znpower-domain-cpu4Znpower-domain-cpu5Znpower-domain-cpu6Znpower-domain-cpu7Znpower-domain-cpu-cluster0Znsoc@0  2simple-bushwlock@1f400002qcom,tcsr-mutexointerrupt-controller@b2200002qcom,sm4450-pdcqcom,pdc o "@d$^^}?interrupt-controller@17200000 2arm,gic-v3 o & O timer@174200002arm,armv7-timer-memoB  frame@17421000oBB Oframe@17423000oB0 O  disabledframe@17425000oBP O  disabledframe@17427000oBp O  disabledframe@17429000oB O  disabledframe@1742b000oB O  disabledframe@1742d000oB O disabledtimer2arm,armv8-timer0O   aliases interrupt-parent#address-cells#size-cellsmodelcompatiblebootargsclock-frequency#clock-cellsdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-names#cooling-cellsphandlecache-levelcache-unifiedcpuentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopinterrupts#power-domain-cellsdomain-idle-statesrangesdma-ranges#hwlock-cellsqcom,pdc-ranges#interrupt-cellsinterrupt-controller#redistributor-regionsredistributor-strideframe-numberstatus