I8D(D ,Huawei Nexus 6P2huawei,anglerqcom,msm8994=handsetJV  cZaliasesq/soc@0/mmc@f9824900v/soc@0/mmc@f98a4900{/soc@0/serial@f991e000chosenserial0:115200n8clocksxo-board 2fixed-clock$ xo_boardsleep-clk 2fixed-clock sleep_clkcpus cpu@0cpu2arm,cortex-a53pscil2-cache2cachecpu@1cpu2arm,cortex-a53pscicpu@2cpu2arm,cortex-a53pscicpu@3cpu2arm,cortex-a53pscicpu@100cpu2arm,cortex-a57pscil2-cache2cachecpu@101cpu2arm,cortex-a57psci cpu@102cpu2arm,cortex-a57psci cpu@103cpu2arm,cortex-a57psci cpu-mapcluster0core0core1core2core3cluster1core0core1 core2 core3 firmwarescm2qcom,scm-msm8994qcom,scmmemory@80000000memorypmu2arm,cortex-a53-pmu psci 2arm,psci-0.2hvcremoteproc$2qcom,msm8994-rpm-procqcom,rpm-procsmd-edge   (6rpm-requests2qcom,rpm-msm8994 Frpm_requestsclock-controller2qcom,rpmcc-msm8994qcom,rpmcc;power-controller2qcom,msm8994-rpmpdXl opp-table2operating-points-v2 opp1opp2opp3opp4opp5opp6reserved-memory dfps_data_mem@3400000@memory@3401000@smem_region@6a00000 memory@7000000memory@ca00000 memory@c64000002qcom,rmtfs-mem@memory@c6700000pmemory@c7000000memory@c9400000@reserved@6c00000@tzapp@4800000reserved@63000000psmem 2qcom,smemsmp2p-lpass 2qcom,smp2p    6master-kernelmaster-kernelslave-kernel slave-kernel#smp2p-modem 2qcom,smp2p   6master-kernelmaster-kernelslave-kernel slave-kernel#soc@0  2simple-businterrupt-controller@f90000002qcom,msm-qgic2# mailbox@f900d000%2qcom,msm8994-apcs-kpss-globalsyscon 4 watchdog@f9017000$2qcom,apss-wdt-msm8994qcom,kpss-wdtp@G timer@f9020000 2arm,armv7-timer-memframe@f9021000S  frame@f9023000S  0 `disabledframe@f9024000S  @ `disabledframe@f9025000S  P `disabledframe@f9026000S  ` `disabledframe@f9027000S p `disabledframe@f9028000S  `disabledusb@f92f88002qcom,msm8994-dwc3qcom,dwc3/  @rmsgcoreifacesleepmock_utmissr$'usb@f9200000 2snps,dwc3   high-speed peripheralmmc@f9824900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@ hccore{hc_irqpwr_irq@vhgifacecorexo$defaultsleep2<FP`okay^mmc@f98a4900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@ hccore}hc_irqpwr_irq@igifacecorexo$defaultsleep 2 < ! m"dF `disableddma-controller@f99040002qcom,bam-v1.7.0@ @:gbam_clkv%serial@f991e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm l gcoreiface@H:$defaultsleep2#<$`okayi2c@f99230002qcom,i2c-qup-v2.2.10 _@;: gcoreiface% % txrx$defaultsleep2&<'  `disabledspi@f99230002qcom,spi-qup-v2.2.10 _@<: gcoreiface% % txrx$defaultsleep2(<)  `disabledi2c@f99240002qcom,i2c-qup-v2.2.1@ `@=: gcoreiface%%txrx$defaultsleep2*<+  `disabledi2c@f99260002qcom,i2c-qup-v2.2.1` b@A: gcoreiface%%txrx$defaultsleep2,<-  `disabledi2c@f99270002qcom,i2c-qup-v2.2.1p c@C: gcoreiface..txrx$defaultsleep2/<0  `disabledi2c@f99280002qcom,i2c-qup-v2.2.1 d@E: gcoreiface%%txrx$defaultsleep21<2  `disableddma-controller@f99440002qcom,bam-v1.7.0@ @Mgbam_clkv.serial@f995e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm r gcoreiface@[M..txrx$defaultsleep23<4 `disabledi2c@f99630002qcom,i2c-qup-v2.2.10 e@NM gcoreiface. . txrx$defaultsleep25<6  `disabledspi@f99660002qcom,spi-qup-v2.2.1` h@UM gcoreiface..txrx$defaultsleep27<8  `disabledi2c@f99670002qcom,i2c-qup-v2.2.1p i@VM gcoreifacej..txrx$defaultsleep29<:  `disabledclock-controller@fc4000002qcom,gcc-msm8994X@  gxosleep@sram@fc4280002qcom,rpm-msg-ramB@restart@fc4ab000 2qcom,psholdJspmi@fc4cf0002qcom,spmi-pmic-arbLLL coreintrcnfg periph_irq  #hwlock@fd484000(2qcom,msm8994-tcsr-mutexqcom,tcsr-mutexH@pinctrl@fd5100002qcom,msm8994-pinctrlQ@ "#U"blsp1-uart2-default-state 0gpio4gpio5 5blsp_uart2>M#blsp1-uart2-sleep-state 0gpio4gpio55gpio>Z$blsp2-uart2-default-state0gpio45gpio46gpio47gpio48 5blsp_uart8>M3blsp2-uart2-sleep-state0gpio45gpio46gpio47gpio485gpio>M4i2c1-default-state 0gpio2gpio3 5blsp_i2c1>M&i2c1-sleep-state 0gpio2gpio35gpio>M'i2c2-default-state 0gpio6gpio7 5blsp_i2c2>M*i2c2-sleep-state 0gpio6gpio75gpio>M+i2c4-default-state0gpio19gpio20 5blsp_i2c4>M,i2c4-sleep-state0gpio19gpio205gpio>Z-i2c5-default-state0gpio23gpio24 5blsp_i2c5>M/i2c5-sleep-state0gpio23gpio245gpio>M0i2c6-default-state0gpio28gpio27 5blsp_i2c6>M1i2c6-sleep-state0gpio28gpio275gpio>M2i2c7-default-state0gpio44gpio43 5blsp_i2c7>M5i2c7-sleep-state0gpio44gpio435gpio>M6blsp2-spi10-default-state7default-pins0gpio53gpio54gpio55 5blsp_spi10> Zcs-pins0gpio675gpio>Mblsp2-spi10-sleep-state0gpio53gpio54gpio555gpio>M8i2c11-default-state0gpio83gpio84 5blsp_i2c11>M9i2c11-sleep-state0gpio83gpio845gpio>M:blsp1-spi1-default-state(default-pins0gpio0gpio1gpio3 5blsp_spi1> Zcs-pins0gpio85gpio>Mblsp1-spi1-sleep-state0gpio0gpio1gpio35gpio>M)clk-on-state 0sdc1_clkM>clk-off-state 0sdc1_clkM>cmd-on-state 0sdc1_cmdi>cmd-off-state 0sdc1_cmdi>data-on-state 0sdc1_datai>data-off-state 0sdc1_datai>rclk-on-state 0sdc1_rclkZrclk-off-state 0sdc1_rclkZsdc2-clk-on-state 0sdc2_clkM> sdc2-clk-off-state 0sdc2_clkM>sdc2-cmd-on-state 0sdc2_cmdi> sdc2-cmd-off-state 0sdc2_cmdi> sdc2-data-on-state 0sdc2_datai> sdc2-data-off-state 0sdc2_datai>!clock-controller@fd8c00002qcom,mmcc-msm8994RXYgxogpll0mmssnoc_ahboxili_gfx3d_clk_srcdsi0plldsi0pllbytedsi1plldsi1pllbytehdmipll0@;; (s<<<<< /E<98p#F<sram@fdd000002qcom,msm8974-ocmem   ctrlmem  @;"<r gcoreiface gmu-sram@0timer2arm,armv8-timer0vph-pwr-regulator2regulator-fixedvvph_pwr66 interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typeqcom,msm-idqcom,pmic-idqcom,board-idmmc1mmc2serial0stdout-path#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregenable-methodnext-level-cachecache-levelcache-unifiedcpuinterruptsqcom,ipcqcom,smd-edgeqcom,remote-pidqcom,smd-channels#power-domain-cellsoperating-points-v2opp-levelrangesno-mapqcom,client-idmemory-regionqcom,rpm-msg-ramhwlocksqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#mbox-cellsclockstimeout-secframe-numberstatusclock-namesassigned-clocksassigned-clock-ratespower-domainsqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkmaximum-speeddr_modereg-namesinterrupt-namespinctrl-namespinctrl-0pinctrl-1bus-widthnon-removablemmc-hs400-1_8vcd-gpios#dma-cellsqcom,eeqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-names#reset-cellsqcom,channel#hwlock-cellsgpio-controllergpio-ranges#gpio-cellsgpio-reserved-rangespinsfunctiondrive-strengthbias-disablebias-pull-downbias-pull-upregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on