8x(i@(hisilicon,hi6220-hikeyhisilicon,hi6220 +7HiKey Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D idle-statesHpscicpu-sleeparm,idle-stateUf} cluster-sleeparm,idle-stateUf} cpu@0arm,cortex-a53cpupsci    #27cpu@1arm,cortex-a53cpupsci    #27cpu@2arm,cortex-a53cpupsci    #27cpu@3arm,cortex-a53cpupsci    #27cpu@100arm,cortex-a53cpupsci   #27cpu@101arm,cortex-a53cpupsci   #27cpu@102arm,cortex-a53cpupsci   #27cpu@103arm,cortex-a53cpupsci   #27 l2-cache0cacheLX l2-cache1cacheLXopp-table-0operating-points-v2f opp00q exހ opp01qxހ opp02q+s@x opp03q98px` opp04qGxKP interrupt-controller@f6801000 arm,gic-400@ @ `   timerarm,armv8-timer 0   soc simple-bus+sram@fff80000!hisilicon,hi6220-sramctrlsyscon ao_ctrl@f7800000hisilicon,hi6220-aoctrlsyscon sys_ctrl@f7030000 hisilicon,hi6220-sysctrlsyscon media_ctrl@f4410000"hisilicon,hi6220-mediactrlsysconATpm_ctrl@f7032000hisilicon,hi6220-pmctrlsyscon acpu_sctrl@f6504000#hisilicon,hi6220-acpu-sctrlsysconP@Xmedianoc_ade@f4520000sysconR@Sstub_clockhisilicon,hi6220-stub-clkmbox-tx  serial@f8015000arm,pl011arm,primecellP $$$uartclkapb_pclkserial@f7111000arm,pl011arm,primecell %uartclkapb_pclk!default /9 >rxtxHokayO)_рbluetooth ti,wl1835-st t ext_clockserial@f7112000arm,pl011arm,primecell  &uartclkapb_pclk!default/Hokay LS-UART0serial@f7113000arm,pl011arm,primecell0 'uartclkapb_pclk!default/Hokay LS-UART1serial@f7114000arm,pl011arm,primecell@ (uartclkapb_pclk!default/ Hdisableddma@f7370000hisilicon,k3-dma-1.07  T  hi6220_dmaHokaytimer@f8008000arm,sp804arm,primecelltimer1timer2apb_pclkrtc@f8003000arm,pl031arm,primecell0  % apb_pclkrtc@f8004000arm,pl031arm,primecell@ & apb_pclkpinmux@f7010000pinctrl-single|+ p P X ` h p x       ! + 0 8 J z ~    !default/!"#$%,gpio-range6 boot-sel-pinsW!emmc-pinsPW  $;sd-pins0W  @sd-idle-pins0W  Csdio-pins0W(,048<Hsdio-idle-pins0W(,048<Kisp-pinsW$(,048<@DHLPTX\`hkadc-ssi-pinsWh"codec-clk-pinsWl#codec-pins Wptx|fm-pins Wbt-pins Wpwm-in-pinsW$bl-pwm-pinsW%uart0-pinsWuart1-pins Wuart2-pins Wuart3-pins Wuart4-pins Wuart5-pinsWi2c0-pinsW0i2c1-pinsW2i2c2-pinsW4spi0-pins W-pinmux@f7010800pinconf-single+ !default/&'()*boot-sel-cfg-pinsWkp&hkadc-ssi-cfg-pinsWlkp'emmc-clk-cfg-pinsWk p<emmc-cfg-pinsHW  $(kp=emmc-rst-cfg-pinsW,kp>sd-clk-cfg-pinsW k0pAsd-clk-cfg-idle-pinsW kpDsd-cfg-pins(W k pBsd-cfg-idle-pins(W kpEsdio-clk-cfg-pinsW4k pIsdio-clk-cfg-idle-pinsW4kpLsdio-cfg-pins(W8<@DHkpJsdio-cfg-idle-pins(W8<@DHkpMisp-cfg-func1-pinsxW(,048<@DHLPX\`dkpisp-cfg-idle1-pinsW48kpisp-cfg-func2-pinsWTkpcodec-clk-cfg-pinsWpkp(codec-clk-cfg-idle-pinsWpkpcodec-cfg-func1-pinsWtkpcodec-cfg-func2-pinsWx|kpcodec-cfg-idle2-pinsWx|kpfm-cfg-pins Wkpbt-cfg-pins Wkpbt-cfg-idle-pins Wkppwm-in-cfg-pinsWkp)bl-pwm-cfg-pinsWkp*uart0-cfg-func1-pinsWkpuart0-cfg-func2-pinsWkpuart1-cfg-func1-pinsWkpuart1-cfg-func2-pinsWkpuart2-cfg-pins Wkpuart3-cfg-pins Wkpuart4-cfg-pins Wkpuart5-cfg-pinsWkpi2c0-cfg-pinsWkp1i2c1-cfg-pinsWkp3i2c2-cfg-pinsWkp5spi0-cfg-pins Wkp.pinmux@f8001800pinconf-singlex+ !default/+rstout-n-cfg-pinsWkp+pmu-peri-en-cfg-pinsWkpsysclk0-en-cfg-pinsWkpjtag-tdo-cfg-pinsW k prf-reset-cfg-pinsWptkpgpio@f8011000arm,pl061arm,primecell 4 apb_pclkOPWR_HOLDDSI_SELUSB_HUB_RESET_NUSB_SELHDMI_PDWL_REG_ONPWRON_DET5V_HUB_EN6gpio@f8012000arm,pl061arm,primecell  5 apb_pclk:SD_DETHDMI_INTPMU_IRQ_NWL_HOST_WAKENCNCNCBT_REG_ONgpio@f8013000arm,pl061arm,primecell0 6 apb_pclkBGPIO-AGPIO-BGPIO-CGPIO-DGPIO-EUSB_ID_DETUSB_VBUS_DETGPIO-Hgpio@f8014000arm,pl061arm,primecell@ 7,P apb_pclk%GPIO3_0NCNCNCWLAN_ACTIVENCNC}gpio@f7020000arm,pl061arm,primecell 8,X apb_pclk?USER_LED1USER_LED2USER_LED3USER_LED4SD_SELNCNCBT_ACTIVE|gpio@f7021000arm,pl061arm,primecell 9,` apb_pclk?NCNC[UART1_RxD][UART1_TxD][AUX_SSI1]NC[PCM_CLK][PCM_FS]gpio@f7022000arm,pl061arm,primecell  :,h apb_pclk=[SPI0_DIN][SPI0_DOUT][SPI0_CS][SPI0_SCLK]NCNCNCGPIO-G/gpio@f7023000arm,pl061arm,primecell0 ;,p apb_pclk$NCNCNCNC[PCM_DI][PCM_DO]NCNCgpio@f7024000arm,pl061arm,primecell@ < ,x, apb_pclkNC[CEC_CLK_19_2MHZ]NCgpio@f7025000arm,pl061arm,primecellP =, apb_pclk'GPIO-JGPIO-LNCNCNCNC[ISP_CCLK0]gpio@f7026000arm,pl061arm,primecell` > ,, apb_pclk?BOOT_SEL[ISP_CCLK1]GPIO-IGPIO-KNCNC[I2C2_SDA][I2C2_SCL]gpio@f7027000arm,pl061arm,primecellp ? ,, apb_pclk"[I2C3_SDA][I2C3_SCL]NCNCNCgpio@f7028000arm,pl061arm,primecell @ ,!,+ apb_pclk8[BT_PCM_XFS][BT_PCM_DI][BT_PCM_DO]NCNCNCNCGPIO-Fgpio@f7029000arm,pl061arm,primecell A,0 apb_pclkh[UART0_RX][UART0_TX][BT_UART1_CTS][BT_UART1_RTS][BT_UART1_RX][BT_UART1_TX][UART0_CTS][UART0_RTS]gpio@f702a000arm,pl061arm,primecell B,8 apb_pclkZ[UART0_RxD][UART0_TxD][I2C0_SCL][I2C0_SDA][I2C1_SCL][I2C1_SDA][I2C2_SCL][I2C2_SDA]gpio@f702b000arm,pl061arm,primecell C0,J,z,~ apb_pclk NCgpio@f702c000arm,pl061arm,primecell D, apb_pclkgpio@f702d000arm,pl061arm,primecell E, apb_pclkgpio@f702e000arm,pl061arm,primecell F, apb_pclkgpio@f702f000arm,pl061arm,primecell G, apb_pclkspi@f7106000arm,pl022arm,primecell` 2sspclkapb_pclk!default/-.  /Hokayi2c@f7100000snps,designware-i2c , ,!default/01Hokayi2c@f7101000snps,designware-i2c -,!default/23Hokayi2c@f7102000snps,designware-i2c  .,!default/45Hokay+adv7533@39 adi,adv75339  069Gports+port@0endpointX7Wport@2endpointX8Pusbphyhisilicon,hi6220-usb-phyhs9~:usb@f72c0000hisilicon,hi6220-usb,: usb2-phyotgotg< Mmailbox@f7510000hisilicon,hi6220-mbox Q ^dwmmc0@f723d000hisilicon,hi6220-dw-mshc# Hciubiureset!default/;<=> *?dwmmc1@f723e000hisilicon,hi6220-dw-mshc~# I+ciubiureset !defaultidle /@AB 6CDE@Rcp}F*G  dwmmc2@f723f000hisilicon,hi6220-dw-mshc# Jciubiureset !defaultidle /HIJ 6KLM *NO+wlcore@2 ti,wl1835 watchdog@f8005000arm,sp805arm,primecellP  wdog_clkapb_pclktsensor@0,f7030700hisilicon,tsensor  thermal_clkQi2s@f7118000hisilicon,hi6210-i2s { 8dacodeci2s-base9>rxtxGportsport@0~endpointXPi2s8thermal-zonescls0-thermald' 9Qtripstrip-point0IUpassivetrip-point1I$UpassiveRcooling-mapsmap0`R`e ade@f4100000hisilicon,hi6220-adex tade_base~ST sTTT(clk_ade_coreclk_codec_jpegclk_ade_pixOTT_u**HokayportendpointXUVdsi@f4107800hisilicon,hi6220-dsixTpclkHokayports+port@0endpointXVUport@1endpoint@0XW7debug@f6590000&arm,coresight-cpu-debugarm,primecellY; apb_pclkDdebug@f6592000&arm,coresight-cpu-debugarm,primecellY ; apb_pclkDdebug@f6594000&arm,coresight-cpu-debugarm,primecellY@; apb_pclkDdebug@f6596000&arm,coresight-cpu-debugarm,primecellY`; apb_pclkDdebug@f65d0000&arm,coresight-cpu-debugarm,primecell]; apb_pclkDdebug@f65d2000&arm,coresight-cpu-debugarm,primecell] ; apb_pclkDdebug@f65d4000&arm,coresight-cpu-debugarm,primecell]@; apb_pclkDdebug@f65d6000&arm,coresight-cpu-debugarm,primecell]`; apb_pclkD gpu@f4080000#hisilicon,hi6220-maliarm,mali-450 ~~~~~~~~~~~8gpgpmmupppp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3TT buscoreOTT_eDao_g3dmedia_g3dTfunnel@f6401000+arm,coresight-dynamic-funnelarm,primecell@X apb_pclkout-portsportendpointXY[in-portsportendpointXZbetf@f6402000 arm,coresight-tmcarm,primecell@ X apb_pclkin-portsportendpointX[Yout-portsportendpointX\]replicator arm,coresight-static-replicatorX apb_pclkin-portsportendpointX]\out-ports+port@0endpointX^`port@1endpointX_aetr@f6404000 arm,coresight-tmcarm,primecell@@X apb_pclkin-portsportendpointX`^tpiu@f6405000!arm,coresight-tpiuarm,primecell@PX apb_pclkin-portsportendpointXa_funnel@f6501000+arm,coresight-dynamic-funnelarm,primecellPX apb_pclkout-portsportendpointXbZin-ports+port@0endpointXckport@1endpointXdlport@2endpointXemport@3endpointXfnport@4endpointXgoport@5endpointXhpport@6endpointXiqport@7endpointXjretm@f659c000"arm,coresight-etm4xarm,primecellYX apb_pclkDsout-portsportendpointXkcetm@f659d000"arm,coresight-etm4xarm,primecellYX apb_pclkDtout-portsportendpointXldetm@f659e000"arm,coresight-etm4xarm,primecellYX apb_pclkDuout-portsportendpointXmeetm@f659f000"arm,coresight-etm4xarm,primecellYX apb_pclkDvout-portsportendpointXnfetm@f65dc000"arm,coresight-etm4xarm,primecell]X apb_pclkDwout-portsportendpointXogetm@f65dd000"arm,coresight-etm4xarm,primecell]X apb_pclkDxout-portsportendpointXphetm@f65de000"arm,coresight-etm4xarm,primecell]X apb_pclkDyout-portsportendpointXqietm@f65df000"arm,coresight-etm4xarm,primecell]X apb_pclkD zout-portsportendpointXrjcti@f6403000 arm,coresight-ctiarm,primecell@0X apb_pclkcti@f6598000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellYX apb_pclkDscti@f6599000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellYX apb_pclkDtcti@f659a000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellYX apb_pclkDucti@f659b000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellYX apb_pclkDvcti@f65d8000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecell]X apb_pclkDwcti@f65d9000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecell]X apb_pclkDxcti@f65da000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecell]X apb_pclkDycti@f65db000:arm,coresight-cti-v8-archarm,coresight-ctiarm,primecell]X apb_pclkD zaliases/soc/serial@f8015000/soc/serial@f7111000/soc/serial@f7112000/soc/serial@f7113000chosenserial3:115200n8memory@0memory` `A"reserved-memory+ramoops@21f00000ramoops!linux,cmashared-dma-poolreboot-mode-syscon@5f01000sysconsimple-mfdreboot-modesyscon-reboot-mode-4wfU@wfUPwfUregulator@0regulator-fixed^SYS_5VmLK@LK@{regulator@1regulator-fixed^VDD_3V3m2Z2Z{Nregulator@2regulator-fixed^5V_HUBmLK@LK@ 6{9wl1835-pwrseqmmc-pwrseq-simple 6 ext_clock  Oleds gpio-ledsled-user-1 green:user1 {|  heartbeatled-user-2 green:user2 {| mmc0led-user-3 green:user3 {| mmc1led-user-4 green:user4 {| noneled-wlan yellow:wlan {} phy0tx/offled-btblue:bt {|  hci0-power/offpmic@f8000000hisilicon,hi655x-pmic =regulatorsLDO2 ^LDO2_2V8m&%0HxLDO7 ^LDO7_SDIOmw@2ZHxFLDO10 ^LDO10_2V85mw@-HhGLDO13 ^LDO13_1V8mj0HxLDO14 ^LDO14_2V8m&%0HxLDO15 ^LDO15_1V8mj0HxLDO17 ^LDO17_2V5m&%0HxLDO19 ^LDO19_3V0mw@-Hh?LDO21 ^LDO21_1V8m-PHxLDO22 ^LDO22_1V2m OHxfirmwareopteelinaro,optee-tz=smcsound_cardaudio-graph-cardd~ compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpuentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usphandlewakeup-latency-usdevice_typeregenable-methodnext-level-cacheclocksoperating-points-v2cpu-idle-states#cooling-cellsdynamic-power-coefficientcache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-ns#interrupt-cellsinterrupt-controllerinterruptsranges#clock-cells#reset-cellshisilicon,hi6220-clk-srammbox-namesmboxesclock-namespinctrl-namespinctrl-0dmasdma-namesstatusassigned-clocksassigned-clock-ratesenable-gpioslabel#dma-cellsdma-channelsdma-requestsdma-no-ccidma-type#pinctrl-cells#gpio-range-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,drive-strengthgpio-controller#gpio-cellsgpio-line-namesgpio-rangesbus-idenable-dmanum-cscs-gpiosi2c-sda-hold-time-nspd-gpiosadi,dsi-lanes#sound-dai-cellsremote-endpoint#phy-cellsphy-supplyhisilicon,peripheral-sysconphysphy-namesdr_modeg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-size#mbox-cellsresetsreset-namescap-mmc-highspeednon-removablebus-widthvmmc-supplypinctrl-1card-detect-delaycap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50vqmmc-supplydisable-wpcd-gpioscap-power-off-cardmmc-pwrseq#thermal-sensor-cellshisilicon,sysctrl-syscondai-formatpolling-delaypolling-delay-passivesustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicereg-nameshisilicon,noc-syscondma-coherentinterrupt-namesarm,cs-dev-assocserial0serial1serial2serial3stdout-pathrecord-sizeconsole-sizeftrace-sizereusablelinux,cma-defaultoffsetmode-normalmode-bootloadermode-recoveryregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onvin-supplygpioreset-gpiospost-power-on-delay-mspower-off-delay-uslinux,default-triggerpanic-indicatordefault-statepmic-gpiosregulator-enable-ramp-delaydais