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disabledaldo3<2Z T2Z  lvcc3v3-ext2 disabledbldo1(<w@Tw@lvcc1v8bbldo2<w@Tw@ lvcc1v8-2 disabledbldo3bldo4cldo1<&% T&% lvcc2v5cldo2cldo3dcdca(< \TÈàlvdd-cpudcdcc(< \T0 lvdd-gpu-sysdcdcd(<À€TÀ€ lvdd-dramdcdce(<2Z T2Z  lvcc-eth-mmcb swaliases{/soc/serial@5000000chosenƒserial0:115200n8vcc5v2regulator-fixedlvcc-5v<LK@TLK@(b interrupt-parent#address-cells#size-cellsmodelcompatibledevice_typeregenable-methodclocksphandlerangesno-map#clock-cellsclock-frequencyclock-output-namesinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-names#reset-cellsgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellspinsfunctiondrive-strengthbias-pull-upresetsreset-namespinctrl-namespinctrl-0statusmax-frequencycap-sd-highspeedcap-mmc-highspeedmmc-ddr-3_3vcap-sdio-irqvmmc-supplycd-gpiosbus-widthvqmmc-supplynon-removablecap-mmc-hw-resetmmc-ddr-1_8vmmc-hs200-1_8vreg-shiftreg-io-widthinterrupt-namessysconphysphy-namesextcondr_modereg-names#phy-cellsx-powers,self-working-modevina-supplyvinb-supplyvinc-supplyvind-supplyvine-supplyaldoin-supplybldoin-supplycldoin-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-nameserial0stdout-path