g8c(b ,Freescale i.MX8QXP MEK2fsl,imx8qxp-mekfsl,imx8qxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000/bus@5a000000/i2c@5a800000/bus@5a000000/i2c@5a810000/bus@5a000000/i2c@5a820000/bus@5a000000/i2c@5a830000/bus@5b000000/mmc@5b010000/bus@5b000000/mmc@5b020000/bus@5b000000/mmc@5b030000/bus@5d000000/mailbox@5d1b0000/bus@5d000000/mailbox@5d1c0000/bus@5d000000/mailbox@5d1d0000/bus@5d000000/mailbox@5d1e0000/bus@5d000000/mailbox@5d1f0000/bus@5a000000/serial@5a060000/bus@5a000000/serial@5a070000/bus@5a000000/serial@5a080000/bus@5a000000/serial@5a090000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000 /vpu@2c000000/vpu-core@2d0a0000cpus cpu@0cpu2arm,cortex-a35psci!@3@M@_l } cpu@1cpu2arm,cortex-a35psci!@3@M@_l } cpu@2cpu2arm,cortex-a35psci!@3@M@_l } cpu@3cpu2arm,cortex-a35psci!@3@M@_l } l2-cache02cache#@5opp-table2operating-points-v2opp-9000000005B@Iopp-1200000000GIinterrupt-controller@51a00000 2arm,gic-v3 QQ    reserved-memory )decoder-boot@840000000encoder-boot@86000000 0decoder-rpc@920000000dsp@92400000@0encoder-rpc@94400000@p0pmu2arm,cortex-a35-pmu psci 2arm,psci-1.0 smcscu 2fsl,imx-scu 7tx0rx0gip3$Bimx8qx-pd2fsl,imx8qxp-scu-pdfsl,scu-pdIclock-controller2fsl,imx8qxp-clk]}jxtal_32KHzxtal_24Mhzpinctrl2fsl,imx8qxp-iomuxcfec1grpv5 4 & % ' ( ) * , - . / 0 1 5ioexprstgrp vZ!(isl29023grp v[!*lpi2c1grpv!!'lpuart0grpvo p  usdhc1grpv A ! ! ! !!!!!!A.usdhc2grpTvA! !!!"!#!!0imx8qx-ocotp2fsl,imx8qxp-scu-ocotp scu-key"2fsl,imx8qxp-sc-keyfsl,imx-sc-keytokayrtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermaltimer2arm,armv8-timer0   clock-xtal32k 2fixed-clock] xtal_32KHzclock-xtal24m 2fixed-clock]n6 xtal_24MHzthermal-zonescpu-thermal0ctripstrip0passive trip1 criticalcooling-mapsmap0% 0* pmic-thermal0tripstrip0passivetrip1H criticalcooling-mapsmap0%0* bus@58000000 2simple-bus )XXclock-img-ipg 2fixed-clock]  img_ipg_clkjpegdec@58400000X@05678}jperipg9I (^2nxp,imx8qxp-jpgdecjpegenc@58450000XE01234}jperipg9I (^2nxp,imx8qxp-jpgencclock-controller@585d00002fsl,imx8qxp-lpcgX]]}l0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clk^clock-controller@585f00002fsl,imx8qxp-lpcgX_]}l0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clk^vpu@2c000000 ),,,^okay2nxp,imx8qxp-vpumailbox@2d0000002fsl,imx6sx-mu- z^okaymailbox@2d0200002fsl,imx6sx-mu- z^okaymailbox@2d0400002fsl,imx6sx-mu- z^ disabledvpu-core@2d080000-2nxp,imx8q-vpu-decoder^ 7tx0tx1rx$Bokayvpu-core@2d090000-2nxp,imx8q-vpu-encoder^ 7tx0tx1rx$Bokayvpu-core@2d0a0000- 2nxp,imx8q-vpu-encoder^ 7tx0tx1rx$B disabledbus@59000000 2simple-bus )YYclock-audio-ipg 2fixed-clock]'audio_ipg_clkclock-controller@595800002fsl,imx8qxp-lpcgYX] } l4dsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clk^clock-controller@595900002fsl,imx8qxp-lpcgYY]}ldsp_ram_lpcg_ipg_clk^dsp@596e80002fsl,imx8qxp-dspYn}jipgocramcore ^7txdb0txdb1rxdb0rxdb10Bokaybus@5a000000 2simple-bus )ZZclock-dma-ipg 2fixed-clock]' dma_ipg_clk$serial@5a060000Z } jipgbaud^9okay2fsl,imx8qxp-lpuartdefault serial@5a070000Z }!! jipgbaud^: disabled2fsl,imx8qxp-lpuartserial@5a080000Z }"" jipgbaud^; disabled2fsl,imx8qxp-lpuartserial@5a090000Z  }## jipgbaud^< disabled2fsl,imx8qxp-lpuartclock-controller@5a4600002fsl,imx8qxp-lpcgZF]}9$l'uart0_lpcg_baud_clkuart0_lpcg_ipg_clk^9clock-controller@5a4700002fsl,imx8qxp-lpcgZG]}:$l'uart1_lpcg_baud_clkuart1_lpcg_ipg_clk^:!clock-controller@5a4800002fsl,imx8qxp-lpcgZH]};$l'uart2_lpcg_baud_clkuart2_lpcg_ipg_clk^;"clock-controller@5a4900002fsl,imx8qxp-lpcgZI]}<$l'uart3_lpcg_baud_clkuart3_lpcg_ipg_clk^<#i2c@5a800000Z@ }%jper 9`In6^` disabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a810000Z@ }&jper 9aIn6^aokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c default'(i2c-switch@712nxp,pca9646nxp,pca9546 q )i2c@0 gpio@682maxim,max7322hi2c@1 i2c@2 pressure-sensor@60 2fsl,mpl3115`i2c@3 gpio@1a 2nxp,pca9557gpio@1d 2nxp,pca9557light-sensor@44default*2isil,isl29023D)i2c@5a820000Z@ }+jper 9bIn6^b disabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a830000Z@ },jper 9cIn6^c disabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cclock-controller@5ac000002fsl,imx8qxp-lpcgZ]}`$l i2c0_lpcg_clki2c0_lpcg_ipg_clk^`%clock-controller@5ac100002fsl,imx8qxp-lpcgZ]}a$l i2c1_lpcg_clki2c1_lpcg_ipg_clk^a&clock-controller@5ac200002fsl,imx8qxp-lpcgZ]}b$l i2c2_lpcg_clki2c2_lpcg_ipg_clk^b+clock-controller@5ac300002fsl,imx8qxp-lpcgZ]}c$l i2c3_lpcg_clki2c3_lpcg_ipg_clk^c,bus@5b000000 2simple-bus )[[clock-conn-axi 2fixed-clock]CU conn_axi_clk9clock-conn-ahb 2fixed-clock] ! conn_ahb_clkclock-conn-ipg 2fixed-clock] conn_ipg_clk8mmc@5b010000 [}--- jipgperahb^okay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc 9I default.mmc@5b020000 [}/// jipgperahb^okay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc 9I default01 +2 42mmc@5b030000 [}333 jipgperahb^ disabled"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcethernet@5b040000[0 }444 4jipgahbenet_clk_refptp9I沀sY@=O^okay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecdefault5 argmii-idj6umdio ethernet-phy@02ethernet-phy-ieee802.3-c226ethernet@5b050000[0 }777 7jipgahbenet_clk_refptp9I沀sY@=O^ disabled.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecclock-controller@5b2000002fsl,imx8qxp-lpcg[ ]}89 l9sdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clk^-clock-controller@5b2100002fsl,imx8qxp-lpcg[!]}89 l9sdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clk^/clock-controller@5b2200002fsl,imx8qxp-lpcg["]}89 l9sdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clk^3clock-controller@5b2300002fsl,imx8qxp-lpcg[#]0}988l enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clk^4clock-controller@5b2400002fsl,imx8qxp-lpcg[$]0}988l enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clk^7bus@5c000000 2simple-bus )\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu\ bus@5d000000 2simple-bus )]]clock-lsio-mem 2fixed-clock]  lsio_mem_clkclock-lsio-bus 2fixed-clock] lsio_bus_clk:gpio@5d080000]  ^ 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d090000]   ^ 2fsl,imx8qxp-gpiofsl,imx35-gpio)gpio@5d0a0000]   ^ 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0b0000]   ^ 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0c0000]   ^ 2fsl,imx8qxp-gpiofsl,imx35-gpio2gpio@5d0d0000]   ^ 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0e0000]  ^ 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0f0000]  ^ 2fsl,imx8qxp-gpiofsl,imx35-gpiomailbox@5d1b0000] z disabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1c0000] z-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1d0000] z disabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1e0000] z disabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1f0000] z disabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d200000]  z^ disabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d210000]! z^ disabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000]( z^2fsl,imx8qxp-mufsl,imx6sx-muclock-controller@5d4000002fsl,imx8qxp-lpcg]@]4}:lhpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clk^clock-controller@5d4100002fsl,imx8qxp-lpcg]A]4}:lhpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clk^clock-controller@5d4200002fsl,imx8qxp-lpcg]B]4}:lhpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clk^clock-controller@5d4300002fsl,imx8qxp-lpcg]C]4}:lhpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clk^clock-controller@5d4400002fsl,imx8qxp-lpcg]D]4}:lhpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clk^clock-controller@5d4500002fsl,imx8qxp-lpcg]E]4}:lhpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clk^clock-controller@5d4600002fsl,imx8qxp-lpcg]F]4}:lhpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clk^clock-controller@5d4700002fsl,imx8qxp-lpcg]G]4}:lhpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clk^chosen/bus@5a000000/serial@5a060000memory@80000000memory@usdhc2-vmmc2regulator-fixed SD1_SPWR-- 21 interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3vpu_core0vpu_core1vpu_core2device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapmbox-namesmboxes#power-domain-cells#clock-cellsclock-namesfsl,pinslinux,keycodesstatustimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceassigned-clocksassigned-clock-ratespower-domainsclock-indices#mbox-cellsmemory-regionpinctrl-namespinctrl-0reset-gpiosgpio-controller#gpio-cellsbus-widthno-sdno-sdionon-removablefsl,tuning-start-tapfsl,tuning-stepvmmc-supplycd-gpioswp-gpiosfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-high