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#    ***** GENERATED FILE -- DO NOT EDIT! *****
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EVEX_INSTRUCTIONS()::
# EMITTING VCOMXSD (VCOMXSD-128-1)
{
ICLASS:      VCOMXSD
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR USES_DAZ 
PATTERN:     EVV 0x2F VF2 V0F MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W1 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f64 REG1=XMM_B3():r:dq:f64
IFORM:       VCOMXSD_XMMf64_XMMf64_AVX512
}

{
ICLASS:      VCOMXSD
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR USES_DAZ 
PATTERN:     EVV 0x2F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 FIX_ROUND_LEN128() SAE() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f64:TXT=SAESTR REG1=XMM_B3():r:dq:f64
IFORM:       VCOMXSD_XMMf64_XMMf64_AVX512
}

{
ICLASS:      VCOMXSD
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_SCALAR MXCSR SIMD_SCALAR USES_DAZ 
PATTERN:     EVV 0x2F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W1 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_ONE()
OPERANDS:    REG0=XMM_R3():r:dq:f64 MEM0:r:q:f64
IFORM:       VCOMXSD_XMMf64_MEMf64_AVX512
}


# EMITTING VCOMXSH (VCOMXSH-128-1)
{
ICLASS:      VCOMXSH
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2F VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f16 REG1=XMM_B3():r:dq:f16
IFORM:       VCOMXSH_XMMf16_XMMf16_AVX512
}

{
ICLASS:      VCOMXSH
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2F VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() SAE() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f16:TXT=SAESTR REG1=XMM_B3():r:dq:f16
IFORM:       VCOMXSH_XMMf16_XMMf16_AVX512
}

{
ICLASS:      VCOMXSH
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_SCALAR MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2F VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_ONE()
OPERANDS:    REG0=XMM_R3():r:dq:f16 MEM0:r:wrd:f16
IFORM:       VCOMXSH_XMMf16_MEMf16_AVX512
}


# EMITTING VCOMXSS (VCOMXSS-128-1)
{
ICLASS:      VCOMXSS
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR USES_DAZ 
PATTERN:     EVV 0x2F VF3 V0F MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f32 REG1=XMM_B3():r:dq:f32
IFORM:       VCOMXSS_XMMf32_XMMf32_AVX512
}

{
ICLASS:      VCOMXSS
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR USES_DAZ 
PATTERN:     EVV 0x2F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() SAE() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f32:TXT=SAESTR REG1=XMM_B3():r:dq:f32
IFORM:       VCOMXSS_XMMf32_XMMf32_AVX512
}

{
ICLASS:      VCOMXSS
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_SCALAR MXCSR SIMD_SCALAR USES_DAZ 
PATTERN:     EVV 0x2F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_ONE()
OPERANDS:    REG0=XMM_R3():r:dq:f32 MEM0:r:d:f32
IFORM:       VCOMXSS_XMMf32_MEMf32_AVX512
}


# EMITTING VUCOMXSD (VUCOMXSD-128-1)
{
ICLASS:      VUCOMXSD
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF2 V0F MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W1 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f64 REG1=XMM_B3():r:dq:f64
IFORM:       VUCOMXSD_XMMf64_XMMf64_AVX512
}

{
ICLASS:      VUCOMXSD
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W1 FIX_ROUND_LEN128() SAE() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f64:TXT=SAESTR REG1=XMM_B3():r:dq:f64
IFORM:       VUCOMXSD_XMMf64_XMMf64_AVX512
}

{
ICLASS:      VUCOMXSD
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_SCALAR MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W1 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0 ESIZE_64_BITS() NELEM_ONE()
OPERANDS:    REG0=XMM_R3():r:dq:f64 MEM0:r:q:f64
IFORM:       VUCOMXSD_XMMf64_MEMf64_AVX512
}


# EMITTING VUCOMXSH (VUCOMXSH-128-1)
{
ICLASS:      VUCOMXSH
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF3 MAP5 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f16 REG1=XMM_B3():r:dq:f16
IFORM:       VUCOMXSH_XMMf16_XMMf16_AVX512
}

{
ICLASS:      VUCOMXSH
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF3 MAP5 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() SAE() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f16:TXT=SAESTR REG1=XMM_B3():r:dq:f16
IFORM:       VUCOMXSH_XMMf16_XMMf16_AVX512
}

{
ICLASS:      VUCOMXSH
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_SCALAR MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF3 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0 ESIZE_16_BITS() NELEM_ONE()
OPERANDS:    REG0=XMM_R3():r:dq:f16 MEM0:r:wrd:f16
IFORM:       VUCOMXSH_XMMf16_MEMf16_AVX512
}


# EMITTING VUCOMXSS (VUCOMXSS-128-1)
{
ICLASS:      VUCOMXSS
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF3 V0F MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f32 REG1=XMM_B3():r:dq:f32
IFORM:       VUCOMXSS_XMMf32_XMMf32_AVX512
}

{
ICLASS:      VUCOMXSS
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] W0 FIX_ROUND_LEN128() SAE() NOEVSR ZEROING=0 MASK=0
OPERANDS:    REG0=XMM_R3():r:dq:f32:TXT=SAESTR REG1=XMM_B3():r:dq:f32
IFORM:       VUCOMXSS_XMMf32_XMMf32_AVX512
}

{
ICLASS:      VUCOMXSS
CPL:         3
CATEGORY:    AVX512
EXTENSION:   AVX512EVEX
ISA_SET:     AVX512_COM_EF_SCALAR
EXCEPTIONS:  AVX512-E3NF
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod pf-mod cf-mod of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_SCALAR MXCSR SIMD_SCALAR 
PATTERN:     EVV 0x2E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 FIX_ROUND_LEN128() NOEVSR ZEROING=0 MASK=0 ESIZE_32_BITS() NELEM_ONE()
OPERANDS:    REG0=XMM_R3():r:dq:f32 MEM0:r:d:f32
IFORM:       VUCOMXSS_XMMf32_MEMf32_AVX512
}


