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# In order to support embedded rounding capabilities for YMM/256 bit Intel AVX10.2 instructions, the
# EVEX.U bit is repurposed. It's current assignment is set to always be "1". For Intel AVX10.2, an EVEX.U bit
# value of "0" combined with an EVEX.b value of "1" will enable embedded rounding for supported
# YMM/256 bit instructions in any Intel AVX10 ISA version 2 or greater. Embedded rounding for scalars will
# utilize the same flow as the current design (using the pp bits) to minimize duplication and validation.

EVEX_U_ENC()::  # NT Extension
MOD=3 UBIT=0 BCRC=1 VL256 -> 0b0


EVEX_LL_ENC()::  # NT Extension
# AVX10.2/256 Embedded Rounding Control
ROUNDC=0 SAE=1 VL256 -> LLRC=0 BCRC=1 # sae only, no rounding
ROUNDC=1 SAE=1 VL256 -> LLRC=0 BCRC=1 # rounding only supported with sae
ROUNDC=2 SAE=1 VL256 -> LLRC=1 BCRC=1 # rounding only supported with sae
ROUNDC=3 SAE=1 VL256 -> LLRC=2 BCRC=1 # rounding only supported with sae
ROUNDC=4 SAE=1 VL256 -> LLRC=3 BCRC=1 # rounding only supported with sae

##############################################################################


FIX_ROUND_LEN256()::
otherwise -> nothing

AVX256_ROUND()::
BCRC=1 UBIT=0 ROUNDC=1 -> LLRC=0 SAE=1
BCRC=1 UBIT=0 ROUNDC=2 -> LLRC=1 SAE=1
BCRC=1 UBIT=0 ROUNDC=3 -> LLRC=2 SAE=1
BCRC=1 UBIT=0 ROUNDC=4 -> LLRC=3 SAE=1

SAE256()::
BCRC=1 UBIT=0 SAE=1 -> nothing

