8( d@phytec,rk3288-pcm-947phytec,rk3288-phycore-somrockchip,rk3288&7Phytec RK3288 PCM-947aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/i2c@ff140000/rtc@68/i2c@ff650000/pmic@1carm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @OOa sB@ ~ ' 9  K 0 .@<COUcpu@501cpuarm,cortex-a12OUcpu@502cpuarm,cortex-a12OUcpu@503cpuarm,cortex-a12OUamba simple-bus]dma-controller@ff250000arm,pl330arm,primecell%@do< apb_pclkOUdma-controller@ff600000arm,pl330arm,primecell`@do< apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@do< apb_pclkO\U\reserved-memory]dma-unusable@fe000000oscillator fixed-clockn6xin24mO U timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H < a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр <Drvbiuciuciu-driveciu-sample  @resetokay&8I[fpdefault~ dwmmc@ff0d0000rockchip,rk3288-dw-mshcр <Eswbiuciuciu-driveciu-sample ! @reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр <Ftxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр <Guybiuciuciu-driveciu-sample #@resetokay&[fpdefault~saradc@ff100000rockchip,saradc $<I[saradcapb_pclkW saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi<ARspiclkapb_pclk  txrx ,pdefault~ disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi<BSspiclkapb_pclk txrx -pdefault~  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi<CTspiclkapb_pclktxrx .pdefault~!"#$okayflash@0 micron,n25q128a13jedec,spi-norokayi2c@ff140000rockchip,rk3288-i2c >i2c<Mpdefault~%okaytouchscreen@44 st,stmpe811Dadc@64maxim,max1037drtc@68rv4162hpdefault~&&' i2c@ff150000rockchip,rk3288-i2c ?i2c<Opdefault~(okayeeprom@51 atmel,24c32Q i2c@ff160000rockchip,rk3288-i2c @i2c<Ppdefault~)okayleddimmer@62 nxp,pca9533bled1 red:user1 noneled2 green:user2 noneled3 blue:user3 noneled4 red:user4 nonei2c@ff170000rockchip,rk3288-i2c Ai2c<Qpdefault~*okayOmUmserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7",<MUbaudclkapb_pclkpdefault ~+,-okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8",<NVbaudclkapb_pclkpdefault~. disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9",<OWbaudclkapb_pclkpdefault~/okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :",<PXbaudclkapb_pclkpdefault~0 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;",<QYbaudclkapb_pclkpdefault~1 disabledthermal-zonesreserve_thermal9O]2cpu_thermal9dO]2tripscpu_alert0mpypassiveO3U3cpu_alert1m$ypassiveO4U4cpu_critm_y criticalcooling-mapsmap03 map14 gpu_thermal9dO]2tripsgpu_alert0mpypassiveO5U5gpu_critm_y criticalcooling-mapsmap05 tsadc@ff280000rockchip,rk3288-tsadc( %<HZtsadcapb_pclk tsadc-apbpinitdefaultsleep~676sokayO2U2ethernet@ff290000rockchip,rk3288-gmac) macirqeth_wake_irq88<fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethokay(89Oinputpdefault ~:;<\=g> rrgmii-id{ 'B@ ?mdio0snps,dwmac-mdioethernet-phy@0ethernet-phy-ieee802.3-c22&?O=U=usb@ff500000 generic-ehciP <usbhost@usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T <otg%hostA usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X <otg%otg-?N@@ B usb2-phyokayusb@ff5c0000 generic-ehci\ <usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c<Lpdefault~Cokaypmic@1crockchip,rk818&Dpdefault~E]~FFFFGFHHregulatorsDCDC_REG1vdd_log);Sregulator-state-memkDCDC_REG2vdd_gpu); 5Sregulator-state-memB@DCDC_REG3vcc_ddr)regulator-state-memDCDC_REG4 vdd_3v3_io);2ZS2ZOUregulator-state-mem2ZDCDC_BOOSTvdd_sys);LK@SLK@OFUFregulator-state-memLK@SWITCH_REGvdd_sd)regulator-state-memkLDO_REG2 vdd_eth_2v5);&%S&%O>U>regulator-state-mem&%LDO_REG3vdd_1v0);B@SB@regulator-state-memB@LDO_REG4vdd_1v8_lcd_ldo);w@Sw@regulator-state-memw@LDO_REG6 vdd_1v0_lcd);B@SB@regulator-state-memB@LDO_REG7 vdd_1v8_ldo);w@Sw@OUregulator-state-memkw@LDO_REG9 vdd_io_sd);2ZS2ZOUregulator-state-mem2Zeeprom@50 atmel,24c32P regulator@60 fcs,fan53555`),vdd_cpu; 5S@FOUi2c@ff660000rockchip,rk3288-i2cf =i2c<Npdefault~I disabledpwm@ff680000rockchip,rk3288-pwmhpdefault~J<^pwm disabledpwm@ff680010rockchip,rk3288-pwmhpdefault~K<^pwmokaypwm@ff680020rockchip,rk3288-pwmh pdefault~L<^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0pdefault~M<^pwm disabledbus_intmem@ff700000 mmio-sramp ]psmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsOUpower-controller!rockchip,rk3288-power-controller(h8 O_U_pd_vio@9 <chgfdehilkj$0NOPQRSTUVpd_hevc@11 <op0WXpd_video@12 <0Ypd_gpu@13 <0Z[reboot-modesyscon-reboot-mode7>RBJRBXRB hRBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv8tH(jk$#gׄeрxhрxhOUsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwO8U8edp-phyrockchip,rk3288-dp-phy<h24m disabledOjUjio-domains"rockchip,rk3288-io-voltage-domainokayH usbphyrockchip,rk3288-usb-phyokayusb-phy@320 <]phyclkOBUBusb-phy@3344<^phyclkO@U@usb-phy@348H<_phyclkOAUAwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt<p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif# hclkmclk<T\tx 6pdefault~]8 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5\\txrxi2s_hclki2s_clk<Rpdefault~^4O disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 <}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop <aclk_vopdclk_vophclk_vopi_ def axiahbdclkw`okayportO U endpoint@0~aOnUnendpoint@1~bOkUkendpoint@2~cOhUhiommu@ff930300rockchip,iommu   vopb_mmui_ okayO`U`vop@ff940000rockchip,rk3288-vop <aclk_vopdclk_vophclk_vopi_  axiahbdclkwdokayportO U endpoint@0~eOoUoendpoint@1~fOlUlendpoint@2~gOiUiiommu@ff940300rockchip,iommu   vopl_mmui_ okayOdUdmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ <~d refpclki_ 8 disabledportsportendpoint@0~hOcUcendpoint@1~iOgUgdp@ff970000rockchip,rk3288-dp@ b<icdppclkjdpodp8 disabledportsport@0endpoint@0~kObUbendpoint@1~lOfUfhdmi@ff980000rockchip,rk3288-dw-hdmi,8 g<hm iahbisfri_ okaymportsportendpoint@0~nOaUaendpoint@1~oOeUegpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$  jobmmugpu<pi_  disabledgpu-opp-tableoperating-points-v2OpUpopp@100000000~opp@200000000 ~opp@300000000B@opp@400000000ׄopp@500000000eOopp@600000000#Fqos@ffaa0000syscon OZUZqos@ffaa0080syscon O[U[qos@ffad0000syscon OOUOqos@ffad0100syscon OPUPqos@ffad0180syscon OQUQqos@ffad0400syscon ORURqos@ffad0480syscon OSUSqos@ffad0500syscon ONUNqos@ffad0800syscon OTUTqos@ffad0880syscon OUUUqos@ffad0900syscon OVUVqos@ffae0000syscon OYUYqos@ffaf0000syscon OWUWqos@ffaf0080syscon OXUXinterrupt-controller@ffc01000 arm,gic-400  @ `   OUefuse@ffb40000rockchip,rk3288-efuse <q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl8]gpio0@ff750000rockchip,gpio-banku Q<@ ODUDgpio1@ff780000rockchip,gpio-bankx R<A gpio2@ff790000rockchip,gpio-banky S<B O{U{gpio3@ff7a0000rockchip,gpio-bankz T<C gpio4@ff7b0000rockchip,gpio-bank{ U<D O?U?gpio5@ff7c0000rockchip,gpio-bank| V<E O'U'gpio6@ff7d0000rockchip,gpio-bank} W<F gpio7@ff7e0000rockchip,gpio-bank~ X<G OxUxgpio8@ff7f0000rockchip,gpio-bank Y<H OzUzhdmihdmi-ddc qqpcfg-pull-up OrUrpcfg-pull-down -OsUspcfg-pull-none <OqUqpcfg-pull-none-12ma < I OtUtsleepglobal-pwroff qddrio-pwroff qddr0-retention rddr1-retention redpedp-hpd  si2c0i2c0-xfer qqOCUCi2c1i2c1-xfer qqO%U%i2c2i2c2-xfer  q qOIUIi2c3i2c3-xfer qqO(U(i2c4i2c4-xfer qqO)U)i2c5i2c5-xfer qqO*U*i2s0i2s0-bus` qqqqqqO^U^sdmmcsdmmc-clk tO U sdmmc-cmd uO U sdmmc-cd rOUsdmmc-bus1 rsdmmc-bus4@ uuuuOUsdmmc-pwr  qsdio0sdio0-bus1 rsdio0-bus4@ rrrrsdio0-cmd rsdio0-clk qsdio0-cd rsdio0-wp rsdio0-pwr rsdio0-bkpwr rsdio0-int rsdio1sdio1-bus1 rsdio1-bus4@ rrrrsdio1-cd rsdio1-wp rsdio1-bkpwr rsdio1-int rsdio1-cmd rsdio1-clk qsdio1-pwr  remmcemmc-clk tOUemmc-cmd tOUemmc-pwr  rOUemmc-bus1 remmc-bus4@ rrrremmc-bus8 ttttttttOUspi0spi0-clk  rOUspi0-cs0  rOUspi0-tx rOUspi0-rx rOUspi0-cs1 rspi1spi1-clk  rOUspi1-cs0  rO U spi1-rx rOUspi1-tx rOUspi2spi2-cs1 rspi2-clk rO!U!spi2-cs0 rO$U$spi2-rx rO#U#spi2-tx  rO"U"uart0uart0-xfer rqO+U+uart0-cts rO,U,uart0-rts qO-U-uart1uart1-xfer r qO.U.uart1-cts  ruart1-rts  quart2uart2-xfer rqO/U/uart3uart3-xfer rqO0U0uart3-cts  ruart3-rts  quart4uart4-xfer  r qO1U1uart4-cts ruart4-rts qtsadcotp-gpio  qO6U6otp-out  qO7U7pwm0pwm0-pin qOJUJpwm1pwm1-pin qOKUKpwm2pwm2-pin qOLULpwm3pwm3-pin qOMUMgmacrgmii-pins qqqqttttqqq ttqqO:U:rmii-pins qqqqqqqqqqphy-int rO<U<phy-rst vO;U;spdifspdif-tx  qO]U]pcfg-output-high XOvUvledsuser-led vOwUwpmicpmic-int rOEUEpmic-sleep rpcfg-pull-up-drv-12ma  I OuUubuttonsuser-button-pins rrOyUyrv4162i2c-rtc-int  rO&U&touchscreents-irq-pin qusb_hosthost0-vbus-drv  qO|U|host1-vbus-drv qO}U}usb_otgotg-vbus-drv  qO~U~memorymemoryexternal-gmac-clock fixed-clocksY@ ext_gmacO9U9user-leds gpio-ledspdefault~wuser green_led dx  heartbeat jkeepvdd-emmc-ioregulator-fixed vdd_emmc_io;w@Sw@OUvdd-in-otg-outregulator-fixedvdd_in_otg_out);LK@SLK@OGUGvdd-misc-1v8regulator-fixed vdd_misc_1v8);w@Sw@OHUHuser-buttons gpio-keyspdefault~ybutton@0home xf dz~button@1menu x dz~usb-host0-regulatorregulator-fixed { pdefault~| vcc_host0_5v;LK@SLK@Gusb-host1-regulatorregulator-fixed {pdefault~} vcc_host1_5v;LK@SLK@Gusb-otg-regulatorregulator-fixed { pdefault~~ vcc_otg_5v;LK@SLK@G #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2rtc0rtc1interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesspi-max-frequencym25p,fast-readpagesizelabellinux,default-triggerreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayti,rx-internal-delayti,tx-internal-delayti,fifo-depthenet-phy-lane-no-swapphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyboost-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorregulator-enable-ramp-delayregulator-ramp-delayvin-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplyflash0-supplyflash1-supplygpio1830-supplygpio30-supplybb-supplydvp-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-busoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highgpiosdefault-statelinux,code