Ð þíâ8ÚX(ÄÚ Cvariscite,var-stk-om44variscite,var-som-om44ti,omap4460ti,omap4 +7Variscite VAR-STK-OM44chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@48350000Q/ocp/serial@4806a000Y/ocp/serial@4806c000a/ocp/serial@48020000i/ocp/serial@4806e000 q/connectorcpus+cpu@0arm,cortex-a9zcpu†—›¢cpu®“à¼W0£è ®`O€ ÀèÍßñ««cpu@1arm,cortex-a9zcpu†—interrupt-controller@48241000arm,cortex-a9-gic#—H$H$ l2-cache-controller@48242000arm,pl310-cache—H$ 4Blocal-timer@48240600arm,cortex-a9-twd-timer›—H$  N  interrupt-controller@48281000ti,omap4-wugen-mpu#—H( socti,omap-inframpu ti,omap4-mpuYmpucdsp ti,omap3-c64Ydspiva ti,ivahdYivaocpti,omap4-l3-nocsimple-bus+hYl3_main_1l3_main_2l3_main_3—DD€ EN  l4@4a000000ti,omap4-l4-cfgsimple-bus+ hJcm1@4000 ti,omap4-cm1—@ clocks+extalt_clkin_cko fixed-clock|„DÀ::pad_clks_src_cko fixed-clock|·pad_clks_ck@108oti,gate-clock›Œ—&&pad_slimbus_core_clks_cko fixed-clock|·FFsecure_32k_clk_src_cko fixed-clock|€slimbus_src_clko fixed-clock|·slimbus_clk@108oti,gate-clock›Œ —''sys_32k_cko fixed-clock|€,,virt_12000000_cko fixed-clock|·TTvirt_13000000_cko fixed-clock|Æ]@UUvirt_16800000_cko fixed-clock|YVVvirt_19200000_cko fixed-clock|$øWWvirt_26000000_cko fixed-clock|Œº€XXvirt_27000000_cko fixed-clock|›üÀYYvirt_38400000_cko fixed-clock|IðZZtie_low_clock_cko fixed-clock|^^utmi_phy_clkout_cko fixed-clock|“‡MMxclk60mhsp1_cko fixed-clock|“‡IIxclk60mhsp2_cko fixed-clock|“‡KKxclk60motg_cko fixed-clock|“‡NNdpll_abe_ck@1e0oti,omap4-dpll-m4xen-clock› —àäìè  dpll_abe_x2_ck@1f0oti,omap4-dpll-x2-clock› —ð  dpll_abe_m2x2_ck@1f0oti,divider-clock› ™¤—ð¶Í  abe_24m_fclkofixed-factor-clock› äï""abe_clk@108oti,divider-clock› ™—ùaess_fclk@528oti,divider-clock›Œ™—(  dpll_abe_m3x2_ck@1f4oti,divider-clock› ™¤—ô¶Ícore_hsd_byp_clk_mux_ck@12co ti,mux-clock›Œ—,dpll_core_ck@120oti,omap4-dpll-core-clock›— $,(dpll_core_x2_ckoti,omap4-dpll-x2-clock›dpll_core_m6x2_ck@140oti,divider-clock›™¤—@¶Í]]dpll_core_m2_ck@130oti,divider-clock›™¤—0¶Íddrphy_ckofixed-factor-clock›äïdpll_core_m5x2_ck@13coti,divider-clock›™¤—<¶Ídiv_core_ck@100oti,divider-clock›—™div_iva_hs_clk@1dcoti,divider-clock›™—Üùdiv_mpu_hs_clk@19coti,divider-clock›™—œùdpll_core_m4x2_ck@138oti,divider-clock›™¤—8¶Ídll_clk_div_ckofixed-factor-clock›äïdpll_abe_m2_ck@1f0oti,divider-clock› ™—ð¶!!dpll_core_m3x2_gate_ck@134o ti,composite-no-wait-gate-clock›Œ—4dpll_core_m3x2_div_ck@134oti,composite-divider-clock›™—4¶dpll_core_m3x2_ckoti,composite-clock›dddpll_core_m7x2_ck@144oti,divider-clock›™¤—D¶Í==iva_hsd_byp_clk_mux_ck@1aco ti,mux-clock›Œ—¬dpll_iva_ck@1a0oti,omap4-dpll-clock›— ¤¬¨dpll_iva_x2_ckoti,omap4-dpll-x2-clock›dpll_iva_m4x2_ck@1b8oti,divider-clock›™¤—¸¶Ídpll_iva_m5x2_ck@1bcoti,divider-clock›™¤—¼¶Ídpll_mpu_ck@160oti,omap4-dpll-clock›—`dlhdpll_mpu_m2_ck@170oti,divider-clock›™¤—p¶Íper_hs_clk_div_ckofixed-factor-clock›äï--usb_hs_clk_div_ckofixed-factor-clock›äï33l3_div_ck@100oti,divider-clock›Œ™—l4_div_ck@100oti,divider-clock›Œ™—PPlp_clk_div_ckofixed-factor-clock› äï[[mpu_periphclkofixed-factor-clock›äïocp_abe_iclk@528oti,divider-clock› Œ—(per_abe_24m_fclkofixed-factor-clock›!äïDDdmic_sync_mux_ck@538o ti,mux-clock ›"#$Œ—8%%func_dmic_abe_gfclk@538o ti,mux-clock ›%&'Œ—8mcasp_sync_mux_ck@540o ti,mux-clock ›"#$Œ—@((func_mcasp_abe_gfclk@540o ti,mux-clock ›(&'Œ—@mcbsp1_sync_mux_ck@548o ti,mux-clock ›"#$Œ—H))func_mcbsp1_gfclk@548o ti,mux-clock ›)&'Œ—Hmcbsp2_sync_mux_ck@550o ti,mux-clock ›"#$Œ—P**func_mcbsp2_gfclk@550o ti,mux-clock ›*&'Œ—Pmcbsp3_sync_mux_ck@558o ti,mux-clock ›"#$Œ—X++func_mcbsp3_gfclk@558o ti,mux-clock ›+&'Œ—Xslimbus1_fclk_1@560oti,gate-clock›$Œ —`slimbus1_fclk_0@560oti,gate-clock›"Œ—`slimbus1_fclk_2@560oti,gate-clock›&Œ —`slimbus1_slimbus_clk@560oti,gate-clock›'Œ —`timer5_sync_mux@568o ti,mux-clock›#,Œ—htimer6_sync_mux@570o ti,mux-clock›#,Œ—ptimer7_sync_mux@578o ti,mux-clock›#,Œ—xtimer8_sync_mux@580o ti,mux-clock›#,Œ—€dummy_cko fixed-clock|clockdomainscm2@8000 ti,omap4-cm2—€0clocks+per_hsd_byp_clk_mux_ck@14co ti,mux-clock›-Œ—L..dpll_per_ck@140oti,omap4-dpll-clock›.—@DLH//dpll_per_m2_ck@150oti,divider-clock›/™—P¶77dpll_per_x2_ck@150oti,omap4-dpll-x2-clock›/—P00dpll_per_m2x2_ck@150oti,divider-clock›0™¤—P¶Í66dpll_per_m3x2_gate_ck@154o ti,composite-no-wait-gate-clock›0Œ—T11dpll_per_m3x2_div_ck@154oti,composite-divider-clock›0™—T¶22dpll_per_m3x2_ckoti,composite-clock›12eedpll_per_m4x2_ck@158oti,divider-clock›0™¤—X¶Í88dpll_per_m5x2_ck@15coti,divider-clock›0™¤—\¶Í;;dpll_per_m6x2_ck@160oti,divider-clock›0™¤—`¶Í55dpll_per_m7x2_ck@164oti,divider-clock›0™¤—d¶Í>>dpll_usb_ck@180oti,omap4-dpll-j-type-clock›3—€„Œˆ44dpll_usb_clkdcoldo_ck@1b4oti,fixed-factor-clock›4¤—´(Ídpll_usb_m2_ck@190oti,divider-clock›4™¤—¶Í99ducati_clk_mux_ck@100o ti,mux-clock›5—func_12m_fclkofixed-factor-clock›6äïfunc_24m_clkofixed-factor-clock›7äï$$func_24mc_fclkofixed-factor-clock›6äïEEfunc_48m_fclk@108oti,divider-clock›6—CCfunc_48mc_fclkofixed-factor-clock›6äï<<func_64m_fclk@108oti,divider-clock›8—BBfunc_96m_fclk@108oti,divider-clock›6—??init_60m_fclk@104oti,divider-clock›9—HHper_abe_nc_fclk@108oti,divider-clock›!—™@@aes1_fck@15a0oti,gate-clock›Œ— aes2_fck@15a8oti,gate-clock›Œ—¨dss_sys_clk@1120oti,gate-clock›#Œ — ££dss_tv_clk@1120oti,gate-clock›:Œ — ¢¢dss_dss_clk@1120oti,gate-clock›;Œ— 6¡¡dss_48mhz_clk@1120oti,gate-clock›<Œ — ¤¤fdif_fck@1028oti,divider-clock›8Œ™—(ùgpio2_dbclk@1460oti,gate-clock›,Œ—`gpio3_dbclk@1468oti,gate-clock›,Œ—hgpio4_dbclk@1470oti,gate-clock›,Œ—pgpio5_dbclk@1478oti,gate-clock›,Œ—xgpio6_dbclk@1480oti,gate-clock›,Œ—€sgx_clk_mux@1220o ti,mux-clock›=>Œ— hsi_fck@1338oti,divider-clock›6Œ™—8ùiss_ctrlclk@1020oti,gate-clock›?Œ— mcbsp4_sync_mux_ck@14e0o ti,mux-clock›?@Œ—àAAper_mcbsp4_gfclk@14e0o ti,mux-clock›A&Œ—àhsmmc1_fclk@1328o ti,mux-clock›B?Œ—(hsmmc2_fclk@1330o ti,mux-clock›B?Œ—0ocp2scp_usb_phy_phy_48m@13e0oti,gate-clock›CŒ—àsha2md5_fck@15c8oti,gate-clock›Œ—Èslimbus2_fclk_1@1538oti,gate-clock›DŒ —8slimbus2_fclk_0@1538oti,gate-clock›EŒ—8slimbus2_slimbus_clk@1538oti,gate-clock›FŒ —8smartreflex_core_fck@638oti,gate-clock›GŒ—8smartreflex_iva_fck@630oti,gate-clock›GŒ—0smartreflex_mpu_fck@628oti,gate-clock›GŒ—(cm2_dm10_mux@1428o ti,mux-clock›,Œ—(cm2_dm11_mux@1430o ti,mux-clock›,Œ—0cm2_dm2_mux@1438o ti,mux-clock›,Œ—8cm2_dm3_mux@1440o ti,mux-clock›,Œ—@cm2_dm4_mux@1448o ti,mux-clock›,Œ—Hcm2_dm9_mux@1450o ti,mux-clock›,Œ—Pusb_host_fs_fck@13d0oti,gate-clock›<Œ—ÐQQutmi_p1_gfclk@1358o ti,mux-clock›HIŒ—XJJusb_host_hs_utmi_p1_clk@1358oti,gate-clock›JŒ—Xutmi_p2_gfclk@1358o ti,mux-clock›HKŒ—XLLusb_host_hs_utmi_p2_clk@1358oti,gate-clock›LŒ —Xusb_host_hs_utmi_p3_clk@1358oti,gate-clock›HŒ —Xusb_host_hs_hsic480m_p1_clk@1358oti,gate-clock›9Œ —Xusb_host_hs_hsic60m_p1_clk@1358oti,gate-clock›HŒ —Xusb_host_hs_hsic60m_p2_clk@1358oti,gate-clock›HŒ —Xusb_host_hs_hsic480m_p2_clk@1358oti,gate-clock›9Œ—Xusb_host_hs_func48mclk@1358oti,gate-clock›<Œ—Xusb_host_hs_fck@1358oti,gate-clock›HŒ—Xotg_60m_gfclk@1360o ti,mux-clock›MNŒ—`OOusb_otg_hs_xclk@1360oti,gate-clock›OŒ—`usb_otg_hs_ick@1360oti,gate-clock›Œ—`usb_phy_cm_clk32k@640oti,gate-clock›,Œ—@usb_tll_hs_usb_ch2_clk@1368oti,gate-clock›HŒ —husb_tll_hs_usb_ch0_clk@1368oti,gate-clock›HŒ—husb_tll_hs_usb_ch1_clk@1368oti,gate-clock›HŒ —husb_tll_hs_ick@1368oti,gate-clock›PŒ—hclockdomainsl3_init_clkdmti,clockdomain›4Qscm@2000ti,omap4-scm-coresimple-bus— + h scm_conf@0syscon—+scm@100000%ti,omap4-scm-padconf-coresimple-bus+ hpinmux@40 ti,omap4-padconfpinctrl-single—@–+I#Xvÿ“default¡Rpinmux_twl6040_pins«\`ˆˆpinmux_mcpdm_pins(«ÆÈÊÌΚšpinmux_tsc2004_pins«PRpinmux_uart3_pins «ƒƒpinmux_hsusbb1_pins`«‚ „† ˆ Š Œ Ž  ’ ” – ˜ RRpinmux_hsusbb1_phy_rst_pins«L®®pinmux_i2c1_pins«âä„„pinmux_i2c3_pins«ê쌌pinmux_mmc1_pins0«¢¤¦¨ª¬““pinmux_twl6030_pins«^A……pinmux_uart2_pins «ØÚÜÞ‚‚pinmux_wl12xx_ctrl_pins«"$&¯¯pinmux_mmc4_pins0«••pinmux_uart1_pins «üþæèpinmux_mcspi1_pins «òôöøpinmux_mcsasp_pins«¸pinmux_dss_dpi_pinsà«"$&(*,.0246tvxz|~€‚„†ˆŠŒŽ’”pinmux_dss_hdmi_pins«Z\^¥¥pinmux_i2c4_pins«îðpinmux_mmc5_pins8«¶  ˜˜pinmux_gpio_led_pins«>@°°pinmux_gpio_key_pins«b±±pinmux_ks8851_irq_pins«<‘‘pinmux_hdmi_hpd_pins«X ²²pinmux_backlight_pins«Öomap4_padconf_global@5a0sysconsimple-bus— p+ h pSSpbias_regulator@60ti,pbias-omap4ti,pbias-omap—`¿Spbias_mmc_omap4Æpbias_mmc_omap4Õw@í-ÆÀ’’l4@300000ti,omap4-l4-wkupsimple-bus+ h0counter@4000ti,omap-counter32k—@  Ycounter_32kprm@6000 ti,omap4-prm—`0 N clocks+sys_clkin_ck@110o ti,mux-clock›TUVWXYZ—¶abe_dpll_bypass_clk_mux_ck@108o ti,mux-clock›,Œ—  abe_dpll_refclk_mux_ck@10co ti,mux-clock›,—   dbgclk_mux_ckofixed-factor-clock›äïl4_wkup_clk_mux_ck@108o ti,mux-clock›[—GGsyc_clk_div_ck@100oti,divider-clock›—™##gpio1_dbclk@1838oti,gate-clock›,Œ—8dmt1_clk_mux@1840o ti,mux-clock›,Œ—@usim_ck@1858oti,divider-clock›8Œ—X\\usim_fclk@1858oti,gate-clock›\Œ—Xpmd_stm_clock_mux_ck@1a20o ti,mux-clock ›]^Œ— __pmd_trace_clk_mux_ck@1a20o ti,mux-clock ›]^Œ— ``stm_clk_div_ck@1a20oti,divider-clock›_Œ™@— ùtrace_clk_div_div_ck@1a20oti,divider-clock›`Œ— aatrace_clk_div_ckoti,clkdm-gate-clock›accdiv_ts_ck@1888oti,divider-clock›GŒ—ˆ  bbbandgap_ts_fclk@1888oti,gate-clock›bŒ—ˆclockdomainsemu_sys_clkdmti,clockdomain›cscrm@a000ti,omap4-scrm—  clocks+auxclk0_src_gate_ck@310o ti,composite-no-wait-gate-clock›dŒ—ffauxclk0_src_mux_ck@310oti,composite-mux-clock ›deŒ—ggauxclk0_src_ckoti,composite-clock›fghhauxclk0_ck@310oti,divider-clock›hŒ™—xxauxclk1_src_gate_ck@314o ti,composite-no-wait-gate-clock›dŒ—iiauxclk1_src_mux_ck@314oti,composite-mux-clock ›deŒ—jjauxclk1_src_ckoti,composite-clock›ijkkauxclk1_ck@314oti,divider-clock›kŒ™—yyauxclk2_src_gate_ck@318o ti,composite-no-wait-gate-clock›dŒ—llauxclk2_src_mux_ck@318oti,composite-mux-clock ›deŒ—mmauxclk2_src_ckoti,composite-clock›lmnnauxclk2_ck@318oti,divider-clock›nŒ™—zzauxclk3_src_gate_ck@31co ti,composite-no-wait-gate-clock›dŒ—ooauxclk3_src_mux_ck@31coti,composite-mux-clock ›deŒ—ppauxclk3_src_ckoti,composite-clock›opqqauxclk3_ck@31coti,divider-clock›qŒ™—{{auxclk4_src_gate_ck@320o ti,composite-no-wait-gate-clock›dŒ— rrauxclk4_src_mux_ck@320oti,composite-mux-clock ›deŒ— ssauxclk4_src_ckoti,composite-clock›rsttauxclk4_ck@320oti,divider-clock›tŒ™— ||auxclk5_src_gate_ck@324o ti,composite-no-wait-gate-clock›dŒ—$uuauxclk5_src_mux_ck@324oti,composite-mux-clock ›deŒ—$vvauxclk5_src_ckoti,composite-clock›uvwwauxclk5_ck@324oti,divider-clock›wŒ™—$}}auxclkreq0_ck@210o ti,mux-clock›xyz{|}Œ—auxclkreq1_ck@214o ti,mux-clock›xyz{|}Œ—auxclkreq2_ck@218o ti,mux-clock›xyz{|}Œ—auxclkreq3_ck@21co ti,mux-clock›xyz{|}Œ—auxclkreq4_ck@220o ti,mux-clock›xyz{|}Œ— auxclkreq5_ck@224o ti,mux-clock›xyz{|}Œ—$clockdomainspinmux@1e040 ti,omap4-padconfpinctrl-single—à@8+I#Xvÿ“default¡~pinmux_hsusbb1_phy_clk_pins«­­pinmux_hsusbb1_hub_rst_pins«~~pinmux_lan7500_rst_pins«pinmux_twl6030_wkup_pins«††ocmcram@40304000 mmio-sram—@0@ dma-controller@4a056000ti,omap4430-sdma—J`0N   €€gpio@4a310000ti,omap4-gpio—J1 NYgpio1*<L#gpio@48055000ti,omap4-gpio—HP NYgpio2<L#——gpio@48057000ti,omap4-gpio—Hp NYgpio3<L#¨¨gpio@48059000ti,omap4-gpio—H N Ygpio4<L#ŽŽgpio@4805b000ti,omap4-gpio—H° N!Ygpio5<L#gpio@4805d000ti,omap4-gpio—HÐ N"Ygpio6<L#‰‰elm@48078000ti,am3352-elm—H€ NYelm Xdisabledgpmc@50000000ti,omap4430-gpmc—P+ N_€drxtxnzYgpmcŒ›¢fck#<L Xdisabledserial@4806a000ti,omap4-uart—H  NHYuart1|ÜlXokay“default¡serial@4806c000ti,omap4-uart—HÀ NIYuart2|ÜlXokay“default¡‚serial@48020000ti,omap4-uart—H NJYuart3|Ül“default¡ƒXokayserial@4806e000ti,omap4-uart—Hà NFYuart4|Ül Xdisabledspinlock@4a0f6000ti,omap4-hwspinlock—J` YspinlockŸi2c@48070000 ti,omap4-i2c—H N8+Yi2c1“default¡„Xokay|€twl@48—H N ti,twl6030#“default¡…†rtcti,twl4030-rtcN regulator-vaux1ti,twl6030-vaux1ÕB@í-ÆÀregulator-vaux2ti,twl6030-vaux2ÕO€í*¹€regulator-vaux3ti,twl6030-vaux3ÕB@í-ÆÀregulator-vmmcti,twl6030-vmmcÕO€í-ÆÀ””regulator-vppti,twl6030-vppÕw@í&% regulator-vusimti,twl6030-vusimÕ-ÆÀí-ÆÀ­regulator-vdacti,twl6030-vdac¦¦regulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxio­regulator-vusbti,twl6030-vusb‡‡regulator-v1v8ti,twl6030-v1v8­ŠŠregulator-v2v1ti,twl6030-v2v1­‹‹usb-comparatorti,twl6030-usbN Á‡pwmti,twl6030-pwmÌpwmledti,twl6030-pwmledÌgpadcti,twl6030-gpadcN×twl@4b ti,twl6040o—K“default¡ˆ Nw é‰úŠ‹››i2c@48072000 ti,omap4-i2c—H  N9+Yi2c2 Xdisabledi2c@48060000 ti,omap4-i2c—H N=+Yi2c3“default¡ŒXokay|€tsc2004@48 ti,tsc2004—H“default¡ ŽN Xdisabledtmp105@49 ti,tmp105—Ieeprom@50microchip,24c32—Pi2c@48350000 ti,omap4-i2c—H5 N>+Yi2c4Xokay“default¡|€spi@48098000ti,omap4-mcspi—H € NA+Ymcspi1$@_€#€$€%€&€'€(€)€* dtx0rx0tx1rx1tx2rx2tx3rx3Xokay“default¡eth@0ks8851“default¡‘2n6— ‰N spi@4809a000ti,omap4-mcspi—H   NB+Ymcspi2$ _€+€,€-€.dtx0rx0tx1rx1 Xdisabledspi@480b8000ti,omap4-mcspi—H € N[+Ymcspi3$_€€dtx0rx0 Xdisabledspi@480ba000ti,omap4-mcspi—H   N0+Ymcspi4$_€F€Gdtx0rx0 Xdisabledmmc@4809c000ti,omap4-hsmmc—H À NSYmmc1DQ_€=€>dtxrxh’“default¡“u”‹Xokaymmc@480b4000ti,omap4-hsmmc—H @ NVYmmc2Q_€/€0dtxrx Xdisabledmmc@480ad000ti,omap4-hsmmc—H Ð N^Ymmc3Q_€M€Ndtxrx Xdisabledmmc@480d1000ti,omap4-hsmmc—H  N`Ymmc4Q_€9€:dtxrxXokay“default¡•u–Žœ+wlcore@2 ti,wl1271— —N ¯Iðmmc@480d5000ti,omap4-hsmmc—H P N;Ymmc5Q_€;€<dtxrxXokay“default¡˜u™ ÃŽmmu@4a066000ti,omap4-iommu—J` NYmmu_dspÌmmu@55082000ti,omap4-iommu—U  NdYmmu_ipuÌÙwdt@4a314000ti,omap4-wdtti,omap3-wdt—J1@€ NP Ywd_timer2mcpdm@40132000ti,omap4-mcpdm—@ I ïmpudma NpYmcpdm_€A€Bdup_linkdn_linkXokay“default¡š››¢pdmclk¬¬dmic@4012e000ti,omap4-dmic—@àIàïmpudma NrYdmic_€Cdup_link Xdisabledmcbsp@40122000ti,omap4-mcbsp—@ ÿI ÿïmpudma Nùcommon €Ymcbsp1_€!€"dtxrx Xdisabledmcbsp@40124000ti,omap4-mcbsp—@@ÿI@ÿïmpudma Nùcommon €Ymcbsp2_€€dtxrx Xdisabledmcbsp@40126000ti,omap4-mcbsp—@`ÿI`ÿïmpudma Nùcommon €Ymcbsp3_€€dtxrx Xdisabledmcbsp@48096000ti,omap4-mcbsp—H `ÿïmpu Nùcommon €Ymcbsp4_€€ dtxrx Xdisabledkeypad@4a31c000ti,omap4-keypad—J1À€ NxïmpuYkbd Xdisableddmm@4e000000 ti,omap4-dmm—N NqYdmmemif@4c000000 ti,emif-4d—L NnYemif1Œ!8Memif@4d000000 ti,emif-4d—M NoYemif2Œ!8Mocp2scp@4a0ad000ti,omap-ocp2scp—J Ð+hYocp2scp_usb_phyusb2phy@4a0ad080 ti,omap-usb2—J ЀX`œ›¢wkupclklŸŸmailbox@4a0f4000ti,omap4-mailbox—J@ NYmailboxwƒ•mbox_ipu § ²mbox_dsp § ²timer@4a318000ti,omap3430-timer—J1€€ N%Ytimer1½timer@48032000ti,omap3430-timer—H € N&Ytimer2timer@48034000ti,omap4430-timer—H@€ N'Ytimer3timer@48036000ti,omap4430-timer—H`€ N(Ytimer4timer@40138000ti,omap4430-timer—@€€I€€ N)Ytimer5Ìtimer@4013a000ti,omap4430-timer—@ €I € N*Ytimer6Ìtimer@4013c000ti,omap4430-timer—@À€IÀ€ N+Ytimer7Ìtimer@4013e000ti,omap4430-timer—@à€Ià€ N,Ytimer8ÙÌtimer@4803e000ti,omap4430-timer—Hà€ N-Ytimer9Ùtimer@48086000ti,omap3430-timer—H`€ N.Ytimer10Ùtimer@48088000ti,omap4430-timer—H€€ N/Ytimer11Ùusbhstll@4a062000 ti,usbhs-tll—J  NN Yusb_tll_hsusbhshost@4a064000ti,usbhs-host—J@ Yusb_host_hs+h ›HIK3¢refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 æehci-phyohci@4a064800ti,ohci-omap3—JH  NLehci@4a064c00 ti,ehci-omap—JL  NMñžcontrol-phy@4a002300ti,control-phy-usb2—J#ïpowerœœcontrol-phy@4a00233cti,control-phy-otghs—J#<ïotghs_control  usb_otg_hs@4a0ab000ti,omap4-musb—J °ÿN\]ùmcdma Yusb_otg_hsöŸñŸ þusb2-phy ` $ì32aes@4b501000 ti,omap4-aesYaes—KP  NU_€o€ndtxrxdes@480a5000 ti,omap4-desYdes—H P  NR_€u€tdtxrxregulator-abb-mpu ti,abb-v2Æabb_mpu+9€›R2cXokay—J0{ÐJ0`J"h'ïbase-addressint-addressefuse-addressxs£èO€èû1Èregulator-abb-iva ti,abb-v2Æabb_iva+9€›R2cXokay—J0{ØJ0`J"h'ïbase-addressint-addressefuse-addressxs~ðe ²ø ûÿdss@58000000 ti,omap4-dss—X€Xokay Ydss_core›¡¢fck+hdispc@58001000ti,omap4-dispc—X N Ydss_dispc›¡¢fckencoder@58002000ti,omap4-rfbi—X  Xdisabled Ydss_rfbi›¡¢fckickencoder@58003000ti,omap4-venc—X0 Xdisabled Ydss_venc›¢¢fckencoder@58004000 ti,omap4-dsi—X@XB@XC ïprotophypll N5 Xdisabled Ydss_dsi1›¡£ ¢fcksys_clkencoder@58005000 ti,omap4-dsi—XPXR@XS ïprotophypll NT Xdisabled Ydss_dsi2›¡£ ¢fcksys_clkencoder@58006000ti,omap4-hdmi —X`XbXcXdïwppllphycore NeXokay Ydss_hdmi›¤£ ¢fcksys_clk_€L daudio_tx“default¡¥¦portendpoint‹§³³bandgap@4a002260—J"`J#,J#xti,omap4460-bandgap N~ ƨ›©©pmuarm,cortex-a9-pmuN67Ydebugssthermal-zonescpu_thermal±úÇèÕ©tripscpu_alert冠ñÐpassiveªªcpu_critåèHñÐ criticalcooling-mapsmap0üª «ÿÿÿÿÿÿÿÿmemory@80000000zmemory—€@soundti,abe-twl6040 VAR-SOM-OM44Ið&¬/›L:Headset StereophoneHSOLHeadset StereophoneHSORAFMLLine InAFMRLine Inhsusb1_phyusb-nop-xceiv“default¡­® K‰W™›{ ¢main_clk|$øžžfixedregulator-vbatregulator-fixedÆVBATÕ2Z í2Z ­b™™wl12xx_vmmc“default¡¯regulator-fixedÆvwl1271Õw@íw@ õ— tp––leds gpio-leds“default¡°led0…var:green:led0 Ɖ  ‹heartbeatled1…var:green:led1 Ɖ gpio-keys gpio-keys“default¡±+user-key@184…user Ɖ¡¬connectorhdmi-connector“default¡²…hdmia º—portendpoint‹³§§ compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3display0device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-pointscooling-min-levelcooling-max-level#cooling-cellslinux,phandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptsti,hwmodssramranges#clock-cellsclock-frequencyti,bit-shiftti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitclock-multclock-divti,index-power-of-twoti,dividersti,clock-divti,clock-multti,set-rate-parent#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsstatusdmasdma-namesgpmc,num-csgpmc,num-waitpinsti,no-idle-on-init#hwlock-cellsregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,spi-num-csspi-max-frequencyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardref-clock-frequencycd-gpios#iommu-cellsti,iommu-bus-err-backreg-namesinterrupt-namesti,buffer-sizephy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertctrl-module#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmport1-modephysusb-phyphy-namesmultipointnum-epsram-bitsinterface-typepowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdda-supplyremote-endpoint#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosvcc-supplyregulator-boot-onstartup-delay-uslabellinux,default-triggerlinux,codewakeup-sourcehpd-gpios