683t(3<,ET Q8 Quad Core Tablet (v1.6)2et,q8-v1.6allwinner,sun8i-a33chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0c jdisabledaliasesq/soc@01c00000/serial@01c28000memoryymemory@timer2arm,armv7-timer0   n6cpusallwinner,sun8i-a23cpu@02arm,cortex-a7ycpucpu@12arm,cortex-a7ycpucpu@22arm,cortex-a7ycpucpu@32arm,cortex-a7ycpuclocks=osc24M_clk 2fixed-clockn6osc24Mosc32k_clk 2fixed-clockosc32kclk@01c200002allwinner,sun8i-a23-pll1-clkcpll1pll5_clk 2fixed-clockpll5  clk@01c200282allwinner,sun6i-a31-pll6-clk(c pll6pll6x2cpu_clk@01c200502allwinner,sun4i-a10-cpu-clkPccpuaxi_clk@01c200502allwinner,sun8i-a23-axi-clkPcaxiahb1_clk@01c200542allwinner,sun6i-a31-ahb1-clkTcahb1apb1_clk@01c200542allwinner,sun4i-a10-apb0-clkTcapb1  clk@01c20060#2allwinner,sun8i-a23-ahb1-gates-clk`cahb1_mipidsiahb1_dmaahb1_mmc0ahb1_mmc1ahb1_mmc2ahb1_nandahb1_sdramahb1_hstimerahb1_spi0ahb1_spi1ahb1_otgahb1_ehciahb1_ohciahb1_veahb1_lcdahb1_csiahb1_beahb1_feahb1_gpuahb1_spinlockahb1_drc  clk@01c20068#2allwinner,sun8i-a23-apb1-gates-clkhc .apb1_codecapb1_pioapb1_daudio0apb1_daudio1clk@01c200582allwinner,sun4i-a10-apb1-clkXcapb2  clk@01c2006c#2allwinner,sun8i-a23-apb2-gates-clklc Uapb2_i2c0apb2_i2c1apb2_i2c2apb2_uart0apb2_uart1apb2_uart2apb2_uart3apb2_uart4clk@01c200882allwinner,sun4i-a10-mmc-clk cmmc0mmc0_outputmmc0_sampleclk@01c2008c2allwinner,sun4i-a10-mmc-clk cmmc1mmc1_outputmmc1_sampleclk@01c200902allwinner,sun4i-a10-mmc-clk cmmc2mmc2_outputmmc2_sampleclk@01c200cc2allwinner,sun8i-a23-usb-clkc2usb_phy0usb_phy1usb_hsicusb_hsic_12Musb_ohci0pll11_clk 2fixed-clockpll11  clk@01c2015c2allwinner,sun8i-a23-mbus-clk\c mbussoc@01c00000 2simple-bus=dma-controller@01c020002allwinner,sun8i-a23-dma  2c mmc@01c0f0002allwinner,sun5i-a13-mmc c #ahbmmcoutputsample/ahb < jdisabledmmc@01c100002allwinner,sun5i-a13-mmc c #ahbmmcoutputsample /ahb = jdisabledmmc@01c110002allwinner,sun5i-a13-mmc c #ahbmmcoutputsample /ahb > jdisabledpinctrl@01c20800c;K`2allwinner,sun8i-a33-pinctrluart0@0lPF2PF4{uart0mmc0@0lPF0PF1PF2PF3PF4PF5{mmc0mmc1@0lPG0PG1PG2PG3PG4PG5{mmc1mmc2_8bit.lPC5PC6PC8PC9PC10PC11PC12PC13PC14PC15{mmc2i2c0@0lPH2PH3{i2c0i2c1@0lPH4PH5{i2c1i2c2@0 lPE12PE13{i2c2uart0@1lPB0PB1{uart0ahci_pwr_pin@0lPB8 {gpio_outusb0_vbus_pin@0lPB9 {gpio_outusb1_vbus_pin@0lPH6 {gpio_out  usb2_vbus_pin@0lPH3 {gpio_out!!reset@01c202c0 2allwinner,sun6i-a31-clock-reset reset@01c202d0 2allwinner,sun6i-a31-clock-resetreset@01c202d8 2allwinner,sun6i-a31-clock-resettimer@01c20c002allwinner,sun4i-a10-timer cwatchdog@01c20ca02allwinner,sun6i-a31-wdt  lradc@01c228002allwinner,sun4i-a10-lradc-keys( jokaybutton@200 Volume Ups @button@400 Volume Downrserial@01c280002snps,dw-apb-uart€ crxtxjokaydefaultserial@01c284002snps,dw-apb-uart„ crxtx jdisabledserial@01c288002snps,dw-apb-uartˆ crxtx jdisabledserial@01c28c002snps,dw-apb-uartŒ c  rxtx jdisabledserial@01c290002snps,dw-apb-uart c  rxtx jdisabledi2c@01c2ac002allwinner,sun6i-a31-i2c¬ c jdisabledi2c@01c2b0002allwinner,sun6i-a31-i2c° c jdisabledi2c@01c2b4002allwinner,sun6i-a31-i2c´ c jdisabledinterrupt-controller@01c81000%2arm,cortex-a7-gicarm,cortex-a15-gic  @ ` K  rtc@01f000002allwinner,sun6i-a31-rtcT()prcm@01f014002allwinner,sun8i-a23-prcmar100_clk2fixed-factor-clock)3car100ahb0_clk2fixed-factor-clock)3cahb0apb0_clk2allwinner,sun8i-a23-apb0-clkcapb0apb0_gates_clk#2allwinner,sun8i-a23-apb0-gates-clkc0apb0_pioapb0_timerapb0_rsbapb0_uartapb0_i2capb0_rst 2allwinner,sun6i-a31-clock-resetcpucfg@01f01c002allwinner,sun8i-a23-cpuconfigserial@01f028002snps,dw-apb-uart( &c jdisabledpinctrl@01f02c002allwinner,sun8i-a23-r-pinctrl, -c;K`r_uart@0lPL2PL3{s_uartahci-5v2regulator-fixeddefault>ahci-5vMLK@eLK@} jdisabledusb0-vbus2regulator-fixeddefault >usb0-vbusMLK@eLK@  jdisabledusb1-vbus2regulator-fixeddefault  >usb1-vbusMLK@eLK@ jdisabledusb2-vbus2regulator-fixeddefault! >usb2-vbusMLK@eLK@ jdisabledvcc3v02regulator-fixed>vcc3v0M-e-vcc3v32regulator-fixed>vcc3v3M2Ze2Zvcc5v02regulator-fixed>vcc5v0MLK@eLK@ #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusserial0device_typereginterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-method#clock-cellsclock-output-nameslinux,phandle#reset-cellsresets#dma-cellsclock-namesreset-namesgpio-controllerinterrupt-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pullvref-supplylabellinux,codechannelvoltagereg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0#interrupt-cellsclock-divclock-multregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpio