l8h(g,Merrii A20 Hummingbird+2merrii,a20-hummingbirdallwinner,sun7i-a20chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-hdmi c$+, jdisabledframebuffer@102allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0c$, jdisabledframebuffer@202allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-tve0 c"$, jdisabledaliases q/soc@01c00000/ethernet@01c50000{/soc@01c00000/serial@01c28000/soc@01c00000/serial@01c28800/soc@01c00000/serial@01c28c00/soc@01c00000/serial@01c29000/soc@01c00000/serial@01c29400memorymemory@cpuscpu@02arm,cortex-a7cpuc8\ \ / OB@2  cpu@12arm,cortex-a7cputhermal-zonescpu_thermal)7cooling-mapsmap0G Ltripscpu_alert0[$gpassive cpu_crit[g criticaltimer2arm,armv7-timer0r   pmu%2arm,cortex-a7-pmuarm,cortex-a15-pmurxyclocks=clk@01c20050}2allwinner,sun4i-a10-osc-clkPn6osc24M clk@0} 2fixed-clockosc32k  clk@01c20000}2allwinner,sun4i-a10-pll1-clkcpll1  clk@01c20018}2allwinner,sun7i-a20-pll4-clkcpll4clk@01c20020}2allwinner,sun4i-a10-pll5-clk cpll5_ddrpll5_other clk@01c20028}2allwinner,sun4i-a10-pll6-clk(c%pll6_satapll6_otherpll6pll6_div_4  clk@01c20040}2allwinner,sun7i-a20-pll4-clk@cpll8cpu@01c20054}2allwinner,sun4i-a10-cpu-clkTc  cpu axi@01c20054}2allwinner,sun4i-a10-axi-clkTcaxi  ahb@01c20054}2allwinner,sun5i-a13-ahb-clkTc  ahb    clk@01c20060}"2allwinner,sun7i-a20-ahb-gates-clk`c vahb_usb0ahb_ehci0ahb_ohci0ahb_ehci1ahb_ohci1ahb_ssahb_dmaahb_bistahb_mmc0ahb_mmc1ahb_mmc2ahb_mmc3ahb_msahb_nandahb_sdramahb_aceahb_emacahb_tsahb_spi0ahb_spi1ahb_spi2ahb_spi3ahb_sataahb_hstimerahb_veahb_tvdahb_tve0ahb_tve1ahb_lcd0ahb_lcd1ahb_csi0ahb_csi1ahb_hdmi1ahb_hdmi0ahb_de_be0ahb_de_be1ahb_de_fe0ahb_de_fe1ahb_gmacahb_mpahb_mali apb0@01c20054}2allwinner,sun4i-a10-apb0-clkTc apb0 clk@01c20068}#2allwinner,sun7i-a20-apb0-gates-clkhceapb0_codecapb0_spdifapb0_ac97apb0_iis0apb0_iis1apb0_pioapb0_ir0apb0_ir1apb0_iis2apb0_keypad* *clk@01c20058}2allwinner,sun4i-a10-apb1-clkXc  apb1 clk@01c2006c}#2allwinner,sun7i-a20-apb1-gates-clklcapb1_i2c0apb1_i2c1apb1_i2c2apb1_i2c3apb1_canapb1_scrapb1_ps20apb1_ps21apb1_i2c4apb1_uart0apb1_uart1apb1_uart2apb1_uart3apb1_uart4apb1_uart5apb1_uart6apb1_uart7/ /clk@01c20080}2allwinner,sun4i-a10-mod0-clkc nandclk@01c20084}2allwinner,sun4i-a10-mod0-clkc msclk@01c20088}2allwinner,sun4i-a10-mmc-clkc mmc0mmc0_outputmmc0_sample clk@01c2008c}2allwinner,sun4i-a10-mmc-clkc mmc1mmc1_outputmmc1_sample clk@01c20090}2allwinner,sun4i-a10-mmc-clkc mmc2mmc2_outputmmc2_sample clk@01c20094}2allwinner,sun4i-a10-mmc-clkc mmc3mmc3_outputmmc3_sample clk@01c20098}2allwinner,sun4i-a10-mod0-clkc tsclk@01c2009c}2allwinner,sun4i-a10-mod0-clkc ssclk@01c200a0}2allwinner,sun4i-a10-mod0-clkc spi0 clk@01c200a4}2allwinner,sun4i-a10-mod0-clkc spi1 clk@01c200a8}2allwinner,sun4i-a10-mod0-clkc spi2% %clk@01c200ac}2allwinner,sun4i-a10-mod0-clkc pataclk@01c200b0}2allwinner,sun4i-a10-mod0-clkc ir0, ,clk@01c200b4}2allwinner,sun4i-a10-mod0-clkc ir1. .clk@01c200cc}2allwinner,sun4i-a10-usb-clkc usb_ohci0usb_ohci1usb_phy! !clk@01c200d4}2allwinner,sun4i-a10-mod0-clkc spi3) )clk@01c2015c}2allwinner,sun5i-a13-mbus-clk\c mbusclk@2} 2fixed-clock}x@ mii_phy_tx clk@3} 2fixed-clocksY@ gmac_int_tx clk@01c20164}2allwinner,sun7i-a20-gmac-clkdcgmac_tx: :clk@1}2fixed-factor-clockc osc24M_32k clk@01c201f0}2allwinner,sun7i-a20-out-clk c  clk_out_aclk@01c201f4}2allwinner,sun7i-a20-out-clk c  clk_out_bsoc@01c00000 2simple-bus=sram-controller@01c00000$2allwinner,sun4i-a10-sram-controller0=sram@00000000 2mmio-sram =sram-section@80002allwinner,sun4i-a10-sram-a3-a4@ jdisabled sram@00010000 2mmio-sram =sram-section@00002allwinner,sun4i-a10-sram-d jdisabledinterrupt-controller@01c000302allwinner,sun7i-a20-sc-nmi 0  r6 6dma-controller@01c020002allwinner,sun4i-a10-dma  rc spi@01c050002allwinner,sun4i-a10-spiP r  c'ahbmod38rxtx jdisabledspi@01c060002allwinner,sun4i-a10-spi` r  c'ahbmod3 8rxtx jdisabledethernet@01c0b0002allwinner,sun4i-a10-emac r7cB jdisabledmdio@01c0b0802allwinner,sun4i-a10-mdio jdisabledmmc@01c0f0002allwinner,sun5i-a13-mmc c'ahbmmcoutputsample r jokayQdefault_iummc@01c100002allwinner,sun5i-a13-mmc c 'ahbmmcoutputsample r! jdisabledmmc@01c110002allwinner,sun5i-a13-mmc c 'ahbmmcoutputsample r" jdisabledmmc@01c120002allwinner,sun5i-a13-mmc  c 'ahbmmcoutputsample r#jokayQdefault_i uphy@01c134002allwinner,sun7i-a20-usb-phy4Hphy_ctrlpmu1pmu2c!'usb_phy!!!!usb0_resetusb1_resetusb2_resetjokay"#$ $usb@01c14000&2allwinner,sun7i-a20-ehcigeneric-ehci@ r'c$usbjokayusb@01c14400&2allwinner,sun7i-a20-ohcigeneric-ohciD r@c!$usbjokayspi@01c170002allwinner,sun4i-a10-spip r  c%'ahbmod38rxtxjokayQdefault_&'sata@01c180002allwinner,sun4i-a10-ahci r8c jokay(usb@01c1c000&2allwinner,sun7i-a20-ehcigeneric-ehci r(c$usbjokayusb@01c1c400&2allwinner,sun7i-a20-ohcigeneric-ohci rAc!$usbjokayspi@01c1f0002allwinner,sun4i-a10-spi r2 c)'ahbmod38rxtx jdisabledpinctrl@01c208002allwinner,sun7i-a20-pinctrl rc*   pwm0@0%PB24pwmGW+ +pwm1@0%PI34pwmGWuart0@0 %PB22PB234uart0GW0 0uart2@0%PI16PI17PI18PI194uart2GW1 1uart3@0%PG6PG7PG8PG94uart3GW2 2uart3@1%PH0PH14uart3GWuart4@0 %PG10PG114uart4GW3 3uart4@1%PH4PH54uart4GWuart5@0 %PI10PI114uart5GW4 4uart6@0 %PI12PI134uart6GWuart7@0 %PI20PI214uart7GWi2c0@0%PB0PB14i2c0GW5 5i2c1@0 %PB18PB194i2c1GW7 7i2c2@0 %PB20PB214i2c2GW8 8i2c3@0%PI0PI14i2c3GW9 9emac0@0K%PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA164emacGWclk_out_a@0%PI12 4clk_out_aGWclk_out_b@0%PI13 4clk_out_bGWgmac_mii@0K%PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA164gmacGWgmac_rgmii@0B%PA0PA1PA2PA3PA4PA5PA6PA7PA8PA10PA11PA12PA13PA15PA164gmacGW; ;spi0@0%PI11PI12PI134spi0GWspi0_cs0@0%PI104spi0GWspi0_cs1@0%PI144spi0GWspi1@0%PI17PI18PI194spi1GWspi1_cs0@0%PI164spi1GWspi2@0%PC20PC21PC224spi2GWspi2@1%PB15PB16PB174spi2GW& &spi2_cs0@0%PC194spi2GWspi2_cs0@1%PB144spi2GW' 'mmc0@0%PF0PF1PF2PF3PF4PF54mmc0GW mmc0_cd_pin@0%PH14gpio_inGW mmc2@0%PC6PC7PC8PC9PC10PC114mmc2GWmmc3@0%PI4PI5PI6PI7PI8PI94mmc3GW ir0@0%PB44ir0GW- -ir0@1%PB34ir0GWir1@0%PB234ir1GWir1@1%PB224ir1GWps20@0 %PI20PI214ps2GWps21@0 %PH12PH134ps2GWahci_pwr_pin@0%PH15 4gpio_outGW> >usb0_vbus_pin@0%PB9 4gpio_outGW? ?usb1_vbus_pin@0%PH2 4gpio_outGW@ @usb2_vbus_pin@0%PH3 4gpio_outGWA Ammc3_vdd_pin@0%PH9 4gpio_outGWB Bgmac_vdd_pin@0%PH16 4gpio_outGWC Ctimer@01c20c002allwinner,sun4i-a10-timer HrCDcwatchdog@01c20c902allwinner,sun4i-a10-wdt rtc@01c20d002allwinner,sun7i-a20-rtc  rpwm@01c20e002allwinner,sun7i-a20-pwm cfjokayQdefault_+ir@01c218002allwinner,sun4i-a10-ir c*,'apbir r@jokayQdefault_-ir@01c21c002allwinner,sun4i-a10-ir c*.'apbir r@ jdisabledlradc@01c228002allwinner,sun4i-a10-lradc-keys( r jdisabledeeprom@01c238002allwinner,sun7i-a20-sid8rtp@01c250002allwinner,sun5i-a13-tsP rq serial@01c280002snps,dw-apb-uart€ rc/jokayQdefault_0serial@01c284002snps,dw-apb-uart„ rc/ jdisabledserial@01c288002snps,dw-apb-uartˆ rc/jokayQdefault_1serial@01c28c002snps,dw-apb-uartŒ rc/jokayQdefault_2serial@01c290002snps,dw-apb-uart rc/jokayQdefault_3serial@01c294002snps,dw-apb-uart” rc/jokayQdefault_4serial@01c298002snps,dw-apb-uart˜ rc/ jdisabledserial@01c29c002snps,dw-apb-uartœ rc/ jdisabledi2c@01c2ac0002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c¬ rc/jokayQdefault_5pmic@342x-powers,axp20946r i2c@01c2b00002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c° rc/jokayQdefault_7i2c@01c2b40002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c´ r c/jokayQdefault_8i2c@01c2b80002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c¸ rXc/jokayQdefault_9i2c@01c2c00002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c rYc/ jdisabledethernet@01c500002allwinner,sun7i-a20-gmac rUmacirq c1:'stmmacethallwinner_gmac_txjokayQdefault_;<rgmii= 'B@ethernet-phy@1< <hstimer@01c600002allwinner,sun7i-a20-hstimer0rQRSTcinterrupt-controller@01c81000%2arm,cortex-a7-gicarm,cortex-a15-gic  @ `   r  ps2@01c2a0002allwinner,sun4i-a10-ps2  r>c/ jdisabledps2@01c2a4002allwinner,sun4i-a10-ps2¤ r?c/ jdisabledahci-5v2regulator-fixedQdefault_>2ahci-5vALK@YLK@qjokay( (usb0-vbus2regulator-fixedQdefault_? 2usb0-vbusALK@YLK@  jdisabledusb1-vbus2regulator-fixedQdefault_@ 2usb1-vbusALK@YLK@jokay" "usb2-vbus2regulator-fixedQdefault_A 2usb2-vbusALK@YLK@jokay# #vcc3v02regulator-fixed2vcc3v0A-Y- vcc3v32regulator-fixed2vcc3v3A2ZY2Zvcc5v02regulator-fixed2vcc5v0ALK@YLK@mmc3_vdd2regulator-fixedQdefault_B 2mmc3_vddA-Y-   gmac_vdd2regulator-fixedQdefault_C 2gmac_vddA-Y-= = #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0serial1serial2serial3serial4device_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levellinux,phandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisinterrupts#clock-cellsclock-frequencyclock-output-namesassigned-clocksassigned-clock-parents#reset-cellsclock-divclock-multinterrupt-controller#interrupt-cells#dma-cellsclock-namesdmasdma-namesallwinner,srampinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertednon-removable#phy-cellsreg-namesresetsreset-namesusb1_vbus-supplyusb2_vbus-supplyphysphy-namestarget-supplygpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#pwm-cells#thermal-sensor-cellsreg-shiftreg-io-widthinterrupt-namessnps,pblsnps,fixed-burstsnps,force_sf_dma_modephyphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-high