Z8UH(U,Merrii A31 Hummingbird+2merrii,a31-hummingbirdallwinner,sun6i-a31chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-hdmic jdisabledframebuffer@102allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0c jdisabledaliases q/soc@01c00000/ethernet@01c30000{/soc@01c00000/serial@01c28000memorymemory@timer2arm,armv7-timer0   n6cpusallwinner,sun6i-a31cpu@02arm,cortex-a7cpuc aO /O SB@ 28cpu@12arm,cortex-a7cpucpu@22arm,cortex-a7cpucpu@32arm,cortex-a7cputhermal-zonescpu_thermal@Vdcooling-mapsmap0t ytripscpu_alert0ppassive28cpu_crit criticalpmu%2arm,cortex-a7-pmuarm,cortex-a15-pmu0xyz{clocks=osc24M 2fixed-clockn628clk@0 2fixed-clockosc32k28clk@01c200002allwinner,sun6i-a31-pll1-clkcpll12 8 clk@01c200282allwinner,sun6i-a31-pll6-clk(c pll6pll6x228cpu@01c200502allwinner,sun4i-a10-cpu-clkPc cpu28axi@01c200502allwinner,sun4i-a10-axi-clkPcaxi2 8 ahb1@01c200542allwinner,sun6i-a31-ahb1-clkTc ahb1 2 8 clk@01c20060#2allwinner,sun6i-a31-ahb1-gates-clk`c zahb1_mipidsiahb1_ssahb1_dmaahb1_mmc0ahb1_mmc1ahb1_mmc2ahb1_mmc3ahb1_nand1ahb1_nand0ahb1_sdramahb1_gmacahb1_tsahb1_hstimerahb1_spi0ahb1_spi1ahb1_spi2ahb1_spi3ahb1_otgahb1_ehci0ahb1_ehci1ahb1_ohci0ahb1_ohci1ahb1_ohci2ahb1_veahb1_lcd0ahb1_lcd1ahb1_csiahb1_hdmiahb1_de0ahb1_de1ahb1_fe0ahb1_fe1ahb1_mpahb1_gpuahb1_deu0ahb1_deu1ahb1_drc0ahb1_drc128apb1@01c200542allwinner,sun4i-a10-apb0-clkTc apb12 8 clk@01c20068#2allwinner,sun6i-a31-apb1-gates-clkhc ?apb1_codecapb1_digital_micapb1_pioapb1_daudio0apb1_daudio12!8!clk@01c200582allwinner,sun4i-a10-apb1-clkXcapb22 8 clk@01c2006c#2allwinner,sun6i-a31-apb2-gates-clklc japb2_i2c0apb2_i2c1apb2_i2c2apb2_i2c3apb2_uart0apb2_uart1apb2_uart2apb2_uart3apb2_uart4apb2_uart52"8"clk@01c200882allwinner,sun4i-a10-mmc-clk cmmc0mmc0_outputmmc0_sample28clk@01c2008c2allwinner,sun4i-a10-mmc-clk cmmc1mmc1_outputmmc1_sample28clk@01c200902allwinner,sun4i-a10-mmc-clk cmmc2mmc2_outputmmc2_sample28clk@01c200942allwinner,sun4i-a10-mmc-clk cmmc3mmc3_outputmmc3_sample28clk@01c200a02allwinner,sun4i-a10-mod0-clk cspi02,8,clk@01c200a42allwinner,sun4i-a10-mod0-clk cspi12-8-clk@01c200a82allwinner,sun4i-a10-mod0-clk cspi22.8.clk@01c200ac2allwinner,sun4i-a10-mod0-clk cspi32/8/clk@01c200cc2allwinner,sun6i-a31-usb-clkc9usb_phy0usb_phy1usb_phy2usb_ohci0usb_ohci1usb_ohci228clk@1 2fixed-clock}x@ mii_phy_tx28clk@2 2fixed-clocksY@ gmac_int_tx28clk@01c200d02allwinner,sun7i-a20-gmac-clkcgmac_tx2)8)soc@01c00000 2simple-bus=dma-controller@01c020002allwinner,sun6i-a31-dma  2c2$8$mmc@01c0f0002allwinner,sun5i-a13-mmc cahbmmcoutputsampleahb <jokaydefault+5AKTmmc@01c100002allwinner,sun5i-a13-mmc c ahbmmcoutputsample ahb =jokaydefault+5`Akmmc@01c110002allwinner,sun5i-a13-mmc c ahbmmcoutputsample ahb > jdisabledmmc@01c120002allwinner,sun5i-a13-mmc  c ahbmmcoutputsample ahb ? jdisabledphy@01c194002allwinner,sun6i-a31-usb-phyyphy_ctrlpmu1pmu2c  usb0_phyusb1_phyusb2_phy!usb0_resetusb1_resetusb2_resetjokay2 8 usb@01c1a000&2allwinner,sun6i-a31-ehcigeneric-ehci Hc usbjokayusb@01c1a400&2allwinner,sun6i-a31-ohcigeneric-ohci Ic usbjokayusb@01c1b000&2allwinner,sun6i-a31-ehcigeneric-ehci Jc usb jdisabledusb@01c1b400&2allwinner,sun6i-a31-ohcigeneric-ohci Kc usb jdisabledusb@01c1c400&2allwinner,sun6i-a31-ohcigeneric-ohci Mc jdisabledpinctrl@01c208002allwinner,sun6i-a31-pinctrl0 c!28uart0@0 PH20PH21uart0"2%8%i2c0@0 PH14PH15i2c0"2&8&i2c1@0 PH16PH17i2c1"2'8'i2c2@0 PH18PH19i2c2"2(8(mmc0@0PF0PF1PF2PF3PF4PF5mmc0"28mmc1@0PG0PG1PG2PG3PG4PG5mmc1"28gmac_mii@0TPA0PA1PA2PA3PA8PA9PA11PA12PA13PA14PA19PA20PA21PA22PA23PA24PA26PA27gmac"gmac_gmii@0PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27gmac"gmac_rgmii@0FPA0PA1PA2PA3PA9PA10PA11PA12PA13PA14PA19PA20PA25PA26PA27gmac"2*8*ahci_pwr_pin@0PB8 gpio_out"2:8:usb0_vbus_pin@0PB9 gpio_out"2;8;usb1_vbus_pin@0PH24 gpio_out"2<8<usb2_vbus_pin@0PH3 gpio_out"2=8=mmc0_cd_pin@0PA8gpio_in"28wifi_reset_pin@0PG10 gpio_out"28reset@01c202c02allwinner,sun6i-a31-ahb1-reset 28reset@01c202d0 2allwinner,sun6i-a31-clock-resetreset@01c202d8 2allwinner,sun6i-a31-clock-reset2#8#timer@01c20c002allwinner,sun4i-a10-timer <cwatchdog@01c20ca02allwinner,sun6i-a31-wdt rtp@01c250002allwinner,sun6i-a31-tsP 128serial@01c280002snps,dw-apb-uart€ GQc"#^$$crxtxjokaydefault+%serial@01c284002snps,dw-apb-uart„ GQc"#^$$crxtx jdisabledserial@01c288002snps,dw-apb-uartˆ GQc"#^$$crxtx jdisabledserial@01c28c002snps,dw-apb-uartŒ GQc"#^$ $ crxtx jdisabledserial@01c290002snps,dw-apb-uart GQc"#^$ $ crxtx jdisabledserial@01c294002snps,dw-apb-uart” GQc"#^$$crxtx jdisabledi2c@01c2ac002allwinner,sun6i-a31-i2c¬ c"#jfaileddefault+&i2c@01c2b0002allwinner,sun6i-a31-i2c° c"#jokaydefault+'i2c@01c2b4002allwinner,sun6i-a31-i2c´ c"#jokaydefault+(rtc@51 2nxp,pcf8563Qi2c@01c2b8002allwinner,sun6i-a31-i2c¸ c"# jdisabledethernet@01c300002allwinner,sun7i-a20-gmacT Rmmacirq c)stmmacethallwinner_gmac_tx stmmaceth}jokaydefault+*+rgmii 'u0ethernet-phy@12+8+timer@01c6000082allwinner,sun6i-a31-hstimerallwinner,sun7i-a20-hstimer03456cspi@01c680002allwinner,sun6i-a31-spiƀ A c,ahbmod^$$crxtx jdisabledspi@01c690002allwinner,sun6i-a31-spiƐ B c-ahbmod^$$crxtx jdisabledspi@01c6a0002allwinner,sun6i-a31-spiƠ C c.ahbmod^$$crxtx jdisabledspi@01c6b0002allwinner,sun6i-a31-spiư D c/ahbmod^$$crxtx jdisabledinterrupt-controller@01c81000%2arm,cortex-a7-gicarm,cortex-a15-gic  @ `   28rtc@01f000002allwinner,sun6i-a31-rtcT()interrupt-controller@01f00c0c2allwinner,sun6i-a31-sc-nmi 8 2888prcm@01f014002allwinner,sun6i-a31-prcmar100_clk2allwinner,sun6i-a31-ar100-clkcar1002080ahb0_clk2fixed-factor-clockc0ahb02181apb0_clk2allwinner,sun6i-a31-apb0-clkc1apb02282apb0_gates_clk#2allwinner,sun6i-a31-apb0-gates-clkc2Dapb0_pioapb0_irapb0_timerapb0_p2wiapb0_uartapb0_1wireapb0_i2c2383ir_clk2allwinner,sun4i-a10-mod0-clkcir2484apb0_rst 2allwinner,sun6i-a31-clock-reset2585cpucfg@01f01c002allwinner,sun6i-a31-cpuconfigir@01f020002allwinner,sun5i-a13-ir c34apbir5 % @jokaydefault+6pinctrl@01f02c002allwinner,sun6i-a31-r-pinctrl,-.c35ir@0PL4s_ir"2686p2wiPL0PL1s_p2wi"2787i2c@01f034002allwinner,sun6i-a31-p2wi4 'c35default+7jokaypmic@682x-powers,axp221h8 9regulators% dcdc18L-d-|vcc-3v028dcdc28L `d$@|vdd-cpudcdc38L `d$@|vdd-gpudcdc48Ld |vdd-sys-dlldcdc58L`d` |vcc-dram2989aldo1L2Zd2Z |vcc_wifi28aldo38L-d-|avccahci-5v2regulator-fixeddefault+:|ahci-5vLLK@dLK@ jdisabledusb0-vbus2regulator-fixeddefault+; |usb0-vbusLLK@dLK@  jdisabledusb1-vbus2regulator-fixeddefault+< |usb1-vbusLLK@dLK@jokay28usb2-vbus2regulator-fixeddefault+= |usb2-vbusLLK@dLK@ jdisabledvcc3v02regulator-fixed|vcc3v0L-d-vcc3v32regulator-fixed|vcc3v3L2Zd2Zvcc5v02regulator-fixed|vcc5v0LLK@dLK@wifi_pwrseq2mmc-pwrseq-simple 28 #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0device_typereginterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-methodclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levellinux,phandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-output-namesassigned-clocksassigned-clock-parents#reset-cellsresets#dma-cellsclock-namesreset-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedmmc-pwrseqnon-removablereg-names#phy-cellsusb1_vbus-supplyphysphy-namesgpio-controllerinterrupt-controller#interrupt-cells#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#thermal-sensor-cellsreg-shiftreg-io-widthdmasdma-namesinterrupt-namessnps,pblsnps,fixed-burstsnps,force_sf_dma_modephyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usclock-divclock-multdcdc1-supplydcdc5-supplyx-powers,dcdc-freqregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-boot-onenable-active-highreset-gpios