Ð þídð8a(Ô`ä,ST-Ericsson U8540 platform with Device Tree&!st-ericsson,ccu8540st-ericsson,u8540chosenaliases,/soc/uart@801200004/soc/uart@80121000 à‡mc—otgŸ&&%%$$''ˆ¤iep_1_9oep_1_9iep_2_10oep_2_10iep_3_11oep_3_11iep_4_12oep_4_12iep_5_13oep_5_13iep_6_14oep_6_14iep_7_15oep_7_15iep_8oep_8 Œdma-controller@801C0000)!stericsson,db8500-dma40stericsson,dma40P€@ ®baselcpa à¸Ã89:;<Œflprcmu@80157000!stericsson,db8500-prcmuP€p €€€€0®prcmuprcmu-tcpmprcmu-tcdm à/˺…flprcmu-timer-4@80157450 !stericsson,db8500-prcmu-timer-4P€tP cpufreq!stericsson,cpufreq-ux500Œ,“armss Ódisabledthermal@801573c0!stericsson,db8500-thermalP€sÀ@à‡IRQ_HOTMON_LOWIRQ_HOTMON_HIGH Ódisableddb8500-prcmu-regulators"!stericsson,db8500-prcmu-regulatordb8500_vape Údb8500_vapeïfldb8500_varm Údb8500_varmdb8500_vmodemÚdb8500_vmodemdb8500_vpll Údb8500_vplldb8500_vsmps1Údb8500_vsmps1db8500_vsmps2Údb8500_vsmps2fldb8500_vsmps3Údb8500_vsmps3db8500_vrf1 Údb8500_vrf1db8500_sva_mmdspÚdb8500_sva_mmdspdb8500_sva_mmdsp_retÚdb8500_sva_mmdsp_retdb8500_sva_pipeÚdb8500_sva_pipedb8500_sia_mmdspÚdb8500_sia_mmdspdb8500_sia_mmdsp_retdb8500_sia_pipeÚdb8500_sia_pipedb8500_sga Údb8500_sgadb8500_b2r2_mcdeÚdb8500_b2r2_mcdedb8500_esram12Údb8500_esram12db8500_esram12_retÚdb8500_esram12_retdb8500_esram34Údb8500_esram34db8500_esram34_retÚdb8500_esram34_retab8500!stericsson,ab8500t à(˺ab8500-gpio<Lab8500-rtc!stericsson,ab8500-rtcà ‡60SALARMab8500-gpadc!stericsson,ab8500-gpadcà '‡HW_CONV_ENDSW_CONV_ENDab8500_batteryLIPO4flab8500_fg!stericsson,ab8500-fgJab8500_btemp!stericsson,ab8500-btempJab8500_charger!stericsson,ab8500-chargerJab8500_chargalg!stericsson,ab8500-chargalgJab8500_usb!stericsson,ab8500-usb8àZ`OJKf‡ID_WAKEUP_RID_WAKEUP_FVBUS_DET_FVBUS_DET_RUSB_LINK_STATUSUSB_ADP_PROBE_PLUGUSB_ADP_PROBE_UNPLUGRfsab8500-ponkey!stericsson,ab8500-poweron-keyà‡ONKEY_DBFONKEY_DBRab8500-sysctrl!stericsson,ab8500-sysctrlab8500-pwm!stericsson,ab8500-pwmab8500-debugfs!stericsson,ab8500-debugab8500-codec!stericsson,ab8500-codecƒŸ® ¼¶ab8500-ext-regulators !stericsson,ab8500-ext-regulatorab8500_ext1 Úab8500_ext1Ôw@ìw@ïab8500_ext2 Úab8500_ext2ÔÀ€ìÀ€ïab8500_ext3 Úab8500_ext3Ô3á@ì3á@f!l!ab8500-regulators!stericsson,ab8500-regulator!ab8500_ldo_aux1Úab8500_ldo_aux1Ô&% ì,@ ïab8500_ldo_aux2Úab8500_ldo_aux2ÔÈàì2Z ab8500_ldo_aux3Úab8500_ldo_aux3ÔÈàì2Z ab8500_ldo_intcoreÚab8500_ldo_intcoreflab8500_ldo_tvoutÚab8500_ldo_tvoutflab8500_ldo_usbÚab8500_ldo_usbab8500_ldo_audioÚab8500_ldo_audioflab8500_ldo_anamic1Úab8500_ldo_anamic1flab8500_ldo_anamic2Úab8500_ldo_anamic2flab8500_ldo_dmicÚab8500_ldo_dmicf l ab8500_ldo_anaÚab8500_ldo_anai2c@800040003!stericsson,db8500-i2cst,nomadik-i2carm,primecellP€@ à#€Œ"“i2cclkapb_pclk3#AdefaultsleepO$%Y&i2c@801220003!stericsson,db8500-i2cst,nomadik-i2carm,primecellP€  à#€Œ"“i2cclkapb_pclk3#AdefaultsleepO'(Y)i2c@801280003!stericsson,db8500-i2cst,nomadik-i2carm,primecellP€€ à7#€Œ"“i2cclkapb_pclk3#AdefaultsleepO*+Y,i2c@801100003!stericsson,db8500-i2cst,nomadik-i2carm,primecellP€ à #€Œ"“i2cclkapb_pclk3# Ódisabledi2c@8012a0003!stericsson,db8500-i2cst,nomadik-i2carm,primecellP€  à3#€Œ"  “i2cclkapb_pclk3#AdefaultsleepO-.Y/ssp@80002000!arm,pl022arm,primecellP€  àŒ"“SSPCLKapb_pclk Ÿ¤rxtx3#ssp@80003000!arm,pl022arm,primecellP€0 à4Œ"“SSPCLKapb_pclk Ÿ  ¤rxtx3#spi@8011a000!arm,pl022arm,primecellP€  àŒ“SSPCLKapb_pclk Ÿ¤rxtx3#spi@80112000!arm,pl022arm,primecellP€  à`Œ“SSPCLKapb_pclk Ÿ##¤rxtx3#spi@80111000!arm,pl022arm,primecellP€ àŒ“SSPCLKapb_pclk Ÿ!!¤rxtx3#spi@80129000!arm,pl022arm,primecellP€ à1Œ“SSPCLKapb_pclk Ÿ((¤rxtx3#uart@80120000!arm,pl011arm,primecellP€ à  Ÿ  ¤rxtxŒ"“uartapb_pclkÓokayAdefaultsleepO01Y2uart@80121000!arm,pl011arm,primecellP€ à Ÿ  ¤rxtxŒ"“uartapb_pclkÓokayuart@80007000!arm,pl011arm,primecellP€p à Ÿ  ¤rxtxŒ"“uartapb_pclkÓokayAdefaultsleepO3Y4sdi0_per1@80126000!arm,pl18xarm,primecellP€` à< Ÿ¤rxtxŒ" “sdiapb_pclk3# Ódisabledsdi1_per2@80118000!arm,pl18xarm,primecellP€€ à2 Ÿ  ¤rxtxŒ" “sdiapb_pclk3# Ódisabledsdi2_per3@80005000!arm,pl18xarm,primecellP€P à) Ÿ¤rxtxŒ" “sdiapb_pclk3# Ódisabledsdi3_per2@80119000!arm,pl18xarm,primecellP€ à; Ÿ))¤rxtxŒ" “sdiapb_pclk3# Ódisabledsdi4_per2@80114000!arm,pl18xarm,primecellP€@ àc Ÿ**¤rxtxŒ" “sdiapb_pclk3# Ódisabledsdi5_per3@80008000!arm,pl18xarm,primecellP€€ àd Ÿ++¤rxtxŒ" “sdiapb_pclk3# Ódisabledmsp@80123000!stericsson,ux500-msp-i2sP€0 àf Ÿ¤rxtxŒ" “mspapb_pclk Ódisabledmsp@80124000!stericsson,ux500-msp-i2sP€@ à>fŸ¤txŒ" “mspapb_pclk Ódisabledmsp@80117000!stericsson,ux500-msp-i2sP€p àbf Ÿ¤rxtxŒ" “mspapb_pclk Ódisabledmsp@80125000!stericsson,ux500-msp-i2sP€P à>fŸ¤rxŒ"   “mspapb_pclk Ódisabledexternal-bus@50000000 !simple-busPP …P Ódisabledcpufreq-cooling"!stericsson,db8500-cpufreq-cooling Ódisabledmcde@a0350000!stericsson,mcde P 5 5 5  50 à0@Œ./0123cryp@a03cb000!stericsson,ux500-crypP <° àf Œhash@a03c2000!stericsson,ux500-hashP < f Œi2c@80001000AdefaultsleepO56Y7in_nopullcinput_pull_upcflinput_pull_downcoutput_highmfloutput_lowmgpio_input_pull_upxcgpio_input_pull_downxcgpio_output_lowxmgpio_output_highxmslpm_pdis‹œslpm_wkup_pdis‹œslpm_wkup_pdis_en‹œslpm_in_pu³‹flslpm_in_pdis³‹œslpm_in_wkup_pdis³‹œslpm_in_wkup_pdis_en³‹œslpm_out_loËslpm_out_hiËflslpm_out_hi_wkup_pdisËœslpm_out_lo_pdisËœslpm_out_lo_wkup_pdisËœslpm_out_wkup_pdisËœin_wkup_pdis³‹œin_wkup_pdis_en³‹œout_lo_wkup_pdisËœout_hi_wkup_pdisËœout_wkup_pdisËœmemory@0DmemoryP À? #address-cells#size-cellsmodelcompatibleserial0serial1serial2device_typeregenable-methodcpulinux,phandleinterrupt-parentrangesclocksclock-namesremote-endpointslave-mode#interrupt-cellsinterrupt-controllerinterruptscache-unifiedcache-level#power-domain-cells#clock-cellsst,supports-sleepmodegpio-controller#gpio-cellsgpio-bankprcmfunctiongroupspinsste,configinterrupt-namesdr_modedmasdma-namesreg-names#dma-cellsmemcpy-channelsstatusregulator-compatibleregulator-always-onvin-supplyvddadc-supplystericsson,battery-typethermistor-on-batctrlbatteryvddulpivio18-supplyv-ape-supplymusb_1v8-supplyV-AUD-supplyV-AMIC1-supplyV-AMIC2-supplyV-DMIC-supplystericsson,earpeice-cmvregulator-min-microvoltregulator-max-microvoltregulator-boot-onv-i2c-supplyclock-frequencypower-domainspinctrl-namespinctrl-0pinctrl-1ste,inputste,outputste,gpioste,sleepste,sleep-wakeupste,sleep-pull-disableste,sleep-inputste,sleep-output