88(ti,omap3430-sdpti,omap3&7TI OMAP3430 SDPchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000memorydmemorypcpuscpu@0arm,cortex-a8dcpupt{cpu(HАg8 Odp` 'ppmuarm,cortex-a8-pmupTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocpti,omap3-l3-smxsimple-busph l3_mainl4@48000000ti,omap3-l4-coresimple-bus Hscm@2000ti,omap3-scmsimple-busp  pinmux@30 ti,omap3-padconfpinctrl-singlep08pinmux_twl4030_pins#A7=scm_conf@270sysconpp07=clocksmcbsp5_mux_fckEti,composite-mux-clocktRph7=mcbsp5_fckEti,composite-clocktmcbsp1_mux_fckEti,composite-mux-clocktRp7=mcbsp1_fckEti,composite-clocktmcbsp2_mux_fckEti,composite-mux-clockt Rp7 = mcbsp2_fckEti,composite-clockt mcbsp3_mux_fckEti,composite-mux-clockt ph7 = mcbsp3_fckEti,composite-clockt mcbsp4_mux_fckEti,composite-mux-clockt Rph7=mcbsp4_fckEti,composite-clocktclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlep \pinmux_twl4030_vpins #7=aes@480c5000 ti,omap3-aesaespH PP_ABdtxrxprm@48306000 ti,omap3-prmpH0`@ clocksvirt_16_8m_ckE fixed-clocknY7=osc_sys_ckE ti,mux-clocktp @7=sys_ckEti,divider-clocktR~pp7=sys_clkout1Eti,gate-clocktp pRdpll3_x2_ckEfixed-factor-clocktdpll3_m2x2_ckEfixed-factor-clockt7=dpll4_x2_ckEfixed-factor-clocktcorex2_fckEfixed-factor-clockt7=wkup_l4_ickEfixed-factor-clockt7L=Lcorex2_d3_fckEfixed-factor-clockt7=corex2_d5_fckEfixed-factor-clockt7=clockdomainscm@48004000 ti,omap3-cmpH@@clocksdummy_apb_pclkE fixed-clocknomap_32k_fckE fixed-clockn7>=>virt_12m_ckE fixed-clockn7=virt_13m_ckE fixed-clockn]@7=virt_19200000_ckE fixed-clockn$7=virt_26000000_ckE fixed-clockn7=virt_38_4m_ckE fixed-clocknI7=dpll4_ckEti,omap3-dpll-per-clocktp D 07=dpll4_m2_ckEti,divider-clockt~?p H7=dpll4_m2x2_mul_ckEfixed-factor-clockt7=dpll4_m2x2_ckEti,gate-clocktRp 7 = omap_96m_alwon_fckEfixed-factor-clockt 7'='dpll3_ckEti,omap3-dpll-core-clocktp @ 07=dpll3_m3_ckEti,divider-clocktR~p@7!=!dpll3_m3x2_mul_ckEfixed-factor-clockt!7"="dpll3_m3x2_ckEti,gate-clockt"R p 7#=#emu_core_alwon_ckEfixed-factor-clockt#7`=`sys_altclkE fixed-clockn7,=,mcbsp_clksE fixed-clockn7=dpll3_m2_ckEti,divider-clocktR~p @7=core_ckEfixed-factor-clockt7$=$dpll1_fckEti,divider-clockt$R~p @7%=%dpll1_ckEti,omap3-dpll-clockt%p  $ @ 47=dpll1_x2_ckEfixed-factor-clockt7&=&dpll1_x2m2_ckEti,divider-clockt&~p D7:=:cm_96m_fckEfixed-factor-clockt'7(=(omap_96m_fckE ti,mux-clockt(Rp @7C=Cdpll4_m3_ckEti,divider-clocktR~ p@7)=)dpll4_m3x2_mul_ckEfixed-factor-clockt)7*=*dpll4_m3x2_ckEti,gate-clockt*Rp 7+=+omap_54m_fckE ti,mux-clockt+,Rp @76=6cm_96m_d2_fckEfixed-factor-clockt(7-=-omap_48m_fckE ti,mux-clockt-,Rp @7.=.omap_12m_fckEfixed-factor-clockt.7E=Edpll4_m4_ckEti,divider-clockt~ p@7/=/dpll4_m4x2_mul_ckEti,fixed-factor-clockt/70=0dpll4_m4x2_ckEti,gate-clockt0Rp 7=dpll4_m5_ckEti,divider-clockt~?p@71=1dpll4_m5x2_mul_ckEti,fixed-factor-clockt172=2dpll4_m5x2_ckEti,gate-clockt2Rp 7h=hdpll4_m6_ckEti,divider-clocktR~?p@73=3dpll4_m6x2_mul_ckEfixed-factor-clockt374=4dpll4_m6x2_ckEti,gate-clockt4Rp 75=5emu_per_alwon_ckEfixed-factor-clockt57a=aclkout2_src_gate_ckE ti,composite-no-wait-gate-clockt$Rp p77=7clkout2_src_mux_ckEti,composite-mux-clockt$(6p p78=8clkout2_src_ckEti,composite-clockt7879=9sys_clkout2Eti,divider-clockt9R~@p pmpu_ckEfixed-factor-clockt:7;=;arm_fckEti,divider-clockt;p $~emu_mpu_alwon_ckEfixed-factor-clockt;7b=bl3_ickEti,divider-clockt$~p @7<=<l4_ickEti,divider-clockt<R~p @7===rm_ickEti,divider-clockt=R~p @gpt10_gate_fckEti,composite-gate-clocktR p 7?=?gpt10_mux_fckEti,composite-mux-clockt>Rp @7@=@gpt10_fckEti,composite-clockt?@gpt11_gate_fckEti,composite-gate-clocktR p 7A=Agpt11_mux_fckEti,composite-mux-clockt>Rp @7B=Bgpt11_fckEti,composite-clocktABcore_96m_fckEfixed-factor-clocktC7=mmchs2_fckEti,wait-gate-clocktp R7=mmchs1_fckEti,wait-gate-clocktp R7=i2c3_fckEti,wait-gate-clocktp R7=i2c2_fckEti,wait-gate-clocktp R7=i2c1_fckEti,wait-gate-clocktp R7=mcbsp5_gate_fckEti,composite-gate-clocktR p 7=mcbsp1_gate_fckEti,composite-gate-clocktR p 7=core_48m_fckEfixed-factor-clockt.7D=Dmcspi4_fckEti,wait-gate-clocktDp R7=mcspi3_fckEti,wait-gate-clocktDp R7=mcspi2_fckEti,wait-gate-clocktDp R7=mcspi1_fckEti,wait-gate-clocktDp R7=uart2_fckEti,wait-gate-clocktDp R7=uart1_fckEti,wait-gate-clocktDp R 7=core_12m_fckEfixed-factor-clocktE7F=Fhdq_fckEti,wait-gate-clocktFp R7=core_l3_ickEfixed-factor-clockt<7G=Gsdrc_ickEti,wait-gate-clocktGp R7=gpmc_fckEfixed-factor-clocktGcore_l4_ickEfixed-factor-clockt=7H=Hmmchs2_ickEti,omap3-interface-clocktHp R7=mmchs1_ickEti,omap3-interface-clocktHp R7=hdq_ickEti,omap3-interface-clocktHp R7=mcspi4_ickEti,omap3-interface-clocktHp R7=mcspi3_ickEti,omap3-interface-clocktHp R7=mcspi2_ickEti,omap3-interface-clocktHp R7=mcspi1_ickEti,omap3-interface-clocktHp R7=i2c3_ickEti,omap3-interface-clocktHp R7=i2c2_ickEti,omap3-interface-clocktHp R7=i2c1_ickEti,omap3-interface-clocktHp R7=uart2_ickEti,omap3-interface-clocktHp R7=uart1_ickEti,omap3-interface-clocktHp R 7=gpt11_ickEti,omap3-interface-clocktHp R 7=gpt10_ickEti,omap3-interface-clocktHp R 7=mcbsp5_ickEti,omap3-interface-clocktHp R 7=mcbsp1_ickEti,omap3-interface-clocktHp R 7=omapctrl_ickEti,omap3-interface-clocktHp R7=dss_tv_fckEti,gate-clockt6pR7=dss_96m_fckEti,gate-clocktCpR7=dss2_alwon_fckEti,gate-clocktpR7=dummy_ckE fixed-clockngpt1_gate_fckEti,composite-gate-clocktRp 7I=Igpt1_mux_fckEti,composite-mux-clockt>p @7J=Jgpt1_fckEti,composite-clocktIJaes2_ickEti,omap3-interface-clocktHRp 7=wkup_32k_fckEfixed-factor-clockt>7K=Kgpio1_dbckEti,gate-clocktKp R7=sha12_ickEti,omap3-interface-clocktHp R7=wdt2_fckEti,wait-gate-clocktKp R7=wdt2_ickEti,omap3-interface-clocktLp R7=wdt1_ickEti,omap3-interface-clocktLp R7=gpio1_ickEti,omap3-interface-clocktLp R7=omap_32ksync_ickEti,omap3-interface-clocktLp R7=gpt12_ickEti,omap3-interface-clocktLp R7=gpt1_ickEti,omap3-interface-clocktLp R7=per_96m_fckEfixed-factor-clockt'7 = per_48m_fckEfixed-factor-clockt.7M=Muart3_fckEti,wait-gate-clocktMpR 7=gpt2_gate_fckEti,composite-gate-clocktRp7N=Ngpt2_mux_fckEti,composite-mux-clockt>p@7O=Ogpt2_fckEti,composite-clocktNOgpt3_gate_fckEti,composite-gate-clocktRp7P=Pgpt3_mux_fckEti,composite-mux-clockt>Rp@7Q=Qgpt3_fckEti,composite-clocktPQgpt4_gate_fckEti,composite-gate-clocktRp7R=Rgpt4_mux_fckEti,composite-mux-clockt>Rp@7S=Sgpt4_fckEti,composite-clocktRSgpt5_gate_fckEti,composite-gate-clocktRp7T=Tgpt5_mux_fckEti,composite-mux-clockt>Rp@7U=Ugpt5_fckEti,composite-clocktTUgpt6_gate_fckEti,composite-gate-clocktRp7V=Vgpt6_mux_fckEti,composite-mux-clockt>Rp@7W=Wgpt6_fckEti,composite-clocktVWgpt7_gate_fckEti,composite-gate-clocktRp7X=Xgpt7_mux_fckEti,composite-mux-clockt>Rp@7Y=Ygpt7_fckEti,composite-clocktXYgpt8_gate_fckEti,composite-gate-clocktR p7Z=Zgpt8_mux_fckEti,composite-mux-clockt>Rp@7[=[gpt8_fckEti,composite-clocktZ[gpt9_gate_fckEti,composite-gate-clocktR p7\=\gpt9_mux_fckEti,composite-mux-clockt>Rp@7]=]gpt9_fckEti,composite-clockt\]per_32k_alwon_fckEfixed-factor-clockt>7^=^gpio6_dbckEti,gate-clockt^pR7=gpio5_dbckEti,gate-clockt^pR7=gpio4_dbckEti,gate-clockt^pR7=gpio3_dbckEti,gate-clockt^pR7=gpio2_dbckEti,gate-clockt^pR 7=wdt3_fckEti,wait-gate-clockt^pR 7=per_l4_ickEfixed-factor-clockt=7_=_gpio6_ickEti,omap3-interface-clockt_pR7=gpio5_ickEti,omap3-interface-clockt_pR7=gpio4_ickEti,omap3-interface-clockt_pR7=gpio3_ickEti,omap3-interface-clockt_pR7=gpio2_ickEti,omap3-interface-clockt_pR 7=wdt3_ickEti,omap3-interface-clockt_pR 7=uart3_ickEti,omap3-interface-clockt_pR 7=uart4_ickEti,omap3-interface-clockt_pR7=gpt9_ickEti,omap3-interface-clockt_pR 7=gpt8_ickEti,omap3-interface-clockt_pR 7=gpt7_ickEti,omap3-interface-clockt_pR7=gpt6_ickEti,omap3-interface-clockt_pR7=gpt5_ickEti,omap3-interface-clockt_pR7=gpt4_ickEti,omap3-interface-clockt_pR7=gpt3_ickEti,omap3-interface-clockt_pR7=gpt2_ickEti,omap3-interface-clockt_pR7=mcbsp2_ickEti,omap3-interface-clockt_pR7=mcbsp3_ickEti,omap3-interface-clockt_pR7=mcbsp4_ickEti,omap3-interface-clockt_pR7=mcbsp2_gate_fckEti,composite-gate-clocktRp7 = mcbsp3_gate_fckEti,composite-gate-clocktRp7 = mcbsp4_gate_fckEti,composite-gate-clocktRp7=emu_src_mux_ckE ti,mux-clockt`abp@7c=cemu_src_ckEti,clkdm-gate-clocktc7d=dpclk_fckEti,divider-clocktdR~p@pclkx2_fckEti,divider-clocktdR~p@atclk_fckEti,divider-clocktdR~p@traceclk_src_fckE ti,mux-clockt`abRp@7e=etraceclk_fckEti,divider-clockteR ~p@secure_32k_fckE fixed-clockn7f=fgpt12_fckEfixed-factor-clocktfwdt1_fckEfixed-factor-clocktfsecurity_l4_ick2Efixed-factor-clockt=7g=gaes1_ickEti,omap3-interface-clocktgRp rng_ickEti,omap3-interface-clocktgp Rsha11_ickEti,omap3-interface-clocktgp Rdes1_ickEti,omap3-interface-clocktgp Rcam_mclkEti,gate-clockthRpcam_ickE!ti,omap3-no-wait-interface-clockt=pR7=csi2_96m_fckEti,gate-clocktpR7=security_l3_ickEfixed-factor-clockt<7i=ipka_ickEti,omap3-interface-clocktip Ricr_ickEti,omap3-interface-clocktHp Rdes2_ickEti,omap3-interface-clocktHp Rmspro_ickEti,omap3-interface-clocktHp Rmailboxes_ickEti,omap3-interface-clocktHp Rssi_l4_ickEfixed-factor-clockt=7p=psr1_fckEti,wait-gate-clocktp Rsr2_fckEti,wait-gate-clocktp Rsr_l4_ickEfixed-factor-clockt=dpll2_fckEti,divider-clockt$R~p@7j=jdpll2_ckEti,omap3-dpll-clocktjp$@4!)7k=kdpll2_m2_ckEti,divider-clocktk~pD7l=liva2_ckEti,wait-gate-clocktlpR7=modem_fckEti,omap3-interface-clocktp R7=sad2d_ickEti,omap3-interface-clockt<p R7=mad2d_ickEti,omap3-interface-clockt<p R7=mspro_fckEti,wait-gate-clocktp Rssi_ssr_gate_fck_3430es2E ti,composite-no-wait-gate-clocktRp 7m=mssi_ssr_div_fck_3430es2Eti,composite-divider-clocktRp @$=7n=nssi_ssr_fck_3430es2Eti,composite-clocktmn7o=ossi_sst_fck_3430es2Efixed-factor-clockto7=hsotgusb_ick_3430es2E"ti,omap3-hsotgusb-interface-clocktGp R7=ssi_ick_3430es2Eti,omap3-ssi-interface-clocktpp R7=usim_gate_fckEti,composite-gate-clocktCR p 7{={sys_d2_ckEfixed-factor-clockt7r=romap_96m_d2_fckEfixed-factor-clocktC7s=somap_96m_d4_fckEfixed-factor-clocktC7t=tomap_96m_d8_fckEfixed-factor-clocktC7u=uomap_96m_d10_fckEfixed-factor-clocktC 7v=vdpll5_m2_d4_ckEfixed-factor-clocktq7w=wdpll5_m2_d8_ckEfixed-factor-clocktq7x=xdpll5_m2_d16_ckEfixed-factor-clocktq7y=ydpll5_m2_d20_ckEfixed-factor-clocktq7z=zusim_mux_fckEti,composite-mux-clock(trstuvwxyzRp @7|=|usim_fckEti,composite-clockt{|usim_ickEti,omap3-interface-clocktLp R 7=dpll5_ckEti,omap3-dpll-clocktp  $ L 4!7}=}dpll5_m2_ckEti,divider-clockt}~p P7q=qsgx_gate_fckEti,composite-gate-clockt$Rp 7=core_d3_ckEfixed-factor-clockt$7~=~core_d4_ckEfixed-factor-clockt$7=core_d6_ckEfixed-factor-clockt$7=omap_192m_alwon_fckEfixed-factor-clockt 7=core_d2_ckEfixed-factor-clockt$7=sgx_mux_fckEti,composite-mux-clock t~(p @7=sgx_fckEti,composite-clocktsgx_ickEti,wait-gate-clockt<p R7=cpefuse_fckEti,gate-clocktp R7=ts_fckEti,gate-clockt>p R7=usbtll_fckEti,wait-gate-clocktqp R7=usbtll_ickEti,omap3-interface-clocktHp R7=mmchs3_ickEti,omap3-interface-clocktHp R7=mmchs3_fckEti,wait-gate-clocktp R7=dss1_alwon_fck_3430es2Eti,dss-gate-clocktRp7=dss_ick_3430es2Eti,omap3-dss-interface-clockt=pR7=usbhost_120m_fckEti,gate-clocktqpR7=usbhost_48m_fckEti,dss-gate-clockt.pR7=usbhost_ickEti,omap3-dss-interface-clockt=pR7=clockdomainscore_l3_clkdmti,clockdomaintdpll3_clkdmti,clockdomaintdpll1_clkdmti,clockdomaintper_clkdmti,clockdomainhtemu_clkdmti,clockdomaintddpll4_clkdmti,clockdomaintwkup_clkdmti,clockdomain$tdss_clkdmti,clockdomaintcore_l4_clkdmti,clockdomaintcam_clkdmti,clockdomaintiva2_clkdmti,clockdomaintdpll2_clkdmti,clockdomaintkd2d_clkdmti,clockdomain tdpll5_clkdmti,clockdomaint}sgx_clkdmti,clockdomaintusbhost_clkdmti,clockdomain tcounter@48320000ti,omap-counter32kpH2  counter_32kinterrupt-controller@48200000ti,omap3-intcpH 7=dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmapH` IT a`7=pbias_regulatorti,pbias-omappnpbias_mmc_omap2430upbias_mmc_omap2430w@-7=gpio@48310000ti,omap3-gpiopH1gpio1gpio@49050000ti,omap3-gpiopIgpio2gpio@49052000ti,omap3-gpiopI gpio3gpio@49054000ti,omap3-gpiopI@ gpio4gpio@49056000ti,omap3-gpiopI`!gpio5gpio@49058000ti,omap3-gpiopI"gpio6serial@4806a000ti,omap3-uartpH H_12dtxrxuart1nlserial@4806c000ti,omap3-uartpHI_34dtxrxuart2nlserial@49020000ti,omap3-uartpIJ_56dtxrxuart3nli2c@48070000 ti,omap3-i2cpH8_dtxrxi2c1n'@twl@48pH ti,twl4030defaultrtcti,twl4030-rtc bciti,twl4030-bci watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:07=regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v57=regulator-vusb1v8ti,twl4030-vusb1v87=regulator-vusb3v1ti,twl4030-vusb3v17=regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-7=gpioti,twl4030-gpiotwl4030-usbti,twl4030-usb *8FOpwmti,twl4030-pwmZpwmledti,twl4030-pwmledZpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadeumadcti,twl4030-madci2c@48072000 ti,omap3-i2cpH 9_dtxrxi2c2i2c@48060000 ti,omap3-i2cpH=_dtxrxi2c3mailbox@48094000ti,omap3-mailboxmailboxpH @dsp  spi@48098000ti,omap2-mcspipH Amcspi1@_#$%&'()* dtx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspipH Bmcspi2 _+,-.dtx0rx0tx1rx1spi@480b8000ti,omap2-mcspipH [mcspi3 _dtx0rx0tx1rx1spi@480ba000ti,omap2-mcspipH 0mcspi4_FGdtx0rx01w@480b2000 ti,omap3-1wpH :hdq1wmmc@4809c000ti,omap3-hsmmcpH Smmc1_=>dtxrx$mmc@480b4000ti,omap3-hsmmcpH @Vmmc2_/0dtxrx .disabledmmc@480ad000ti,omap3-hsmmcpH ^mmc3_MNdtxrx .disabledmmu@480bd4005ti,omap2-iommupH mmu_ispB7=mmu@5d0000005ti,omap2-iommup]mmu_iva .disabledwdt@48314000 ti,omap3-wdtpH1@ wd_timer2mcbsp@48074000ti,omap3-mcbsppH@Rmpu ;< \commontxrxlmcbsp1_ dtxrx .disabledmcbsp@49022000ti,omap3-mcbsppI I Rmpusidetone>?\commontxrxsidetonelmcbsp2mcbsp2_sidetone_!"dtxrx .disabledmcbsp@49024000ti,omap3-mcbsppI@I RmpusidetoneYZ\commontxrxsidetonelmcbsp3mcbsp3_sidetone_dtxrx .disabledmcbsp@49026000ti,omap3-mcbsppI`Rmpu 67 \commontxrxlmcbsp4_dtxrx .disabledmcbsp@48096000ti,omap3-mcbsppH `Rmpu QR \commontxrxlmcbsp5_dtxrx .disabledsham@480c3000ti,omap3-shamshampH 0d1_Edrxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corepH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivapH timer@48318000ti,omap3430-timerpH1%timer1{timer@49032000ti,omap3430-timerpI &timer2timer@49034000ti,omap3430-timerpI@'timer3timer@49036000ti,omap3430-timerpI`(timer4timer@49038000ti,omap3430-timerpI)timer5timer@4903a000ti,omap3430-timerpI*timer6timer@4903c000ti,omap3430-timerpI+timer7timer@4903e000ti,omap3430-timerpI,timer8timer@49040000ti,omap3430-timerpI-timer9timer@48086000ti,omap3430-timerpH`.timer10timer@48088000ti,omap3430-timerpH/timer11timer@48304000ti,omap3430-timerpH0@_timer12{usbhstll@48062000 ti,usbhs-tllpH N usb_tll_hsusbhshost@48064000ti,usbhs-hostpH@ usb_host_hsohci@48064400ti,ohci-omap3pHD&Lehci@48064800 ti,ehci-omappHH&Mgpmc@6e000000ti,omap3430-gpmcgpmcpn0( nor@0,0 cfi-flashintel,pf48f6000m0y1be p 0 ?0R0e6s6r Z3E_partition@0ybootloader-norppartition@40000 yparams-norppartition@80000 ykernel-norp partition@280000yfilesystem-norp$nand@1,0micron,mt29f1g08abb psw $$0?R$es0HH63partition@0 yxloader-nandppartition@80000ybootloader-nandppartition@1c0000 yparams-nandp partition@280000 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#address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandle#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requestssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthstatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinslinux,mtd-namebank-widthgpmc,mux-add-datagpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenlabelti,nand-ecc-optnand-bus-widthgpmc,device-widthmultipointnum-epsram-bitsiommusti,phy-type