8( -compulab,omap3-cm-t3730ti,omap36xxti,omap3&7CompuLab CM-T3730chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@49042000memorylmemoryxcpuscpu@0arm,cortex-a8lcpux|cpus 'O 57pmuarm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocpti,omap3-l3-smxsimple-busxh l3_mainl4@48000000ti,omap3-l4-coresimple-bus Hscm@2000ti,omap3-scmsimple-busx  pinmux@30 ti,omap3-padconfpinctrl-singlex08pinmux_uart3_pins7npKQpinmux_mmc1_pins07KQpinmux_green_led_pins7KQpinmux_dss_dpi_pins_common7KQpinmux_dss_dpi_pins_cm_t35x07pinmux_ads7846_pins7KQpinmux_mcspi1_pins 7KQpinmux_i2c1_pins7KQpinmux_mcbsp2_pins 7 KQpinmux_smsc1_pins7jKQpinmux_hsusb0_pins`7rtvxz|~KQpinmux_twl4030_pins7AKQpinmux_mmc2_pins07(*,.02KQpinmux_wl12xx_gpio74K Q scm_conf@270sysconxp0KQclocksmcbsp5_mux_fckYti,composite-mux-clock|fxhKQmcbsp5_fckYti,composite-clock|mcbsp1_mux_fckYti,composite-mux-clock|fxK Q mcbsp1_fckYti,composite-clock| mcbsp2_mux_fckYti,composite-mux-clock| fxK Q mcbsp2_fckYti,composite-clock| mcbsp3_mux_fckYti,composite-mux-clock| xhKQmcbsp3_fckYti,composite-clock| mcbsp4_mux_fckYti,composite-mux-clock| fxhKQmcbsp4_fckYti,composite-clock|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \pinmux_twl4030_vpins 7KQpinmux_dss_dpi_pins_cm_t373007 KQaes@480c5000 ti,omap3-aesaesxH PPsABxtxrxprm@48306000 ti,omap3-prmxH0`@ clocksvirt_16_8m_ckY fixed-clockYKQosc_sys_ckY ti,mux-clock|x @KQsys_ckYti,divider-clock|fxpKQsys_clkout1Yti,gate-clock|x pfdpll3_x2_ckYfixed-factor-clock|dpll3_m2x2_ckYfixed-factor-clock|KQdpll4_x2_ckYfixed-factor-clock|corex2_fckYfixed-factor-clock|KQwkup_l4_ickYfixed-factor-clock|KMQMcorex2_d3_fckYfixed-factor-clock|KQcorex2_d5_fckYfixed-factor-clock|KQclockdomainscm@48004000 ti,omap3-cmxH@@clocksdummy_apb_pclkY fixed-clockomap_32k_fckY fixed-clockK?Q?virt_12m_ckY fixed-clockKQvirt_13m_ckY fixed-clock]@KQvirt_19200000_ckY fixed-clock$KQvirt_26000000_ckY fixed-clockKQvirt_38_4m_ckY fixed-clockIKQdpll4_ckYti,omap3-dpll-per-j-type-clock|x D 0KQdpll4_m2_ckYti,divider-clock|?x HKQdpll4_m2x2_mul_ckYfixed-factor-clock|K Q dpll4_m2x2_ckYti,hsdiv-gate-clock| fx K!Q!omap_96m_alwon_fckYfixed-factor-clock|!K(Q(dpll3_ckYti,omap3-dpll-core-clock|x @ 0KQdpll3_m3_ckYti,divider-clock|fx@K"Q"dpll3_m3x2_mul_ckYfixed-factor-clock|"K#Q#dpll3_m3x2_ckYti,hsdiv-gate-clock|#f x K$Q$emu_core_alwon_ckYfixed-factor-clock|$KaQasys_altclkY fixed-clockK-Q-mcbsp_clksY fixed-clockKQdpll3_m2_ckYti,divider-clock|fx @KQcore_ckYfixed-factor-clock|K%Q%dpll1_fckYti,divider-clock|%fx @K&Q&dpll1_ckYti,omap3-dpll-clock|&x  $ @ 4KQdpll1_x2_ckYfixed-factor-clock|K'Q'dpll1_x2m2_ckYti,divider-clock|'x DK;Q;cm_96m_fckYfixed-factor-clock|(K)Q)omap_96m_fckY ti,mux-clock|)fx @KDQDdpll4_m3_ckYti,divider-clock|f x@K*Q*dpll4_m3x2_mul_ckYfixed-factor-clock|*K+Q+dpll4_m3x2_ckYti,hsdiv-gate-clock|+fx K,Q,omap_54m_fckY ti,mux-clock|,-fx @K7Q7cm_96m_d2_fckYfixed-factor-clock|)K.Q.omap_48m_fckY ti,mux-clock|.-fx @K/Q/omap_12m_fckYfixed-factor-clock|/KFQFdpll4_m4_ckYti,divider-clock| x@K0Q0dpll4_m4x2_mul_ckYti,fixed-factor-clock|0K1Q1dpll4_m4x2_ckYti,gate-clock|1fx KQdpll4_m5_ckYti,divider-clock|?x@K2Q2dpll4_m5x2_mul_ckYti,fixed-factor-clock|2K3Q3dpll4_m5x2_ckYti,hsdiv-gate-clock|3fx KiQidpll4_m6_ckYti,divider-clock|f?x@K4Q4dpll4_m6x2_mul_ckYfixed-factor-clock|4K5Q5dpll4_m6x2_ckYti,hsdiv-gate-clock|5fx K6Q6emu_per_alwon_ckYfixed-factor-clock|6KbQbclkout2_src_gate_ckY ti,composite-no-wait-gate-clock|%fx pK8Q8clkout2_src_mux_ckYti,composite-mux-clock|%)7x pK9Q9clkout2_src_ckYti,composite-clock|89K:Q:sys_clkout2Yti,divider-clock|:f@x p mpu_ckYfixed-factor-clock|;K<Q<arm_fckYti,divider-clock|<x $emu_mpu_alwon_ckYfixed-factor-clock|<KcQcl3_ickYti,divider-clock|%x @K=Q=l4_ickYti,divider-clock|=fx @K>Q>rm_ickYti,divider-clock|>fx @gpt10_gate_fckYti,composite-gate-clock|f x K@Q@gpt10_mux_fckYti,composite-mux-clock|?fx @KAQAgpt10_fckYti,composite-clock|@Agpt11_gate_fckYti,composite-gate-clock|f x KBQBgpt11_mux_fckYti,composite-mux-clock|?fx @KCQCgpt11_fckYti,composite-clock|BCcore_96m_fckYfixed-factor-clock|DKQmmchs2_fckYti,wait-gate-clock|x fKQmmchs1_fckYti,wait-gate-clock|x fKQi2c3_fckYti,wait-gate-clock|x fKQi2c2_fckYti,wait-gate-clock|x fKQi2c1_fckYti,wait-gate-clock|x fKQmcbsp5_gate_fckYti,composite-gate-clock|f x KQmcbsp1_gate_fckYti,composite-gate-clock|f x KQcore_48m_fckYfixed-factor-clock|/KEQEmcspi4_fckYti,wait-gate-clock|Ex fKQmcspi3_fckYti,wait-gate-clock|Ex fKQmcspi2_fckYti,wait-gate-clock|Ex fKQmcspi1_fckYti,wait-gate-clock|Ex fKQuart2_fckYti,wait-gate-clock|Ex fKQuart1_fckYti,wait-gate-clock|Ex f KQcore_12m_fckYfixed-factor-clock|FKGQGhdq_fckYti,wait-gate-clock|Gx fKQcore_l3_ickYfixed-factor-clock|=KHQHsdrc_ickYti,wait-gate-clock|Hx fKQgpmc_fckYfixed-factor-clock|Hcore_l4_ickYfixed-factor-clock|>KIQImmchs2_ickYti,omap3-interface-clock|Ix fKQmmchs1_ickYti,omap3-interface-clock|Ix fKQhdq_ickYti,omap3-interface-clock|Ix fKQmcspi4_ickYti,omap3-interface-clock|Ix fKQmcspi3_ickYti,omap3-interface-clock|Ix fKQmcspi2_ickYti,omap3-interface-clock|Ix fKQmcspi1_ickYti,omap3-interface-clock|Ix fKQi2c3_ickYti,omap3-interface-clock|Ix fKQi2c2_ickYti,omap3-interface-clock|Ix fKQi2c1_ickYti,omap3-interface-clock|Ix fKQuart2_ickYti,omap3-interface-clock|Ix fKQuart1_ickYti,omap3-interface-clock|Ix f KQgpt11_ickYti,omap3-interface-clock|Ix f KQgpt10_ickYti,omap3-interface-clock|Ix f KQmcbsp5_ickYti,omap3-interface-clock|Ix f KQmcbsp1_ickYti,omap3-interface-clock|Ix f KQomapctrl_ickYti,omap3-interface-clock|Ix fKQdss_tv_fckYti,gate-clock|7xfKQdss_96m_fckYti,gate-clock|DxfKQdss2_alwon_fckYti,gate-clock|xfKQdummy_ckY fixed-clockgpt1_gate_fckYti,composite-gate-clock|fx KJQJgpt1_mux_fckYti,composite-mux-clock|?x @KKQKgpt1_fckYti,composite-clock|JKaes2_ickYti,omap3-interface-clock|Ifx KQwkup_32k_fckYfixed-factor-clock|?KLQLgpio1_dbckYti,gate-clock|Lx fKQsha12_ickYti,omap3-interface-clock|Ix fKQwdt2_fckYti,wait-gate-clock|Lx fKQwdt2_ickYti,omap3-interface-clock|Mx fKQwdt1_ickYti,omap3-interface-clock|Mx fKQgpio1_ickYti,omap3-interface-clock|Mx fKQomap_32ksync_ickYti,omap3-interface-clock|Mx fKQgpt12_ickYti,omap3-interface-clock|Mx fKQgpt1_ickYti,omap3-interface-clock|Mx fKQper_96m_fckYfixed-factor-clock|(K Q per_48m_fckYfixed-factor-clock|/KNQNuart3_fckYti,wait-gate-clock|Nxf KQgpt2_gate_fckYti,composite-gate-clock|fxKOQOgpt2_mux_fckYti,composite-mux-clock|?x@KPQPgpt2_fckYti,composite-clock|OPgpt3_gate_fckYti,composite-gate-clock|fxKQQQgpt3_mux_fckYti,composite-mux-clock|?fx@KRQRgpt3_fckYti,composite-clock|QRgpt4_gate_fckYti,composite-gate-clock|fxKSQSgpt4_mux_fckYti,composite-mux-clock|?fx@KTQTgpt4_fckYti,composite-clock|STgpt5_gate_fckYti,composite-gate-clock|fxKUQUgpt5_mux_fckYti,composite-mux-clock|?fx@KVQVgpt5_fckYti,composite-clock|UVgpt6_gate_fckYti,composite-gate-clock|fxKWQWgpt6_mux_fckYti,composite-mux-clock|?fx@KXQXgpt6_fckYti,composite-clock|WXgpt7_gate_fckYti,composite-gate-clock|fxKYQYgpt7_mux_fckYti,composite-mux-clock|?fx@KZQZgpt7_fckYti,composite-clock|YZgpt8_gate_fckYti,composite-gate-clock|f xK[Q[gpt8_mux_fckYti,composite-mux-clock|?fx@K\Q\gpt8_fckYti,composite-clock|[\gpt9_gate_fckYti,composite-gate-clock|f xK]Q]gpt9_mux_fckYti,composite-mux-clock|?fx@K^Q^gpt9_fckYti,composite-clock|]^per_32k_alwon_fckYfixed-factor-clock|?K_Q_gpio6_dbckYti,gate-clock|_xfKQgpio5_dbckYti,gate-clock|_xfKQgpio4_dbckYti,gate-clock|_xfKQgpio3_dbckYti,gate-clock|_xfKQgpio2_dbckYti,gate-clock|_xf KQwdt3_fckYti,wait-gate-clock|_xf KQper_l4_ickYfixed-factor-clock|>K`Q`gpio6_ickYti,omap3-interface-clock|`xfKQgpio5_ickYti,omap3-interface-clock|`xfKQgpio4_ickYti,omap3-interface-clock|`xfKQgpio3_ickYti,omap3-interface-clock|`xfKQgpio2_ickYti,omap3-interface-clock|`xf KQwdt3_ickYti,omap3-interface-clock|`xf KQuart3_ickYti,omap3-interface-clock|`xf KQuart4_ickYti,omap3-interface-clock|`xfKQgpt9_ickYti,omap3-interface-clock|`xf KQgpt8_ickYti,omap3-interface-clock|`xf KQgpt7_ickYti,omap3-interface-clock|`xfKQgpt6_ickYti,omap3-interface-clock|`xfKQgpt5_ickYti,omap3-interface-clock|`xfKQgpt4_ickYti,omap3-interface-clock|`xfKQgpt3_ickYti,omap3-interface-clock|`xfKQgpt2_ickYti,omap3-interface-clock|`xfKQmcbsp2_ickYti,omap3-interface-clock|`xfKQmcbsp3_ickYti,omap3-interface-clock|`xfKQmcbsp4_ickYti,omap3-interface-clock|`xfKQmcbsp2_gate_fckYti,composite-gate-clock|fxK Q mcbsp3_gate_fckYti,composite-gate-clock|fxK Q mcbsp4_gate_fckYti,composite-gate-clock|fxKQemu_src_mux_ckY ti,mux-clock|abcx@KdQdemu_src_ckYti,clkdm-gate-clock|dKeQepclk_fckYti,divider-clock|efx@pclkx2_fckYti,divider-clock|efx@atclk_fckYti,divider-clock|efx@traceclk_src_fckY ti,mux-clock|abcfx@KfQftraceclk_fckYti,divider-clock|ff x@secure_32k_fckY fixed-clockKgQggpt12_fckYfixed-factor-clock|gwdt1_fckYfixed-factor-clock|gsecurity_l4_ick2Yfixed-factor-clock|>KhQhaes1_ickYti,omap3-interface-clock|hfx rng_ickYti,omap3-interface-clock|hx fsha11_ickYti,omap3-interface-clock|hx fdes1_ickYti,omap3-interface-clock|hx fcam_mclkYti,gate-clock|ifxcam_ickY!ti,omap3-no-wait-interface-clock|>xfKQcsi2_96m_fckYti,gate-clock|xfKQsecurity_l3_ickYfixed-factor-clock|=KjQjpka_ickYti,omap3-interface-clock|jx ficr_ickYti,omap3-interface-clock|Ix fdes2_ickYti,omap3-interface-clock|Ix fmspro_ickYti,omap3-interface-clock|Ix fmailboxes_ickYti,omap3-interface-clock|Ix fssi_l4_ickYfixed-factor-clock|>KqQqsr1_fckYti,wait-gate-clock|x fsr2_fckYti,wait-gate-clock|x fsr_l4_ickYfixed-factor-clock|>dpll2_fckYti,divider-clock|%fx@KkQkdpll2_ckYti,omap3-dpll-clock|kx$@4#5=KlQldpll2_m2_ckYti,divider-clock|lxDKmQmiva2_ckYti,wait-gate-clock|mxfKQmodem_fckYti,omap3-interface-clock|x fKQsad2d_ickYti,omap3-interface-clock|=x fKQmad2d_ickYti,omap3-interface-clock|=x fKQmspro_fckYti,wait-gate-clock|x fssi_ssr_gate_fck_3430es2Y ti,composite-no-wait-gate-clock|fx KnQnssi_ssr_div_fck_3430es2Yti,composite-divider-clock|fx @$QKoQossi_ssr_fck_3430es2Yti,composite-clock|noKpQpssi_sst_fck_3430es2Yfixed-factor-clock|pKQhsotgusb_ick_3430es2Y"ti,omap3-hsotgusb-interface-clock|Hx fKQssi_ick_3430es2Yti,omap3-ssi-interface-clock|qx fKQusim_gate_fckYti,composite-gate-clock|Df x K|Q|sys_d2_ckYfixed-factor-clock|KsQsomap_96m_d2_fckYfixed-factor-clock|DKtQtomap_96m_d4_fckYfixed-factor-clock|DKuQuomap_96m_d8_fckYfixed-factor-clock|DKvQvomap_96m_d10_fckYfixed-factor-clock|D KwQwdpll5_m2_d4_ckYfixed-factor-clock|rKxQxdpll5_m2_d8_ckYfixed-factor-clock|rKyQydpll5_m2_d16_ckYfixed-factor-clock|rKzQzdpll5_m2_d20_ckYfixed-factor-clock|rK{Q{usim_mux_fckYti,composite-mux-clock(|stuvwxyz{fx @K}Q}usim_fckYti,composite-clock||}usim_ickYti,omap3-interface-clock|Mx f KQdpll5_ckYti,omap3-dpll-clock|x  $ L 4#5K~Q~dpll5_m2_ckYti,divider-clock|~x PKrQrsgx_gate_fckYti,composite-gate-clock|%fx KQcore_d3_ckYfixed-factor-clock|%KQcore_d4_ckYfixed-factor-clock|%KQcore_d6_ckYfixed-factor-clock|%KQomap_192m_alwon_fckYfixed-factor-clock|!KQcore_d2_ckYfixed-factor-clock|%KQsgx_mux_fckYti,composite-mux-clock |)x @KQsgx_fckYti,composite-clock|sgx_ickYti,wait-gate-clock|=x fKQcpefuse_fckYti,gate-clock|x fKQts_fckYti,gate-clock|?x fKQusbtll_fckYti,wait-gate-clock|rx fKQusbtll_ickYti,omap3-interface-clock|Ix fKQmmchs3_ickYti,omap3-interface-clock|Ix fKQmmchs3_fckYti,wait-gate-clock|x fKQdss1_alwon_fck_3430es2Yti,dss-gate-clock|fxKQdss_ick_3430es2Yti,omap3-dss-interface-clock|>xfKQusbhost_120m_fckYti,gate-clock|rxfKQusbhost_48m_fckYti,dss-gate-clock|/xfKQusbhost_ickYti,omap3-dss-interface-clock|>xfKQuart4_fckYti,wait-gate-clock|NxfKQclockdomainscore_l3_clkdmti,clockdomain|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|emu_clkdmti,clockdomain|edpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain$|dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|cam_clkdmti,clockdomain|iva2_clkdmti,clockdomain|dpll2_clkdmti,clockdomain|ld2d_clkdmti,clockdomain |dpll5_clkdmti,clockdomain|~sgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |counter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH KQdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH` ]h 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#address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandle#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requestssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0pagesizebci3v1-supplyti,use-ledsti,pullupsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-replinux,wakeupti,dual-voltpbias-supplybus-widthvmmc-supplyvmmc_aux-supplynon-removablecap-power-off-cardref-clock-frequencystatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channels#address-cellti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-typegpioslinux,default-triggerstartup-delay-usreset-gpiosti,modelti,mcbspregulator-always-onenable-active-highvin-supply