;8(d*logicpd,dm3730-torpedo-devkitti,omap36xx&,7LogicPD Zoom DM3730 Torpedo Development Kitchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@49042000memorylmemoryxcpuscpu@0arm,cortex-a8lcpux|cpus 'O 57pmuarm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocpti,omap3-l3-smxsimple-busxh l3_mainl4@48000000ti,omap3-l4-coresimple-bus Hscm@2000ti,omap3-scmsimple-busx  pinmux@30 ti,omap3-padconfpinctrl-singlex087=pinmux_mm3_pins0E468:T^7=pinmux_twl4030_pinsEA7=pinmux_gpio_key_pinsE7=pinmux_led_pinsE7=pinmux_mmc1_pins0E7=scm_conf@270sysconxp07=clocksmcbsp5_mux_fckYti,composite-mux-clock|fxh7=mcbsp5_fckYti,composite-clock|mcbsp1_mux_fckYti,composite-mux-clock|fx7 = mcbsp1_fckYti,composite-clock| mcbsp2_mux_fckYti,composite-mux-clock| fx7 = mcbsp2_fckYti,composite-clock| mcbsp3_mux_fckYti,composite-mux-clock| xh7=mcbsp3_fckYti,composite-clock| mcbsp4_mux_fckYti,composite-mux-clock| fxh7=mcbsp4_fckYti,composite-clock|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \pinmux_twl4030_vpins E7=pinmux_gpio_key_pins_wkupE 7=pinmux_lan9221_pinsEZ7=pinmux_mmc1_cdET7=aes@480c5000 ti,omap3-aesaesxH PPsABxtxrxprm@48306000 ti,omap3-prmxH0`@ clocksvirt_16_8m_ckY fixed-clockY7=osc_sys_ckY ti,mux-clock|x @7=sys_ckYti,divider-clock|fxp7=sys_clkout1Yti,gate-clock|x pfdpll3_x2_ckYfixed-factor-clock|dpll3_m2x2_ckYfixed-factor-clock|7=dpll4_x2_ckYfixed-factor-clock|corex2_fckYfixed-factor-clock|7=wkup_l4_ickYfixed-factor-clock|7M=Mcorex2_d3_fckYfixed-factor-clock|7=corex2_d5_fckYfixed-factor-clock|7=clockdomainscm@48004000 ti,omap3-cmxH@@clocksdummy_apb_pclkY fixed-clockomap_32k_fckY fixed-clock7?=?virt_12m_ckY fixed-clock7=virt_13m_ckY fixed-clock]@7=virt_19200000_ckY fixed-clock$7=virt_26000000_ckY fixed-clock7=virt_38_4m_ckY fixed-clockI7=dpll4_ckYti,omap3-dpll-per-j-type-clock|x D 07=dpll4_m2_ckYti,divider-clock|?x H7=dpll4_m2x2_mul_ckYfixed-factor-clock|7 = dpll4_m2x2_ckYti,hsdiv-gate-clock| fx 7!=!omap_96m_alwon_fckYfixed-factor-clock|!7(=(dpll3_ckYti,omap3-dpll-core-clock|x @ 07=dpll3_m3_ckYti,divider-clock|fx@7"="dpll3_m3x2_mul_ckYfixed-factor-clock|"7#=#dpll3_m3x2_ckYti,hsdiv-gate-clock|#f x 7$=$emu_core_alwon_ckYfixed-factor-clock|$7a=asys_altclkY fixed-clock7-=-mcbsp_clksY fixed-clock7=dpll3_m2_ckYti,divider-clock|fx @7=core_ckYfixed-factor-clock|7%=%dpll1_fckYti,divider-clock|%fx @7&=&dpll1_ckYti,omap3-dpll-clock|&x  $ @ 47=dpll1_x2_ckYfixed-factor-clock|7'='dpll1_x2m2_ckYti,divider-clock|'x D7;=;cm_96m_fckYfixed-factor-clock|(7)=)omap_96m_fckY ti,mux-clock|)fx @7D=Ddpll4_m3_ckYti,divider-clock|f x@7*=*dpll4_m3x2_mul_ckYfixed-factor-clock|*7+=+dpll4_m3x2_ckYti,hsdiv-gate-clock|+fx 7,=,omap_54m_fckY ti,mux-clock|,-fx @77=7cm_96m_d2_fckYfixed-factor-clock|)7.=.omap_48m_fckY ti,mux-clock|.-fx @7/=/omap_12m_fckYfixed-factor-clock|/7F=Fdpll4_m4_ckYti,divider-clock| x@70=0dpll4_m4x2_mul_ckYti,fixed-factor-clock|071=1dpll4_m4x2_ckYti,gate-clock|1fx 7=dpll4_m5_ckYti,divider-clock|?x@72=2dpll4_m5x2_mul_ckYti,fixed-factor-clock|273=3dpll4_m5x2_ckYti,hsdiv-gate-clock|3fx 7i=idpll4_m6_ckYti,divider-clock|f?x@74=4dpll4_m6x2_mul_ckYfixed-factor-clock|475=5dpll4_m6x2_ckYti,hsdiv-gate-clock|5fx 76=6emu_per_alwon_ckYfixed-factor-clock|67b=bclkout2_src_gate_ckY ti,composite-no-wait-gate-clock|%fx p78=8clkout2_src_mux_ckYti,composite-mux-clock|%)7x p79=9clkout2_src_ckYti,composite-clock|897:=:sys_clkout2Yti,divider-clock|:f@x p mpu_ckYfixed-factor-clock|;7<=<arm_fckYti,divider-clock|<x $emu_mpu_alwon_ckYfixed-factor-clock|<7c=cl3_ickYti,divider-clock|%x @7===l4_ickYti,divider-clock|=fx @7>=>rm_ickYti,divider-clock|>fx @gpt10_gate_fckYti,composite-gate-clock|f x 7@=@gpt10_mux_fckYti,composite-mux-clock|?fx @7A=Agpt10_fckYti,composite-clock|@Agpt11_gate_fckYti,composite-gate-clock|f x 7B=Bgpt11_mux_fckYti,composite-mux-clock|?fx @7C=Cgpt11_fckYti,composite-clock|BCcore_96m_fckYfixed-factor-clock|D7=mmchs2_fckYti,wait-gate-clock|x f7=mmchs1_fckYti,wait-gate-clock|x f7=i2c3_fckYti,wait-gate-clock|x f7=i2c2_fckYti,wait-gate-clock|x f7=i2c1_fckYti,wait-gate-clock|x f7=mcbsp5_gate_fckYti,composite-gate-clock|f x 7=mcbsp1_gate_fckYti,composite-gate-clock|f x 7=core_48m_fckYfixed-factor-clock|/7E=Emcspi4_fckYti,wait-gate-clock|Ex f7=mcspi3_fckYti,wait-gate-clock|Ex f7=mcspi2_fckYti,wait-gate-clock|Ex f7=mcspi1_fckYti,wait-gate-clock|Ex f7=uart2_fckYti,wait-gate-clock|Ex f7=uart1_fckYti,wait-gate-clock|Ex f 7=core_12m_fckYfixed-factor-clock|F7G=Ghdq_fckYti,wait-gate-clock|Gx f7=core_l3_ickYfixed-factor-clock|=7H=Hsdrc_ickYti,wait-gate-clock|Hx f7=gpmc_fckYfixed-factor-clock|Hcore_l4_ickYfixed-factor-clock|>7I=Immchs2_ickYti,omap3-interface-clock|Ix f7=mmchs1_ickYti,omap3-interface-clock|Ix f7=hdq_ickYti,omap3-interface-clock|Ix f7=mcspi4_ickYti,omap3-interface-clock|Ix f7=mcspi3_ickYti,omap3-interface-clock|Ix f7=mcspi2_ickYti,omap3-interface-clock|Ix f7=mcspi1_ickYti,omap3-interface-clock|Ix f7=i2c3_ickYti,omap3-interface-clock|Ix f7=i2c2_ickYti,omap3-interface-clock|Ix f7=i2c1_ickYti,omap3-interface-clock|Ix f7=uart2_ickYti,omap3-interface-clock|Ix f7=uart1_ickYti,omap3-interface-clock|Ix f 7=gpt11_ickYti,omap3-interface-clock|Ix f 7=gpt10_ickYti,omap3-interface-clock|Ix f 7=mcbsp5_ickYti,omap3-interface-clock|Ix f 7=mcbsp1_ickYti,omap3-interface-clock|Ix f 7=omapctrl_ickYti,omap3-interface-clock|Ix f7=dss_tv_fckYti,gate-clock|7xf7=dss_96m_fckYti,gate-clock|Dxf7=dss2_alwon_fckYti,gate-clock|xf7=dummy_ckY fixed-clockgpt1_gate_fckYti,composite-gate-clock|fx 7J=Jgpt1_mux_fckYti,composite-mux-clock|?x @7K=Kgpt1_fckYti,composite-clock|JKaes2_ickYti,omap3-interface-clock|Ifx 7=wkup_32k_fckYfixed-factor-clock|?7L=Lgpio1_dbckYti,gate-clock|Lx f7=sha12_ickYti,omap3-interface-clock|Ix f7=wdt2_fckYti,wait-gate-clock|Lx f7=wdt2_ickYti,omap3-interface-clock|Mx f7=wdt1_ickYti,omap3-interface-clock|Mx f7=gpio1_ickYti,omap3-interface-clock|Mx f7=omap_32ksync_ickYti,omap3-interface-clock|Mx f7=gpt12_ickYti,omap3-interface-clock|Mx f7=gpt1_ickYti,omap3-interface-clock|Mx f7=per_96m_fckYfixed-factor-clock|(7 = per_48m_fckYfixed-factor-clock|/7N=Nuart3_fckYti,wait-gate-clock|Nxf 7=gpt2_gate_fckYti,composite-gate-clock|fx7O=Ogpt2_mux_fckYti,composite-mux-clock|?x@7P=Pgpt2_fckYti,composite-clock|OPgpt3_gate_fckYti,composite-gate-clock|fx7Q=Qgpt3_mux_fckYti,composite-mux-clock|?fx@7R=Rgpt3_fckYti,composite-clock|QRgpt4_gate_fckYti,composite-gate-clock|fx7S=Sgpt4_mux_fckYti,composite-mux-clock|?fx@7T=Tgpt4_fckYti,composite-clock|STgpt5_gate_fckYti,composite-gate-clock|fx7U=Ugpt5_mux_fckYti,composite-mux-clock|?fx@7V=Vgpt5_fckYti,composite-clock|UVgpt6_gate_fckYti,composite-gate-clock|fx7W=Wgpt6_mux_fckYti,composite-mux-clock|?fx@7X=Xgpt6_fckYti,composite-clock|WXgpt7_gate_fckYti,composite-gate-clock|fx7Y=Ygpt7_mux_fckYti,composite-mux-clock|?fx@7Z=Zgpt7_fckYti,composite-clock|YZgpt8_gate_fckYti,composite-gate-clock|f x7[=[gpt8_mux_fckYti,composite-mux-clock|?fx@7\=\gpt8_fckYti,composite-clock|[\gpt9_gate_fckYti,composite-gate-clock|f x7]=]gpt9_mux_fckYti,composite-mux-clock|?fx@7^=^gpt9_fckYti,composite-clock|]^per_32k_alwon_fckYfixed-factor-clock|?7_=_gpio6_dbckYti,gate-clock|_xf7=gpio5_dbckYti,gate-clock|_xf7=gpio4_dbckYti,gate-clock|_xf7=gpio3_dbckYti,gate-clock|_xf7=gpio2_dbckYti,gate-clock|_xf 7=wdt3_fckYti,wait-gate-clock|_xf 7=per_l4_ickYfixed-factor-clock|>7`=`gpio6_ickYti,omap3-interface-clock|`xf7=gpio5_ickYti,omap3-interface-clock|`xf7=gpio4_ickYti,omap3-interface-clock|`xf7=gpio3_ickYti,omap3-interface-clock|`xf7=gpio2_ickYti,omap3-interface-clock|`xf 7=wdt3_ickYti,omap3-interface-clock|`xf 7=uart3_ickYti,omap3-interface-clock|`xf 7=uart4_ickYti,omap3-interface-clock|`xf7=gpt9_ickYti,omap3-interface-clock|`xf 7=gpt8_ickYti,omap3-interface-clock|`xf 7=gpt7_ickYti,omap3-interface-clock|`xf7=gpt6_ickYti,omap3-interface-clock|`xf7=gpt5_ickYti,omap3-interface-clock|`xf7=gpt4_ickYti,omap3-interface-clock|`xf7=gpt3_ickYti,omap3-interface-clock|`xf7=gpt2_ickYti,omap3-interface-clock|`xf7=mcbsp2_ickYti,omap3-interface-clock|`xf7=mcbsp3_ickYti,omap3-interface-clock|`xf7=mcbsp4_ickYti,omap3-interface-clock|`xf7=mcbsp2_gate_fckYti,composite-gate-clock|fx7 = mcbsp3_gate_fckYti,composite-gate-clock|fx7 = mcbsp4_gate_fckYti,composite-gate-clock|fx7=emu_src_mux_ckY ti,mux-clock|abcx@7d=demu_src_ckYti,clkdm-gate-clock|d7e=epclk_fckYti,divider-clock|efx@pclkx2_fckYti,divider-clock|efx@atclk_fckYti,divider-clock|efx@traceclk_src_fckY ti,mux-clock|abcfx@7f=ftraceclk_fckYti,divider-clock|ff x@secure_32k_fckY fixed-clock7g=ggpt12_fckYfixed-factor-clock|gwdt1_fckYfixed-factor-clock|gsecurity_l4_ick2Yfixed-factor-clock|>7h=haes1_ickYti,omap3-interface-clock|hfx rng_ickYti,omap3-interface-clock|hx fsha11_ickYti,omap3-interface-clock|hx fdes1_ickYti,omap3-interface-clock|hx fcam_mclkYti,gate-clock|ifxcam_ickY!ti,omap3-no-wait-interface-clock|>xf7=csi2_96m_fckYti,gate-clock|xf7=security_l3_ickYfixed-factor-clock|=7j=jpka_ickYti,omap3-interface-clock|jx ficr_ickYti,omap3-interface-clock|Ix fdes2_ickYti,omap3-interface-clock|Ix fmspro_ickYti,omap3-interface-clock|Ix fmailboxes_ickYti,omap3-interface-clock|Ix fssi_l4_ickYfixed-factor-clock|>7q=qsr1_fckYti,wait-gate-clock|x fsr2_fckYti,wait-gate-clock|x fsr_l4_ickYfixed-factor-clock|>dpll2_fckYti,divider-clock|%fx@7k=kdpll2_ckYti,omap3-dpll-clock|kx$@4#5=7l=ldpll2_m2_ckYti,divider-clock|lxD7m=miva2_ckYti,wait-gate-clock|mxf7=modem_fckYti,omap3-interface-clock|x f7=sad2d_ickYti,omap3-interface-clock|=x f7=mad2d_ickYti,omap3-interface-clock|=x f7=mspro_fckYti,wait-gate-clock|x fssi_ssr_gate_fck_3430es2Y ti,composite-no-wait-gate-clock|fx 7n=nssi_ssr_div_fck_3430es2Yti,composite-divider-clock|fx @$Q7o=ossi_ssr_fck_3430es2Yti,composite-clock|no7p=pssi_sst_fck_3430es2Yfixed-factor-clock|p7=hsotgusb_ick_3430es2Y"ti,omap3-hsotgusb-interface-clock|Hx f7=ssi_ick_3430es2Yti,omap3-ssi-interface-clock|qx f7=usim_gate_fckYti,composite-gate-clock|Df x 7|=|sys_d2_ckYfixed-factor-clock|7s=somap_96m_d2_fckYfixed-factor-clock|D7t=tomap_96m_d4_fckYfixed-factor-clock|D7u=uomap_96m_d8_fckYfixed-factor-clock|D7v=vomap_96m_d10_fckYfixed-factor-clock|D 7w=wdpll5_m2_d4_ckYfixed-factor-clock|r7x=xdpll5_m2_d8_ckYfixed-factor-clock|r7y=ydpll5_m2_d16_ckYfixed-factor-clock|r7z=zdpll5_m2_d20_ckYfixed-factor-clock|r7{={usim_mux_fckYti,composite-mux-clock(|stuvwxyz{fx @7}=}usim_fckYti,composite-clock||}usim_ickYti,omap3-interface-clock|Mx f 7=dpll5_ckYti,omap3-dpll-clock|x  $ L 4#57~=~dpll5_m2_ckYti,divider-clock|~x P7r=rsgx_gate_fckYti,composite-gate-clock|%fx 7=core_d3_ckYfixed-factor-clock|%7=core_d4_ckYfixed-factor-clock|%7=core_d6_ckYfixed-factor-clock|%7=omap_192m_alwon_fckYfixed-factor-clock|!7=core_d2_ckYfixed-factor-clock|%7=sgx_mux_fckYti,composite-mux-clock |)x @7=sgx_fckYti,composite-clock|sgx_ickYti,wait-gate-clock|=x f7=cpefuse_fckYti,gate-clock|x f7=ts_fckYti,gate-clock|?x f7=usbtll_fckYti,wait-gate-clock|rx f7=usbtll_ickYti,omap3-interface-clock|Ix f7=mmchs3_ickYti,omap3-interface-clock|Ix f7=mmchs3_fckYti,wait-gate-clock|x f7=dss1_alwon_fck_3430es2Yti,dss-gate-clock|fx7=dss_ick_3430es2Yti,omap3-dss-interface-clock|>xf7=usbhost_120m_fckYti,gate-clock|rxf7=usbhost_48m_fckYti,dss-gate-clock|/xf7=usbhost_ickYti,omap3-dss-interface-clock|>xf7=uart4_fckYti,wait-gate-clock|Nxf7=clockdomainscore_l3_clkdmti,clockdomain|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|emu_clkdmti,clockdomain|edpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain$|dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|cam_clkdmti,clockdomain|iva2_clkdmti,clockdomain|dpll2_clkdmti,clockdomain|ld2d_clkdmti,clockdomain |dpll5_clkdmti,clockdomain|~sgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |counter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH 7=dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH` ]h u`7=pbias_regulatorti,pbias-omapxpbias_mmc_omap2430pbias_mmc_omap2430w@-7=gpio@48310000ti,omap3-gpioxH1gpio17=gpio@49050000ti,omap3-gpioxIgpio2gpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio47=gpio@49056000ti,omap3-gpioxI`!gpio57=gpio@49058000ti,omap3-gpioxI"gpio67=serial@4806a000ti,omap3-uartxH HRs12xtxrxuart1lserial@4806c000ti,omap3-uartxHIs34xtxrxuart2lserial@49020000ti,omap3-uartxIJs56xtxrxuart3li2c@48070000 ti,omap3-i2cxH8sxtxrxi2c1'@twl@48xH& ti,twl4030 defaultrtcti,twl4030-rtc bciti,twl4030-bci "00<watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' 7=regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:07=regulator-vmmc2ti,twl4030-vmmc2:07=regulator-vusb1v5ti,twl4030-vusb1v57=regulator-vusb1v8ti,twl4030-vusb1v87=regulator-vusb3v1ti,twl4030-vusb3v17=regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpioG7=twl4030-usbti,twl4030-usb Sao}7=pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madcpower4ti,twl4030-power-idle-osc-offti,twl4030-power-idlei2c@48072000 ti,omap3-i2cxH 9sxtxrxi2c2i2c@48060000 ti,omap3-i2cxH=sxtxrxi2c3mailbox@48094000ti,omap3-mailboxmailboxxH @dsp  spi@48098000ti,omap2-mcspixH Amcspi1'@s#$%&'()* xtx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH Bmcspi2' s+,-.xtx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [mcspi3' sxtx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0mcspi4'sFGxtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc15s=>xtxrxBS default OXdnmmc@480b4000ti,omap3-hsmmcxH @Vmmc2s/0xtxrxmmc@480ad000ti,omap3-hsmmcxH ^mmc3sMNxtxrx^F defaultXdnwlcore@2 ti,wl1283x&mmu@480bd400ti,omap2-iommuxH mmu_isp7=mmu@5d000000ti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@mpu ;< commontxrxmcbsp1s xtxrx disabledmcbsp@49022000ti,omap3-mcbspxI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetones!"xtxrx disabledmcbsp@49024000ti,omap3-mcbspxI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonesxtxrx disabledmcbsp@49026000ti,omap3-mcbspxI`mpu 67 commontxrxmcbsp4sxtxrx disabledmcbsp@48096000ti,omap3-mcbspxH `mpu QR commontxrxmcbsp5sxtxrx disabledsham@480c3000ti,omap3-shamshamxH 0d1sExrxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH 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#address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-masklinux,phandlepinctrl-single,pins#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requestssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyti,bb-uvoltti,bb-uampti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsti,use_poweroff#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplycd-gpiosvmmc-supplybus-widthcap-power-off-cardnon-removableref-clock-frequency#iommu-cellsti,#tlb-entriesstatusreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthlabelbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespower#address-cellti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-typelinux,default-triggergpiostartup-delay-usenable-active-highvin-supplyregulator-always-onlinux,codegpio-key,wakeup