z#8s(wst5Freescale i.MX6 DualLite/Solo SABRE Automotive Board !fsl,imx6dl-sabreautofsl,imx6dlchosenaliases),/soc/aips-bus@02100000/ethernet@02188000(6/soc/aips-bus@02000000/flexcan@02090000(;/soc/aips-bus@02000000/flexcan@02094000%@/soc/aips-bus@02000000/gpio@0209c000%F/soc/aips-bus@02000000/gpio@020a0000%L/soc/aips-bus@02000000/gpio@020a4000%R/soc/aips-bus@02000000/gpio@020a8000%X/soc/aips-bus@02000000/gpio@020ac000%^/soc/aips-bus@02000000/gpio@020b0000%d/soc/aips-bus@02000000/gpio@020b4000$j/soc/aips-bus@02100000/i2c@021a0000$o/soc/aips-bus@02100000/i2c@021a4000$t/soc/aips-bus@02100000/i2c@021a8000&y/soc/aips-bus@02100000/usdhc@02190000&~/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca000$/soc/aips-bus@02100000/i2c@021f8000memorymemoryinterrupt-controller@00a01000!arm,cortex-a9-gic%+clocksckil!fsl,imx-ckilfixed-clock3@ckih1!fsl,imx-ckih1fixed-clock3@osc!fsl,imx-oscfixed-clock3@n6soc !simple-busPdma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0W    bgpmi0gpmi1gpmi2gpmi3r}j%+gpmi-nand@00112000!fsl,imx6q-gpmi-nand @ gpmi-nandbch Wbbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txokaydefaulthdmi@0120000 Ws{| iahbisfr disabled!fsl,imx6dl-hdmiport@0endpoint%*+*port@1endpoint%.+.timer@00a00600!arm,cortex-a9-twd-timer  W l2-cache@00a02000!arm,pl310-cache  W\  %2+2pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ dbiconfigpciHP$ Wxbmsi.A{zyxpciepcie_buspcie_phy disabledpmu!arm,cortex-a9-pmu W^aips-bus@02000000!fsl,aips-bussimple-busPspba-bus@02000000!fsl,spba-bussimple-busPspdif@02004000!fsl,imx35-spdif@@ W4   rxtxH5corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7okaydefault %9+9ecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ Wppipgper   rxtx disabledO g default m25p80@0 !st,m25p32p1-ecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W qqipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W!rripgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ W"ssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtx disabledesai@02024000@@ W3ssi@02028000!fsl,imx6q-ssifsl,imx51-ssi@ W. ipgbaud  % &rxtx disabledssi@0202c000!fsl,imx6q-ssifsl,imx51-ssi@ W/ ipgbaud  ) *rxtx disabledssi@02030000!fsl,imx6q-ssifsl,imx51-ssi@ W0 ipgbaud  - .rxtx disabledasrc@02034000@@ W2spba@0203c000@vpu@02040000!fsl,imx6dl-vpucnm,coda960W  bbitjpegperahbaipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ WS>ipgper disabledpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ WT>ipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ WU>ipgperokaydefault%:+:pwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ WV>ipgper disabledflexcan@02090000!fsl,imx6q-flexcan @ Wnlmipgper disabledflexcan@02094000!fsl,imx6q-flexcan @@ Wonoipgper disabledgpt@02098000!fsl,imx6dl-gptfsl,imx6q-gpt @ W7wxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @WBC%+gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @WDEgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@WFG% + gpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @WHIgpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @WJK%8+8gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @WLM%"+"gpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@WNOkpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ WR> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ WPwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ WQ disabledccm@020c4000!fsl,imx6q-ccm @@WWX3%+anatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $W16%+regulator-1p1@110!fsl,anatop-regulatorvdd1p1 5 "6H]r 5regulator-3p0@120!fsl,anatop-regulatorvdd3p0* 0"6 H]r( 3@regulator-2p5@130!fsl,anatop-regulatorvdd2p5 )0"60H]r)0regulator-vddcore@140!fsl,anatop-regulatorvddarm   "6@H]pr  %3+3regulator-vddpu@140!fsl,anatop-regulatorvddpu   6@H ]pr  %+regulator-vddsoc@140!fsl,anatop-regulatorvddsoc   "6@H]pr  %4+4tempmon!fsl,imx6q-tempmon W1 usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W,*%+usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W-*%+snvs@020cc000!fsl,sec-v4.0-monsimple-bus P @snvs-rtc-lp@34!fsl,sec-v4.0-mon-rtc-lp4XWsnvs-poweroff@38!fsl,sec-v4.0-poweroff8 disabledepit@020d0000 @ W8epit@020d4000 @@ W9src@020d8000!fsl,imx6q-srcfsl,imx51-src @W[`5%+gpc@020dc000!fsl,imx6q-gpc @WYZB0zJyL%+iomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8%+iomuxc@020e0000!fsl,imx6dl-iomuxc@defaultimx6qdl-sabreautohoggrpH`|dpY%+ecspi1grpH`HLD% + ecspi1cs`P % + enetgrp`H0L4 $(4< %+gpioledsgrp`%7+7gpminandgrp`pXlTt\x`<$8 lptx|@(%+i2c2grp0`p@dLt@%#+#i2c3grp0`(x@L|@%$+$pwm1grp`D,%+spdifgrp`P8% + uart4grp0`D,X@ %)+)usdhc3grp`pY  4YpYpYpY pY$ pY(pY,pY0pY%+usdhc3grp100mhz`p  4ppp p$ p(p,p0p% + usdhc3grp200mhz`p  4ppp p$ p(p,p0p%!+!weimcs0grp`< %&+&weimnorgrp``DHLP T$X(\,`0d4h8l<p@tDxH|LP,($ plhd`\|xtXT%%+%ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldbokay0!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0okayispwgzport@0endpoint%,+,port@1endpoint%0+0display-timingshsd100pxn1@@(< %+lvds-channel@1 disabledport@0endpoint%-+-port@1endpoint%1+1dcic@020e4000@@ W|dcic@020e8000@ W}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ Wipgahbrimx/sdma/sdma-imx6q.bin% + pxp@020f0000@ Wbepdc@020f4000@@ Walcdif@020f8000@ W'aips-bus@02100000!fsl,aips-bussimple-busPcaam@02100000Wijaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ W+ disabledusb@02184200!fsl,imx6q-usbfsl,imx27-usbB W(host disabledusb@02184400!fsl,imx6q-usbfsl,imx27-usbD W)host disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF W*host disabledusbmisc@02184800#!fsl,imx6q-usbmiscH%+ethernet@02188000!fsl,imx6q-fec@0wuu ipgahbptpokaydefaultDrgmiimlb@0218c000@$W5u~usdhc@02190000!fsl,imx6q-usdhc@ W ipgahbperM disabledusdhc@02194000!fsl,imx6q-usdhc@@ W ipgahbperM disabledusdhc@02198000!fsl,imx6q-usdhc@ W ipgahbperMokay"defaultstate_100mhzstate_200mhzW a! k" t usdhc@0219c000!fsl,imx6q-usdhc@ W ipgahbperM disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ W$} disabledi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ W%~okay@default#pfuze100@08 !fsl,pfuze100regulatorssw1ab 8}"jsw1c 8}"jsw2 5 2Z}"sw3a "}"sw3b "}"sw4 5 2ZswbstLK@ N0vsnvsB@ -}"vrefddr}"vgen1 5 vgen2 5 vgen3w@ 2Zvgen4w@ 2Z"vgen5w@ 2Z"vgen6w@ 2Z"i2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ W&okaydefault$gpio@30!maxim,max73100gpio@32!maxim,max73102gpio@34!maxim,max73104romcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ Wdefault%&P disablednor@0,0 !cfi-flash b ocotp@021bc000!fsl,imx6q-ocotpsyscon@%+tzasc@021d0000@ Wltzasc@021d4000@@ Wmaudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@ disabledmipi@021dc000@mipi@021e0000@ disabledportsport@0endpoint'%+++port@1endpoint(%/+/vdoa@021e4000@@ Wserial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtx disabledserial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtxokaydefault)serial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ Wipgper  ! "rxtx disabledi2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c@ W#t disabledipu@02400000!fsl,imx6q-ipu@@W busdi0di1port@0port@1port@2%5+5endpoint@0endpoint@1*%+endpoint@2+%'+'endpoint@3,%+endpoint@4-%+port@3%6+6endpoint@0endpoint@1.%+endpoint@2/%(+(endpoint@30%+endpoint@41%+sram@00900000 !mmio-sram%+cpuscpu@0!arm,cortex-a9cpu22  g82  l(h)armpll2_pfd2_396msteppll1_swpll1_sys 3B4cpu@1!arm,cortex-a9cpu2display-subsystem!fsl,imx-display-subsystem!56leds !gpio-ledsdefault7user'debug j8sound-spdif,!fsl,imx-audio-spdiffsl,imx-sabreauto-spdif imx-spdif-9>backlight!pwm-backlight G:LK@ L @^okay #address-cells#size-cellsmodelcompatibleethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3device_typereg#interrupt-cellsinterrupt-controllerinterrupt-parentlinux,phandle#clock-cellsclock-frequencyrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0gprremote-endpointcache-unifiedcache-levelarm,tag-latencyarm,data-latencynum-lanesinterrupt-map-maskinterrupt-mapfsl,spi-num-chipselectscs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthpower-domainsresetsiram#pwm-cellsgpio-controller#gpio-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatop#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,data-mappingfsl,data-widthnative-modehactivevactivehback-porchhfront-porchvback-porchvfront-porchhsync-lenvsync-lenfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscdr_mode#index-cellsinterrupts-extendedphy-modebus-widthpinctrl-1pinctrl-2cd-gpioswp-gpiosregulator-boot-onregulator-ramp-delaybank-widthfsl,weim-cs-timingnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportslabelspdif-controllerspdif-inpwmsbrightness-levelsdefault-brightness-level