jy8e(ud-Gateworks Ventana i.MX6 DualLite/Solo GW552X'!gw,imx6dl-gw552xgw,ventanafsl,imx6dlchosen,console=ttymxc1,115200aliases)5/soc/aips-bus@02100000/ethernet@02188000(?/soc/aips-bus@02000000/flexcan@02090000(D/soc/aips-bus@02000000/flexcan@02094000%I/soc/aips-bus@02000000/gpio@0209c000%O/soc/aips-bus@02000000/gpio@020a0000%U/soc/aips-bus@02000000/gpio@020a4000%[/soc/aips-bus@02000000/gpio@020a8000%a/soc/aips-bus@02000000/gpio@020ac000%g/soc/aips-bus@02000000/gpio@020b0000%m/soc/aips-bus@02000000/gpio@020b4000$s/soc/aips-bus@02100000/i2c@021a0000$x/soc/aips-bus@02100000/i2c@021a4000$}/soc/aips-bus@02100000/i2c@021a8000&/soc/aips-bus@02100000/usdhc@02190000&/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca000$/soc/aips-bus@02100000/i2c@021f8000 /leds/user1 /leds/user2 /leds/user3/soc/gpmi-nand@00112000$/soc/aips-bus@02100000/usb@02184200$/soc/aips-bus@02100000/usb@02184000memorymemory interrupt-controller@00a01000!arm,cortex-a9-gic&;LRclocksckil!fsl,imx-ckilfixed-clockZgckih1!fsl,imx-ckih1fixed-clockZgosc!fsl,imx-oscfixed-clockZgn6soc !simple-bus;wdma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0~    gpmi0gpmi1gpmi2gpmi3jLRgpmi-nand@00112000!fsl,imx6q-gpmi-nand @ gpmi-nandbch ~bch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txokaydefaulthdmi@0120000 ~s{| iahbisfrokay!fsl,imx6dl-hdmiport@0endpoint L!R!port@1endpoint L%R%timer@00a00600!arm,cortex-a9-twd-timer  ~ ;l2-cache@00a02000!arm,pl310-cache  ~\* 6 FL)R)pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ dbiconfigpciHwW ~xmsiat{zyxpciepcie_buspcie_phyokaydefault   pmu!arm,cortex-a9-pmu ~^aips-bus@02000000!fsl,aips-bussimple-buswspba-bus@02000000!fsl,spba-bussimple-buswspdif@02004000!fsl,imx35-spdif@@ ~4   rxtxH5corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7 disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ ~ppipgper   rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ ~ qqipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ ~!rripgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ ~"ssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart@ ~ipgper   rxtx disabledesai@02024000@@ ~3ssi@02028000!fsl,imx6q-ssifsl,imx51-ssi@ ~. ipgbaud  % &rxtx disabledssi@0202c000!fsl,imx6q-ssifsl,imx51-ssi@ ~/ ipgbaud  ) *rxtx disabledssi@02030000!fsl,imx6q-ssifsl,imx51-ssi@ ~0 ipgbaud  - .rxtx disabledasrc@02034000@@ ~2spba@0203c000@vpu@02040000!fsl,imx6dl-vpucnm,coda960~  bitjpegperahb aipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ ~S>ipgper disabledpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ ~T>ipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ ~U>ipgper disabledpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ ~V>ipgper disabledflexcan@02090000!fsl,imx6q-flexcan @ ~nlmipgper disabledflexcan@02094000!fsl,imx6q-flexcan @@ ~onoipgper disabledgpt@02098000!fsl,imx6dl-gptfsl,imx6q-gpt @ ~7wxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @~BC&L R gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @~DE&gpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@~FG&gpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @~HI&L/R/gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @~JK&gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @~LM&gpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@~NO&kpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ ~R> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ ~Pwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ ~Q disabledccm@020c4000!fsl,imx6q-ccm @@~WXZLRanatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $~16LRregulator-1p1@110!fsl,anatop-regulatorvdd1p1 5-ASh} 5regulator-3p0@120!fsl,anatop-regulatorvdd3p0*0-A Sh}( 3@regulator-2p5@130!fsl,anatop-regulatorvdd2p5)0-A0Sh})0regulator-vddcore@140!fsl,anatop-regulatorvddarm  -A@Shp}  L*R*regulator-vddpu@140!fsl,anatop-regulatorvddpu  A@S hp}  LRregulator-vddsoc@140!fsl,anatop-regulatorvddsoc  -A@Shp}  L+R+tempmon!fsl,imx6q-tempmon ~1$usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  ~,5LRusbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  ~-5LRsnvs@020cc000!fsl,sec-v4.0-monsimple-bus w @snvs-rtc-lp@34!fsl,sec-v4.0-mon-rtc-lp4X~snvs-poweroff@38!fsl,sec-v4.0-poweroff8 disabledepit@020d0000 @ ~8epit@020d4000 @@ ~9src@020d8000!fsl,imx6q-srcfsl,imx51-src @~[`@L R gpc@020dc000!fsl,imx6q-gpc @&~YZ;M0zJyWLRiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8LRiomuxc@020e0000!fsl,imx6dl-iomuxc@imx6qdl-gw552xgpioledsgrpHkD,X@hPL.R.gpminandgrpkpXlTt\x`<$8 lptx|LRi2c1grp0kX(h@tDl@LRi2c2grp0kP8p@dLt@LRi2c3grp0k(x@4|@LRpciegrpkL R uart2grp0k\DP8 LRuart3grp0kd4h8 LRuart5grp0kH0\D L R ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldb disabled0!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0 disabledport@0endpoint L#R#port@1endpoint L'R'lvds-channel@1 disabledport@0endpoint L$R$port@1endpoint L(R(dcic@020e4000@@ ~|dcic@020e8000@ ~}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ ~ipgahbtimx/sdma/sdma-imx6q.binL R pxp@020f0000@ ~bepdc@020f4000@@ ~alcdif@020f8000@ ~'aips-bus@02100000!fsl,aips-bussimple-buswcaam@02100000~ijaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ ~+ disabledusb@02184200!fsl,imx6q-usbfsl,imx27-usbB ~(hostokayusb@02184400!fsl,imx6q-usbfsl,imx27-usbD ~)host disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF ~*host disabledusbmisc@02184800!fsl,imx6q-usbmiscHLRethernet@02188000!fsl,imx6q-fec@ vwuu ipgahbptp disabledmlb@0218c000@$~5u~usdhc@02190000!fsl,imx6q-usdhc@ ~ ipgahbper disabledusdhc@02194000!fsl,imx6q-usdhc@@ ~ ipgahbper disabledusdhc@02198000!fsl,imx6q-usdhc@ ~ ipgahbper disabledusdhc@0219c000!fsl,imx6q-usdhc@ ~ ipgahbper disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ ~$}okaygdefaulteeprom@50 !atmel,24c02Peeprom@51 !atmel,24c02Qeeprom@52 !atmel,24c02Reeprom@53 !atmel,24c02Spca9555@23 !nxp,pca9555#ds1672@68!dallas,ds1672hi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ ~%~okaygdefaulti2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ ~&okaygdefaultLRromcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ ~ocotp@021bc000!fsl,imx6q-ocotpsyscon@LRtzasc@021d0000@ ~ltzasc@021d4000@@ ~maudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@ disabledmipi@021dc000@mipi@021e0000@ disabledportsport@0endpoint L"R"port@1endpoint L&R&vdoa@021e4000@@ ~serial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ ~ipgper   rxtxokaydefaultserial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ ~ipgper   rxtxokaydefaultserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ ~ipgper   rxtx disabledserial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ ~ipgper  ! "rxtxokaydefault i2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c@ ~#t disabledipu@02400000!fsl,imx6q-ipu@@~ busdi0di1 port@0port@1port@2L,R,endpoint@0endpoint@1 !LRendpoint@2 "LRendpoint@3 #LRendpoint@4 $LRport@3L-R-endpoint@0endpoint@1 %L R endpoint@2 &LRendpoint@3 'LRendpoint@4 (LRsram@00900000 !mmio-sramLRcpuscpu@0!arm,cortex-a9cpu)2  g82  l(h)armpll2_pfd2_396msteppll1_swpll1_sys)*M4+cpu@1!arm,cortex-a9cpu)display-subsystem!fsl,imx-display-subsystem?,-leds !gpio-ledsdefault.user1Euser1 K/Qon _heartbeatuser2Euser2 K/Qoffuser3Euser3 K/Qoffregulators !simple-busregulator@0!regulator-fixed1P0VB@B@-regulator@2!regulator-fixed3P3V2Z2Z-regulator@3!regulator-fixed5P0VLK@LK@- #address-cells#size-cellsmodelcompatiblebootargsethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3led0led1led2nandusb0usb1device_typereg#interrupt-cellsinterrupt-controllerinterrupt-parentlinux,phandle#clock-cellsclock-frequencyrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0gprddc-i2c-busremote-endpointcache-unifiedcache-levelarm,tag-latencyarm,data-latencynum-lanesinterrupt-map-maskinterrupt-mapreset-gpio#sound-dai-cellsfsl,fifo-depthpower-domainsresetsiram#pwm-cellsgpio-controller#gpio-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatop#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscdr_mode#index-cellsinterrupts-extendedbus-widthpagesizenext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportslabelgpiosdefault-statelinux,default-trigger