y8r(]r%aristainetos i.MX6 Dual Lite Board 7 !fsl,imx6dlchosenaliases),/soc/aips-bus@02100000/ethernet@02188000(6/soc/aips-bus@02000000/flexcan@02090000(;/soc/aips-bus@02000000/flexcan@02094000%@/soc/aips-bus@02000000/gpio@0209c000%F/soc/aips-bus@02000000/gpio@020a0000%L/soc/aips-bus@02000000/gpio@020a4000%R/soc/aips-bus@02000000/gpio@020a8000%X/soc/aips-bus@02000000/gpio@020ac000%^/soc/aips-bus@02000000/gpio@020b0000%d/soc/aips-bus@02000000/gpio@020b4000$j/soc/aips-bus@02100000/i2c@021a0000$o/soc/aips-bus@02100000/i2c@021a4000$t/soc/aips-bus@02100000/i2c@021a8000&y/soc/aips-bus@02100000/usdhc@02190000&~/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca000$/soc/aips-bus@02100000/i2c@021f8000memorymemory@interrupt-controller@00a01000!arm,cortex-a9-gic%+clocksckil!fsl,imx-ckilfixed-clock3@ckih1!fsl,imx-ckih1fixed-clock3@osc!fsl,imx-oscfixed-clock3@n6soc !simple-busPdma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0W    bgpmi0gpmi1gpmi2gpmi3r}j%+gpmi-nand@00112000!fsl,imx6q-gpmi-nand @ gpmi-nandbch Wbbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txokaydefaulthdmi@0120000 Ws{| iahbisfr disabled!fsl,imx6dl-hdmiport@0endpoint%.+.port@1endpoint%2+2timer@00a00600!arm,cortex-a9-twd-timer  W l2-cache@00a02000!arm,pl310-cache  W\  %8+8pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ dbiconfigpciHP$ Wxbmsi.A{zyxpciepcie_buspcie_phyokaypmu!arm,cortex-a9-pmu W^aips-bus@02000000!fsl,aips-bussimple-busPspba-bus@02000000!fsl,spba-bussimple-busPspdif@02004000!fsl,imx35-spdif@@ W4   rxtxH5corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7 disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ Wppipgper   rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W qqipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W!rripgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ W"ssipgper   rxtxokayO g default m25p80@0!micron,n25q128a11p1-serial@02020000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtx disabledesai@02024000@@ W3ssi@02028000!fsl,imx6q-ssifsl,imx51-ssi@ W. ipgbaud  % &rxtx disabledssi@0202c000!fsl,imx6q-ssifsl,imx51-ssi@ W/ ipgbaud  ) *rxtx disabledssi@02030000!fsl,imx6q-ssifsl,imx51-ssi@ W0 ipgbaud  - .rxtx disabledasrc@02034000@@ W2spba@0203c000@vpu@02040000!fsl,imx6dl-vpucnm,coda960W  bbitjpegperahb  aipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ WS>ipgper disabledpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ WT>ipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ WU>ipgperokay%?+?pwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ WV>ipgper disabledflexcan@02090000!fsl,imx6q-flexcan @ Wnlmipgperokaydefaultflexcan@02094000!fsl,imx6q-flexcan @@ Wonoipgperokaydefaultgpt@02098000!fsl,imx6dl-gptfsl,imx6q-gpt @ W7wxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @WBCgpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @WDEgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@WFG% + gpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @WHI%"+"gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @WJKgpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @WLMgpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@WNOkpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ WR> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ WPwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ WQ disabledccm@020c4000!fsl,imx6q-ccm @@WWX3%+anatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $W16%+regulator-1p1@110!fsl,anatop-regulatorvdd1p1 5 "6H]r 5regulator-3p0@120!fsl,anatop-regulatorvdd3p0* 0"6 H]r( 3@regulator-2p5@130!fsl,anatop-regulatorvdd2p5 )0"60H]r)0regulator-vddcore@140!fsl,anatop-regulatorvddarm   "6@H]pr  %9+9regulator-vddpu@140!fsl,anatop-regulatorvddpu   6@H ]pr  %+regulator-vddsoc@140!fsl,anatop-regulatorvddsoc   "6@H]pr  %:+:tempmon!fsl,imx6q-tempmon W1 usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W,*%+usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W-*%+snvs@020cc000!fsl,sec-v4.0-monsimple-bus P @snvs-rtc-lp@34!fsl,sec-v4.0-mon-rtc-lp4XWsnvs-poweroff@38!fsl,sec-v4.0-poweroff8 disabledepit@020d0000 @ W8epit@020d4000 @@ W9src@020d8000!fsl,imx6q-srcfsl,imx51-src @W[`5% + gpc@020dc000!fsl,imx6q-gpc @WYZB0zJyL%+iomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8%+iomuxc@020e0000!fsl,imx6dl-iomuxc@defaultimx6qdl-aristainetosaristainetos-usbh1-vbus`P0%=+=aristainetos-usbotg-vbus`hP0%>+>audmuxgrp``tx|%'+'backlightgrpH`@D,$%@+@ecspi2grp``< @d4ecspi4grpx`X(\,tDT$\D% + enetgrp` @(%+flexcan1grp0``HL4%+flexcan2grp0`%+gpiogrp`H0L4P8T<(,048< D,%+gpminandgrp`pXlTt\x`<$8 lptx|@(%+hoggrp`xH%+i2c1grp0`l@h@%$+$i2c2grp0`P8p@dLt@%%+%i2c3grp0`Hx@L|@%&+&ipudisp1grp`   %6+6uart2grp0`l<p@ %*+*uart4grp``ThXl dx h|%+++uart5grp0`\p`t %,+,usbotggrp`pY%+usdhc1grp`pY (YpYpYpYpYX@% + usdhc2grp`pY 0YpYpYpYpYH0%#+#ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldb disabled0!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0 disabledport@0endpoint%0+0port@1endpoint%4+4lvds-channel@1 disabledport@0endpoint%1+1port@1endpoint%5+5dcic@020e4000@@ W|dcic@020e8000@ W}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ Wipgahbriimx/sdma/sdma-imx6q.bin% + pxp@020f0000@ Wbepdc@020f4000@@ Walcdif@020f8000@ W'aips-bus@02100000!fsl,aips-bussimple-busPcaam@02100000Wijaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ W+okaydefaulthostusb@02184200!fsl,imx6q-usbfsl,imx27-usbB W(hostokayusb@02184400!fsl,imx6q-usbfsl,imx27-usbD W)host disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF W*host disabledusbmisc@02184800!fsl,imx6q-usbmiscH%+ethernet@02188000!fsl,imx6q-fec@ vwuu ipgahbptpokaydefaultrmii  mlb@0218c000@$W5u~usdhc@02190000!fsl,imx6q-usdhc@ W ipgahbperokaydefault ! "usdhc@02194000!fsl,imx6q-usdhc@@ W ipgahbperokaydefault#! "usdhc@02198000!fsl,imx6q-usdhc@ W ipgahbper disabledusdhc@0219c000!fsl,imx6q-usdhc@ W ipgahbper disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ W$}okay@default$tmp103@71 !ti,tmp103qi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ W%~okay@default%i2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ W&okay@default&rtc@68!dallas,m41t00hromcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ Wocotp@021bc000!fsl,imx6q-ocotpsyscon@%+tzasc@021d0000@ Wltzasc@021d4000@@ Wmaudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@okaydefault'mipi@021dc000@mipi@021e0000@ disabledportsport@0endpoint(%/+/port@1endpoint)%3+3vdoa@021e4000@@ Wserial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtxokaydefault*serial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtxokaydefault+serial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ Wipgper  ! "rxtxokaydefault,i2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c@ W#t disabledipu@02400000!fsl,imx6q-ipu@@W busdi0di1 port@0port@1port@2%;+;endpoint@0-%7+7endpoint@1.%+endpoint@2/%(+(endpoint@30%+endpoint@41%+port@3%<+<endpoint@0endpoint@12%+endpoint@23%)+)endpoint@34%+endpoint@45%+sram@00900000 !mmio-sram% + display@di0!fsl,imx-parallel-display/rgb24default6okaydisplay-timings800x480p60A@K0M U]XjXvP  portendpoint7%-+-cpuscpu@0!arm,cortex-a9cpu82  g82  l(h)armpll2_pfd2_396msteppll1_swpll1_sys9B:cpu@1!arm,cortex-a9cpu8display-subsystem!fsl,imx-display-subsystem;<regulators !simple-busregulator@0!regulator-fixed2P5V&% &%"regulator@1!regulator-fixed3P3V2Z 2Z"%!+!regulator@2!regulator-fixed ( default= usb_h1_vbusLK@ LK@%+regulator@3!regulator-fixed ("default> usb_otg_vbusLK@ LK@%+backlight!pwm-backlight -?  2 @Ddefault@ #address-cells#size-cellsmodelcompatibleethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3device_typereg#interrupt-cellsinterrupt-controllerinterrupt-parentlinux,phandle#clock-cellsclock-frequencyrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0gprremote-endpointcache-unifiedcache-levelarm,tag-latencyarm,data-latencynum-lanesinterrupt-map-maskinterrupt-mapfsl,spi-num-chipselectscs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthpower-domainsresetsiram#pwm-cellsgpio-controller#gpio-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatop#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-modephy-reset-gpiosbus-widthvmmc-supplycd-gpiosfsl,uart-has-rtsctsinterface-pix-fmtnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenvsync-activenext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportsenable-active-highgpiopwmsbrightness-levelsdefault-brightness-level