8X( $ti,am43x-epos-evmti,am4372ti,am43&7TI AM43x EPOS EVMchosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000&T/ocp/ethernet@4a100000/slave@4a100200&^/ocp/ethernet@4a100000/slave@4a100300 h/displaymemoryqmemory}cpuscpu@0arm,cortex-a9qcpu}cpuinterrupt-controller@48241000arm,cortex-a9-gic}H$H$&interrupt-controller@48281000ti,omap4-wugen-mpu}H(&l2-cache-controller@48242000arm,pl310-cache}H$ ocpti,am4372-l3-nocsimple-busl3_main}D@D@  l4_wkup@44c00000ti,am4-l4-wkupsimple-bus D(pprcm@1f0000 ti,am4-prcm}clocksclk_32768_ck  fixed-clockclk_rc32k_ck  fixed-clockvirt_19200000_ck  fixed-clock$""virt_24000000_ck  fixed-clockn6##virt_25000000_ck  fixed-clock}x@$$virt_26000000_ck  fixed-clock%%tclkin_ck  fixed-clockdpll_core_ck ti,am3-dpll-core-clock }- -$-,dpll_core_x2_ck ti,am3-dpll-x2-clockdpll_core_m4_ck ti,divider-clock)4}-8F]  dpll_core_m5_ck ti,divider-clock)4}-<F]dpll_core_m6_ck ti,divider-clock)4}-@F]dpll_mpu_ck ti,am3-dpll-clock }-`-d-ldpll_mpu_m2_ck ti,divider-clock)4}-pF]dpll_ddr_ck ti,am3-dpll-clock }---dpll_ddr_m2_ck ti,divider-clock)4}-F]dpll_disp_ck ti,am3-dpll-clock }. .$.,dpll_disp_m2_ck ti,divider-clock)4}.0F]tdpll_per_ck ti,am3-dpll-j-type-clock }---  dpll_per_m2_ck ti,divider-clock )4}-F]  dpll_per_m2_div4_wkupdm_ck fixed-factor-clock dpll_per_m2_div4_ck fixed-factor-clock clk_24mhz fixed-factor-clock   clkdiv32k_ck fixed-factor-clock   clkdiv32k_ick ti,gate-clock }*8sysclk_div fixed-factor-clock pruss_ocp_gclk  ti,mux-clock}BHclk_32k_tpm_ck  fixed-clocktimer1_fck  ti,mux-clock}Btimer2_fck  ti,mux-clock }Btimer3_fck  ti,mux-clock }Btimer4_fck  ti,mux-clock }B timer5_fck  ti,mux-clock }Btimer6_fck  ti,mux-clock }Btimer7_fck  ti,mux-clock }Bwdt1_fck  ti,mux-clock}B,l3_gclk fixed-factor-clock dpll_core_m4_div2_ck fixed-factor-clockl4hs_gclk fixed-factor-clock l3s_gclk fixed-factor-clock::l4ls_gclk fixed-factor-clock&&cpsw_125mhz_gclk fixed-factor-clock11cpsw_cpts_rft_clk  ti,mux-clock }B822clk_32k_mosc_ck  fixed-clockgpio0_dbclk_mux_ck  ti,mux-clock}B@gpio0_dbclk ti,gate-clock}+hgpio1_dbclk ti,gate-clock}xgpio2_dbclk ti,gate-clock}gpio3_dbclk ti,gate-clock}gpio4_dbclk ti,gate-clock}gpio5_dbclk ti,gate-clock}mmc_clk fixed-factor-clock gfx_fclk_clksel_ck  ti,mux-clock }B<gfx_fck_div_ck ti,divider-clock}B<)disp_clk  ti,mux-clock  }BDtHHdpll_extdev_ck ti,am3-dpll-clock }.`.d.ldpll_extdev_m2_ck ti,divider-clock)4}.pF]mux_synctimer32k_ck  ti,mux-clock }B0synctimer_32kclk ti,gate-clock}*0timer8_fck  ti,mux-clock}Btimer9_fck  ti,mux-clock}B timer10_fck  ti,mux-clock}B$timer11_fck  ti,mux-clock}B(cpsw_50m_clkdiv fixed-factor-clockcpsw_5m_clkdiv fixed-factor-clock dpll_ddr_x2_ck ti,am3-dpll-x2-clockdpll_ddr_m4_ck ti,divider-clock)4}-F]dpll_per_clkdcoldo ti,fixed-factor-clock 4}.]dll_aging_clk_div ti,divider-clock}BP  div_core_25m_ck fixed-factor-clockfunc_12m_clk fixed-factor-clock FFvtp_clk_div fixed-factor-clockusbphy_32khz_clkmux  ti,mux-clock}B`usb_phy0_always_on_clk32k ti,gate-clock}*@>>usb_phy1_always_on_clk32k ti,gate-clock}*HAAusb_otg_ss0_refclk960m ti,gate-clock}`??usb_otg_ss1_refclk960m ti,gate-clock}hBBclockdomainsscm@210000ti,am4-scmsimple-bus}!@ !@pinmux@800 ti,am437-padconfpinctrl-single} cpsw_defaultH  $(<@D33cpsw_sleepH  $(<@D44davinci_mdio_default HL55davinci_mdio_sleep HL66pinmux_i2c0_pins ''nand_flash_x8 @ pt|;;backlight_pins d88pinmux_i2c2_pins **pinmux_spi0_pins  PTX\++pinmux_spi1_pins  00pinmux_mmc1_pins `..qspi1_default0 |EEpixcir_ts_pins D((pinmux_hdq_pins 4GGdss_pins $(,048<IIlcd_pins PPvpfe1_pins_defaulth NNvpfe1_pins_sleeph OOscm_conf@0syscon}LLclockssys_clkin_ck  ti,mux-clock !}@crystal_freq_sel_ck  ti,mux-clock"#$%}@!!sysboot_freq_sel_ck@44e10040  ti,mux-clock"#$%}@  adc_tsc_fck fixed-factor-clock99dcan0_fck fixed-factor-clockKKdcan1_fck fixed-factor-clockMMmcasp0_fck fixed-factor-clockmcasp1_fck fixed-factor-clocksmartreflex0_fck fixed-factor-clocksmartreflex1_fck fixed-factor-clocksha0_fck fixed-factor-clockaes0_fck fixed-factor-clockehrpwm0_tbclk ti,gate-clock&}dehrpwm1_tbclk ti,gate-clock&}dehrpwm2_tbclk ti,gate-clock&}dehrpwm3_tbclk ti,gate-clock&}dehrpwm4_tbclk ti,gate-clock&}dehrpwm5_tbclk ti,gate-clock&}dclockdomainsemif@4c000000ti,emif-am4372}Lemifedma@49000000 ti,edma3tpcctptc0tptc1tptc2}ID$  ,,serial@44e09000ti,am4372-uartti,omap2-uart}D  Huart1serial@48022000ti,am4372-uartti,omap2-uart}H  Iuart2 *disabledserial@48024000ti,am4372-uartti,omap2-uart}H@  Juart3 *disabledserial@481a6000ti,am4372-uartti,omap2-uart}H`  ,uart4 *disabledserial@481a8000ti,am4372-uartti,omap2-uart}H  -uart5 *disabledserial@481aa000ti,am4372-uartti,omap2-uart}H  .uart6 *disabledmailbox@480C8000ti,omap4-mailbox}H  Mmailbox1=Owkup_m3 a ltimer@44e31000(ti,am4372-timer-1msti,am335x-timer-1ms}D Cwtimer1timer@48040000 ti,am4372-timerti,am335x-timer}H Dtimer2timer@48042000 ti,am4372-timerti,am335x-timer}H  Etimer3 *disabledtimer@48044000 ti,am4372-timerti,am335x-timer}H@ \timer4 *disabledtimer@48046000 ti,am4372-timerti,am335x-timer}H` ]timer5 *disabledtimer@48048000 ti,am4372-timerti,am335x-timer}H ^timer6 *disabledtimer@4804a000 ti,am4372-timerti,am335x-timer}H _timer7 *disabledtimer@481c1000 ti,am4372-timerti,am335x-timer}H timer8 *disabledtimer@4833d000 ti,am4372-timerti,am335x-timer}H3 timer9 *disabledtimer@4833f000 ti,am4372-timerti,am335x-timer}H3 timer10 *disabledtimer@48341000 ti,am4372-timerti,am335x-timer}H4 timer11 *disabledcounter@44e86000(ti,am4372-counter32kti,omap-counter32k}D`@ counter_32krtc@44e3e000ti,am4372-rtcti,da830-rtc}DKLrtc *disabledwdt@44e35000ti,am4372-wdtti,omap3-wdt}DP [ wd_timer2gpio@44e07000ti,am4372-gpioti,omap4-gpio}Dp `gpio1*okay//gpio@4804c000ti,am4372-gpioti,omap4-gpio}H bgpio2*okay))gpio@481ac000ti,am4372-gpioti,omap4-gpio}H  gpio3*okayQQgpio@481ae000ti,am4372-gpioti,omap4-gpio}H >gpio4*okaySSgpio@48320000ti,am4372-gpioti,omap4-gpio}H2 jgpio5 *disabledgpio@48322000ti,am4372-gpioti,omap4-gpio}H2  gpio6 *disabledspinlock@480ca000ti,omap4-hwspinlock}H  spinlocki2c@44e0b000ti,am4372-i2cti,omap4-i2c}D Fi2c1*okaydefault'tps65218@24}$ ti,tps65218 regulator-dcdc1ti,tps65218-dcdc1 vdd_core t&regulator-dcdc2ti,tps65218-dcdc2vdd_mpu &regulator-dcdc3ti,tps65218-dcdc3vdcdc3``&regulator-dcdc5ti,tps65218-dcdc5v1_0batB@B@regulator-dcdc6ti,tps65218-dcdc6v1_8batw@w@regulator-ldo1ti,tps65218-ldo1w@w@&at24@50 at24,24c256:@}Ppixcir_ts@5cpixcir,pixcir_tangocdefault(}\&) C)M`Xi2c@4802a000ti,am4372-i2cti,omap4-i2c}H Gi2c2 *disabledi2c@4819c000ti,am4372-i2cti,omap4-i2c}H i2c3*okaydefault*spi@48030000ti,am4372-mcspiti,omap4-mcspi}H Aspi0*okaydefault+mmc@48060000ti,omap4-hsmmc}Hmmc1s,,txrx @*okay-default. /mmc@481d8000ti,omap4-hsmmc}Hmmc2,,txrx  *disabledmmc@47810000ti,omap4-hsmmc}Gmmc3  *disabledspi@481a0000ti,am4372-mcspiti,omap4-mcspi}H }spi1*okaydefault0spi@481a2000ti,am4372-mcspiti,omap4-mcspi}H  ~spi2 *disabledspi@481a4000ti,am4372-mcspiti,omap4-mcspi}H@ spi3 *disabledspi@48345000ti,am4372-mcspiti,omap4-mcspi}H4P spi4 *disabledethernet@4a100000ti,am4372-cpswti,cpsw}JJ0()*+cpgmac012 fckcpts*okay @  /defaultsleep3@4mdio@4a101000ti,am4372-mdioti,davinci_mdio}J davinci_mdioJB@*okaydefaultsleep5@677slave@4a100200S_7frmiislave@4a100300S_7frmiicpsw-phy-sel@44e10650ti,am43xx-cpsw-phy-sel}DP ogmii-selyepwmss@48300000 ti,am4372-pwmssti,am33xx-pwmss}H0epwmss0*okayecap@48300100ti,am4372-ecapti,am33xx-ecap}H0ecap0*okaydefault8TTehrpwm@48300200"ti,am4372-ehrpwmti,am33xx-ehrpwm}H0ehrpwm0 *disabledepwmss@48302000 ti,am4372-pwmssti,am33xx-pwmss}H0 epwmss1 *disabledecap@48302100ti,am4372-ecapti,am33xx-ecap}H0!ecap1 *disabledehrpwm@48302200"ti,am4372-ehrpwmti,am33xx-ehrpwm}H0"ehrpwm1 *disabledepwmss@48304000 ti,am4372-pwmssti,am33xx-pwmss}H0@epwmss2 *disabledecap@48304100ti,am4372-ecapti,am33xx-ecap}H0Aecap2 *disabledehrpwm@48304200"ti,am4372-ehrpwmti,am33xx-ehrpwm}H0Behrpwm2 *disabledepwmss@48306000 ti,am4372-pwmssti,am33xx-pwmss}H0`epwmss3 *disabledehrpwm@48306200"ti,am4372-ehrpwmti,am33xx-ehrpwm}H0behrpwm3 *disabledepwmss@48308000 ti,am4372-pwmssti,am33xx-pwmss}H0epwmss4 *disabledehrpwm@48308200"ti,am4372-ehrpwmti,am33xx-ehrpwm}H0ehrpwm4 *disabledepwmss@4830a000 ti,am4372-pwmssti,am33xx-pwmss}H0epwmss5 *disabledehrpwm@4830a200"ti,am4372-ehrpwmti,am33xx-ehrpwm}H0ehrpwm5 *disabledtscadc@44e0d000ti,am3359-tscadc}Dadc_tsc 9fck*okaytscti,am3359-tscadcti,am3359-adc sham@53100000ti,omap5-shamsham}S,$rx maes@53501000 ti,omap4-aesaes}SP g,,txrxdes@53701000 ti,omap4-desdes}Sp ,",!txrxmcasp@48038000ti,am33xx-mcasp-audiomcasp0}H F@ompudatPQtxrx *disabled,, txrxmcasp@4803C000ti,am33xx-mcasp-audiomcasp1}H F@@ompudatRStxrx *disabled, , txrxelm@48080000ti,am3352-elm}H  elm&fck*okay<<gpmc@50000000ti,am3352-gpmcgpmc:fck}P  d*okaydefault;nand@0,0 }bch16< /=(O(ap((&@Wo(partition@0 NAND.SPL}partition@1NAND.SPL.backup1}partition@2NAND.SPL.backup2}partition@3NAND.SPL.backup3} partition@4NAND.u-boot-spl-os}partition@5 NAND.u-boot}partition@6NAND.u-boot-env}(partition@7NAND.u-boot-env.backup1},partition@8 NAND.kernel}0ppartition@9NAND.file-system}`control-phy@44e10620ti,control-phy-usb2-am437}D opower==control-phy@0x44e10628ti,control-phy-usb2-am437}D(opower@@ocp2scp@483a8000"ti,am437x-ocp2scpti,omap-ocp2scp ocp2scp0phy@483a8000ti,am437x-usb2}H:=>?wkupclkrefclk*okayCCocp2scp@483e8000"ti,am437x-ocp2scpti,omap-ocp2scp ocp2scp1phy@483e8000ti,am437x-usb2}H>@ABwkupclkrefclk*okayDDomap_dwc3@48380000ti,am437x-dwc3 usb_otg_ss0}H8 usb@48390000synopsys,dwc3}H9 C usb2-phy high-speed peripheral*okayomap_dwc3@483c0000ti,am437x-dwc3 usb_otg_ss1}H< usb@483d0000synopsys,dwc3}H= D usb2-phy high-speedhost*okayqspi@47900000ti,am4372-qspi}Gqspi  *disableddefaultElm25p80@0 mx66l51235ll})2;Lpartition@0 QSPI.U_BOOT}partition@1QSPI.U_BOOT.backup}partition@2QSPI.U-BOOT-SPL_OS}partition@3QSPI.U_BOOT_ENV}partition@4QSPI.U-BOOT-ENV.backup}partition@5 QSPI.KERNEL}partition@6QSPI.FILESYSTEM}mhdq@48347000ti,am4372-hdq}H4p Ffckhdq1w*okaydefaultGdss@4832a000 ti,omap3-dss}H2*ok dss_coreHfckdefaultIdispc@4832a400ti,omap3-dispc}H2  dss_dispcHfckrfbi@4832a800ti,omap3-rfbi}H2 dss_rfbiHfck *disabledportendpoint@0]JmRRocmcram@40300000 mmio-sram}@0can@481cc000 ti,am4372-d_canti,am3352-d_cand_can0Kfck}H  xLD 4 *disabledcan@481d0000 ti,am4372-d_canti,am3352-d_cand_can1Mfck}H  xLD 1 *disabledvpfe@48326000ti,am437x-vpfe}H2`  0vpfe0 *disabledvpfe@48328000ti,am437x-vpfe}H2  2vpfe1*okaydefaultsleepN@Oportendpointfixedregulator-sdregulator-fixed vmmcsd_fixed2Z2Z--display'osddisplays,osd057T0559-34tspanel-dpilcddefaultP Qpanel-timing@  & 0:portendpoint]RJJmatrix_keypad@0gpio-matrix-keypadJ\0n/ / //0xS S QQ@   gjlibacklightpwm-backlightTP$358>Ke #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0ethernet0ethernet1display0device_typeregclocksclock-namesclock-latencyinterrupt-controller#interrupt-cellslinux,phandlecache-unifiedcache-levelrangesti,hwmodsinterrupts#clock-cellsclock-frequencyti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,set-rate-parentclock-multclock-divti,bit-shiftti,clock-multti,clock-divti,dividerspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmgpio-controller#gpio-cells#hwlock-cellspinctrl-namespinctrl-0regulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onpagesizeattb-gpiotouchscreen-size-xtouchscreen-size-yti,dual-voltti,needs-special-resetdmasdma-namesvmmc-supplybus-widthcd-gpioscpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftpinctrl-1bus_freqmac-addressphy_idphy-modereg-namesrmii-clock-ext#pwm-cells#io-channel-cellsti,adc-channelsinterrupt-namesgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optti,elm-idnand-bus-widthgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wait-pingpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wait-monitoring-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelctrl-module#phy-cellsutmi-modephysphy-namesmaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkspi-max-frequencyspi-cpolspi-cphaspi-tx-bus-widthspi-rx-bus-widthremote-endpointdata-linessyscon-raminitti,am437x-vpfe-interfacehsync-activevsync-activeenable-active-highenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lende-activepixelclk-activedebounce-delay-mscol-scan-delay-usrow-gpioscol-gpioslinux,keymappwmsbrightness-levelsdefault-brightness-level