y8(]"digilent,zynq-zyboxlnx,zynq-7000&Zynq ZYBO Development Boardchosen",console=ttyPS0,115200 earlyprintkaliasesmemory5memoryA cpuscpu@0arm,cortex-a95cpuAELZf ,+B@B@cpu@1arm,cortex-a95cpuAEpmuarm,cortex-a9-pmuwA0fixedregulator@0regulator-fixedVCCPINTB@B@amba simple-busadc@f8007100xlnx,zynq-xadc-1.00.aAq  wE can@e0008000xlnx,zynq-can-1.0  disabledE$ can_clkpclkA w @.@can@e0009000xlnx,zynq-can-1.0  disabledE% can_clkpclkA w3 @.@gpio@e000a000xlnx,zynq-gpio-1.0<E*H wAi2c@e0004000cdns,i2c-r1p10  disabledE& wA@i2c@e0005000cdns,i2c-r1p10  disabledE' w0APinterrupt-controller@f8f01000arm,cortex-a9-gicXiAcache-controller@f8f02000arm,pl310-cacheA  ~ memory-controller@f8006000xlnx,zynq-ddrc-a05A`serial@e0000000xlnx,xuartpscdns,uart-r1p8  disabledE(uart_clkpclkA wserial@e0001000xlnx,xuartpscdns,uart-r1p8 okayE)uart_clkpclkA w2spi@e0006000xlnx,zynq-spi-r1p6A`  disabled wE" ref_clkpclkspi@e0007000xlnx,zynq-spi-r1p6Ap  disabled w1E# ref_clkpclkethernet@e000b000 cdns,gemA okay wE pclkhclktx_clk rgmii-idethernet-phy@0Aethernet@e000c000 cdns,gemA  disabled w-Epclkhclktx_clksdhci@e0100000arasan,sdhci-8.9a okayclk_xinclk_ahbE  wAsdhci@e0101000arasan,sdhci-8.9a  disabledclk_xinclk_ahbE! w/Aslcr@f8000000!xlnx,zynq-slcrsysconsimple-busAclkc@100xlnx,ps7-clkcjarmpllddrplliopllcpu_6or4xcpu_3or2xcpu_2xcpu_1xddr2xddr3xdcilqspismcpcapgem0gem1fclk0fclk1fclk2fclk3can0can1sdio0sdio1uart0uart1spi0spi1dmausb0_aperusb1_apergem0_apergem1_apersdio0_apersdio1_aperspi0_aperspi1_apercan0_apercan1_aperi2c0_aperi2c1_aperuart0_aperuart1_apergpio_aperlqspi_apersmc_aperswdtdbg_trcdbg_apbApinctrl@700xlnx,pinctrl-zynqA dmac@f8003000arm,pl330arm,primecellA0.abortdma0dma1dma2dma3dma4dma5dma6dma7lw ()*+!,:E apb_pclkdevcfg@f8007000xlnx,zynq-devcfg-1.0Aptimer@f8f00200arm,cortex-a9-global-timerA  w Etimer@f8001000$w    cdns,ttcEAtimer@f8002000$w%&' cdns,ttcEA timer@f8f00600 w arm,cortex-a9-twd-timerA Eusb@e0002000"xlnx,zynq-usb-2.20achipidea,usb2  disabledE wA Hulpiusb@e0003000"xlnx,zynq-usb-2.20achipidea,usb2  disabledE w,A0Hulpiwatchdog@f8005000E-cdns,wdt-r1p2 w APQ  #address-cells#size-cellscompatiblemodelbootargsdevice_typeregclocksclock-latencycpu0-supplyoperating-pointsinterruptsinterrupt-parentregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onlinux,phandlerangesstatusclock-namestx-fifo-depthrx-fifo-depth#gpio-cellsgpio-controller#interrupt-cellsinterrupt-controllerarm,data-latencyarm,tag-latencycache-unifiedcache-levelphy-modephy-handle#clock-cellsfclk-enableclock-output-namesps-clk-frequencysysconinterrupt-names#dma-cells#dma-channels#dma-requestsphy_typetimeout-sec