Ð þí:86˜(€6` ,HSG H7022hsg,h702allwinner,sun5i-a13chosen=framebuffer@002allwinner,simple-framebuffersimple-framebuffer Dde_be0-lcd0W$, ^disabledaliasese/soc@01c00000/serial@01c28400memorymmemoryy@ cpuscpu@0mcpu2arm,cortex-a8yW}¹°0‹a€\À ꀙp /Ö …€O€ÊO€—€O€œ«½ÏÚàthermal-zonescpu_thermalèúþè cooling-mapsmap0 !ÿÿÿÿÿÿÿÿtripscpu_alert00 øP<ÐtpassiveÚàcpu_crit0† <Ð tcriticalclocks=dummyG 2fixed-clockTÚ à clk@01c20050G2allwinner,sun4i-a10-osc-clkyÂPTn6dosc24MÚ à clk@0G 2fixed-clockT€dosc32kÚ à clk@01c20000G2allwinner,sun4i-a10-pll1-clkyÂW dpll1Ú à clk@01c20018G2allwinner,sun4i-a10-pll1-clkyÂW dpll4clk@01c20020G2allwinner,sun4i-a10-pll5-clky W dpll5_ddrpll5_otherÚàclk@01c20028G2allwinner,sun4i-a10-pll6-clkyÂ(W dpll6_satapll6_otherpll6Úàcpu@01c20054G2allwinner,sun4i-a10-cpu-clkyÂTW dcpuÚàaxi@01c20054G2allwinner,sun4i-a10-axi-clkyÂTWdaxiÚ à clk@01c2005cG"2allwinner,sun4i-a10-axi-gates-clkyÂ\W  daxi_dramahb@01c20054G2allwinner,sun4i-a10-ahb-clkyÂTW dahbÚàclk@01c20060G"2allwinner,sun5i-a13-ahb-gates-clkyÂ`WÈdahb_usbotgahb_ehciahb_ohciahb_ssahb_dmaahb_bistahb_mmc0ahb_mmc1ahb_mmc2ahb_nandahb_sdramahb_spi0ahb_spi1ahb_spi2ahb_stimerahb_veahb_lcdahb_csiahb_de_beahb_de_feahb_iepahb_mali400Úàapb0@01c20054G2allwinner,sun4i-a10-apb0-clkyÂTWdapb0Úàclk@01c20068G#2allwinner,sun5i-a13-apb0-gates-clkyÂhWdapb0_codecapb0_pioapb0_irÚàclk@01c20058G2allwinner,sun4i-a10-apb1-clkyÂXW  dapb1Úàclk@01c2006cG#2allwinner,sun5i-a13-apb1-gates-clkyÂlW4dapb1_i2c0apb1_i2c1apb1_i2c2apb1_uart1apb1_uart3Ú à clk@01c20080G2allwinner,sun4i-a10-mod0-clky€W dnandclk@01c20084G2allwinner,sun4i-a10-mod0-clky„W dmsclk@01c20088G2allwinner,sun4i-a10-mmc-clkyˆW dmmc0mmc0_outputmmc0_sampleÚàclk@01c2008cG2allwinner,sun4i-a10-mmc-clkyÂŒW dmmc1mmc1_outputmmc1_sampleclk@01c20090G2allwinner,sun4i-a10-mmc-clkyÂW dmmc2mmc2_outputmmc2_sampleÚàclk@01c20098G2allwinner,sun4i-a10-mod0-clky˜W dtsclk@01c2009cG2allwinner,sun4i-a10-mod0-clkyÂœW dssclk@01c200a0G2allwinner,sun4i-a10-mod0-clky W dspi0Úàclk@01c200a4G2allwinner,sun4i-a10-mod0-clky¤W dspi1Úàclk@01c200a8G2allwinner,sun4i-a10-mod0-clky¨W dspi2Úàclk@01c200b0G2allwinner,sun4i-a10-mod0-clky°W dir0clk@01c200ccGw2allwinner,sun5i-a13-usb-clkyÂÌWdusb_ohci0usb_phyÚàclk@01c2015cG2allwinner,sun5i-a13-mbus-clkyÂ\W dmbussoc@01c00000 2simple-bus=dma-controller@01c020002allwinner,sun4i-a10-dmayÀ „WÚàspi@01c050002allwinner,sun4i-a10-spiyÀP„  Wšahbmod¦«rxtx ^disabledspi@01c060002allwinner,sun4i-a10-spiyÀ`„  Wšahbmod¦ «rxtx ^disabledmmc@01c0f0002allwinner,sun5i-a13-mmcyÀð Wšahbmmcoutputsample„ ^okayµdefaultÃÍÙãìmmc@01c110002allwinner,sun5i-a13-mmcyÁ W šahbmmcoutputsample„" ^disabledphy@01c13400ø2allwinner,sun5i-a13-usb-phyyÁ4ÁHphy_ctrlpmu1Wšusb_phy usb0_resetusb1_reset^okay Úàusb@01c14000&2allwinner,sun5i-a13-ehcigeneric-ehciyÁ@„'W16usb^okayusb@01c14400&2allwinner,sun5i-a13-ohcigeneric-ohciyÁD„(W16usb^okayspi@01c170002allwinner,sun4i-a10-spiyÁp„  Wšahbmod¦«rxtx ^disabledinterrupt-controller@01c204002allwinner,sun4i-a10-icyÂ@UÚàpinctrl@01c208002allwinner,sun5i-a13-pinctrly„Wf@UvÚàuart1@0 ‚PE10PE11‘uart1¤´uart1@1‚PG3PG4‘uart1¤´Ú!à!i2c0@0‚PB0PB1‘i2c0¤´Ú"à"i2c1@0 ‚PB15PB16‘i2c1¤´Ú#à#i2c2@0 ‚PB17PB18‘i2c2¤´Ú$à$mmc0@0‚PF0PF1PF2PF3PF4PF5‘mmc0¤´Úàahci_pwr_pin@0‚PB8 ‘gpio_out¤´Ú%à%usb0_vbus_pin@0‚PB9 ‘gpio_out¤´Ú&à&usb1_vbus_pin@0‚PH6 ‘gpio_out¤´Ú'à'usb2_vbus_pin@0‚PH3 ‘gpio_out¤´Ú(à(mmc0_cd_pin@0‚PG0‘gpio_in¤´Úàtimer@01c20c002allwinner,sun4i-a10-timery „W watchdog@01c20c902allwinner,sun4i-a10-wdty lradc@01c228002allwinner,sun4i-a10-lradc-keysyÂ(„ ^disabledeeprom@01c238002allwinner,sun4i-a10-sidyÂ8rtp@01c250002allwinner,sun4i-a10-tsyÂP„ÃÚàserial@01c284002snps,dw-apb-uarty„„ÙãW ^okayµdefaultÃ!serial@01c28c002snps,dw-apb-uartyÂŒ„ÙãW  ^disabledi2c@01c2ac0002allwinner,sun5i-a13-i2callwinner,sun4i-a10-i2cy¬„W ^okayµdefaultÃ"pmic@34y4„2x-powers,axp209@UregulatorsðÜdcdc2vdd-cpu&B@>ã`Úàdcdc3 vdd-int-dll&B@>\Àldo1&Ö >Ö vdd-rtcldo2avcc&-ÆÀ>-ÆÀldo3 vcc-wifi&2Z >2Z Úàldo4ldo4ldo5ldo5i2c@01c2b00002allwinner,sun5i-a13-i2callwinner,sun4i-a10-i2cy°„W ^okayµdefaultÃ#rtc@51 2nxp,pcf8563yQi2c@01c2b40002allwinner,sun5i-a13-i2callwinner,sun4i-a10-i2cy´„ W ^okayµdefaultÃ$timer@01c600002allwinner,sun5i-a13-hstimeryÆ„RSWahci-5v2regulator-fixedµdefaultÃ%ahci-5v&LK@>LK@Vh{ ^disabledusb0-vbus2regulator-fixedµdefaultÃ& usb0-vbus&LK@>LK@h{  ^disabledusb1-vbus2regulator-fixedµdefaultÃ' usb1-vbus&LK@>LK@h{ ^disabledusb2-vbus2regulator-fixedµdefaultÃ( usb2-vbus&LK@>LK@h{ ^disabledvcc3v02regulator-fixedvcc3v0&-ÆÀ>-ÆÀvcc3v32regulator-fixedvcc3v3&2Z >2Z Úàvcc5v02regulator-fixedvcc5v0&LK@>LK@ #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesallwinner,pipelineclocksstatusserial0device_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levelcpu-supplylinux,phandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-frequencyclock-output-names#reset-cellsinterrupts#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-inverted#phy-cellsreg-namesresetsreset-namesusb1_vbus-supplyphysphy-namesinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#thermal-sensor-cellsreg-shiftreg-io-widthx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpio