p\8j(j'firefly,firefly-rk3288rockchip,rk3288&7Firefly-RK3288chosenaliases=/i2c@ff650000B/i2c@ff140000G/i2c@ff660000L/i2c@ff150000Q/i2c@ff160000V/i2c@ff170000[/dwmmc@ff0f0000a/dwmmc@ff0c0000g/dwmmc@ff0d0000m/dwmmc@ff0e0000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemorycpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 @ 2#2cpu@501cpuarm,cortex-a12cpu@502cpuarm,cortex-a12cpu@503cpuarm,cortex-a12amba arm,amba-bus+dma-controller@ff250000arm,pl330arm,primecell%@2=  Hapb_pclk#dma-controller@ff600000arm,pl330arm,primecell`@2=  Hapb_pclk Tdisableddma-controller@ffb20000arm,pl330arm,primecell@2=  Hapb_pclkB#Boscillator fixed-clock[n6kxin24m~#timerarm,armv7-timer02   [n6timer@ff810000rockchip,rk3288-timer  2H  a Htimerpclkdisplay-subsystemrockchip,display-subsystemdwmmc@ff0c0000rockchip,rk3288-dw-mshcр DHbiuciu 2  @Tokay'default5 ? dwmmc@ff0d0000rockchip,rk3288-dw-mshcр EHbiuciu 2! @TokayKU'default 5 ?dwmmc@ff0e0000rockchip,rk3288-dw-mshcр FHbiuciu 2"@ Tdisableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр GHbiuciu 2#@TokayKU'default5?csaradc@ff100000rockchip,saradc 2$p I[Hsaradcapb_pclkTokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi ARHspiclkapb_pclk  txrx 2,'default5Tokayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi BSHspiclkapb_pclk txrx 2-'default5  Tdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi CTHspiclkapb_pclktxrx 2.'default5!"#$ Tdisabledi2c@ff140000rockchip,rk3288-i2c 2>Hi2c M'default5%Tokayi2c@ff150000rockchip,rk3288-i2c 2?Hi2c O'default5& Tdisabledi2c@ff160000rockchip,rk3288-i2c 2@Hi2c P'default5'Tokayi2c@ff170000rockchip,rk3288-i2c 2AHi2c Q'default5(TokayH#Hserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 27 MUHbaudclkapb_pclk'default 5)*+Tokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 28 NVHbaudclkapb_pclk'default5,Tokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 29 OWHbaudclkapb_pclk'default5-Tokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart 2: PXHbaudclkapb_pclk'default5.Tokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart 2; QYHbaudclkapb_pclk'default5/ Tdisabledthermal-zonesreserve_thermal0cpu_thermal0tripscpu_alert0ppassive1#1cpu_crit_ criticalcooling-mapsmap01 2gpu_thermal0tripsgpu_alert0ppassive3#3gpu_crit_ criticalcooling-mapsmap03 2tsadc@ff280000rockchip,rk3288-tsadc( 2% HZHtsadcapb_pclk tsadc-apb'default545s Tdisabled0#0ethernet@ff290000rockchip,rk3288-gmac) 2Lmacirq\58 fgc]MHstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac Tdisabledusb@ff500000 generic-ehciP 2 Husbhost Tdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2 HotgTokay'default56usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2 HotgTokayusb@ff5c0000 generic-ehci\ 2 Husbhost Tdisabledi2c@ff650000rockchip,rk3288-i2ce 2<Hi2c L'default57Tokay[syr827@40silergy,syr827i@vdd_cpu Pp8#syr828@41silergy,syr828iAvdd_gpu Pp8hym8563@51haoyu,hym8563Q~[kxin32k&92'default5:act8846@5aactive-semi,act8846Z'default5;<regulatorsREG1vcc_ddrOOREG2vcc_io2Z2Z#REG3vdd_logREG4vcc_20REG5 vccio_sd2Z2ZREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2ZREG9vcc_lan2Z2ZREG10vdd_10B@B@REG11vcc_18w@w@#REG12 vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2cf 2=Hi2c N'default5=Tokaypwm@ff680000rockchip,rk3288-pwmh'default5> ^Hpwm Tdisabledpwm@ff680010rockchip,rk3288-pwmh'default5? ^HpwmTokaypwm@ff680020rockchip,rk3288-pwmh 'default5@ ^Hpwm Tdisabledpwm@ff680030rockchip,rk3288-pwmh0'default5A ^Hpwm Tdisabledbus_intmem@ff700000 mmio-sramp +psmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000rockchip,rk3288-pmusyscons#syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv\5~H&jk$6#gׄeрxhрxh#syscon@ff770000rockchip,rk3288-grfsysconw5#5watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt p 2oTokayi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 2UBBtxrxHi2s_hclki2s_clk R'default5C Tdisabledvop@ff930000rockchip,rk3288-vop 2 Haclk_vopdclk_vophclk_vopdef axiahbdclkKDTokayport#endpoint@0REI#Iiommu@ff930300rockchip,iommu 2 Lvopb_mmubTokayD#Dvop@ff940000rockchip,rk3288-vop 2 Haclk_vopdclk_vophclk_vop axiahbdclkKFTokayport#endpoint@0RGJ#Jiommu@ff940300rockchip,iommu 2 Lvopl_mmubTokayF#Fhdmi@ff980000rockchip,rk3288-dw-hdmi\5 2g hm HiahbisfrTokayoHportsportendpoint@0RIE#Eendpoint@1RJG#Ginterrupt-controller@ffc01000 arm,gic-400{  @ `  2 #pinctrlrockchip,rk3288-pinctrl\5+gpio0@ff750000rockchip,gpio-banku 2Q @{Q#Qgpio1@ff780000rockchip,gpio-bankx 2R A{gpio2@ff790000rockchip,gpio-banky 2S B{gpio3@ff7a0000rockchip,gpio-bankz 2T C{gpio4@ff7b0000rockchip,gpio-bank{ 2U D{gpio5@ff7c0000rockchip,gpio-bank| 2V E{gpio6@ff7d0000rockchip,gpio-bank} 2W F{gpio7@ff7e0000rockchip,gpio-bank~ 2X G{9#9gpio8@ff7f0000rockchip,gpio-bank 2Y H{S#Spcfg-pull-upL#Lpcfg-pull-downpcfg-pull-noneK#Kpcfg-pull-none-12ma M#Msleepglobal-pwroffKddrio-pwroffKddr0-retentionLddr1-retentionLi2c0i2c0-xfer KK7#7i2c1i2c1-xfer KK%#%i2c2i2c2-xfer  K K=#=i2c3i2c3-xfer KK&#&i2c4i2c4-xfer KK'#'i2c5i2c5-xfer KK(#(i2s0i2s0-bus`KKKKKKC#Csdmmcsdmmc-clkK#sdmmc-cmdL # sdmcc-cdL # sdmmc-bus1Lsdmmc-bus4@LLLL # sdmmc-pwr KV#Vsdio0sdio0-bus1Lsdio0-bus4@LLLL # sdio0-cmdL#sdio0-clkK#sdio0-cdLsdio0-wpLsdio0-pwrLsdio0-bkpwrLsdio0-intLsdio1sdio1-bus1Lsdio1-bus4@LLLLsdio1-cdLsdio1-wpLsdio1-bkpwrLsdio1-intLsdio1-cmdLsdio1-clkKsdio1-pwr Lemmcemmc-clkK#emmc-cmdL#emmc-pwr L#emmc-bus1Lemmc-bus4@LLLLemmc-bus8LLLLLLLL#spi0spi0-clk L#spi0-cs0 L#spi0-txL#spi0-rxL#spi0-cs1L#spi1spi1-clk L#spi1-cs0 L # spi1-rxL#spi1-txL#spi2spi2-cs1Lspi2-clkL!#!spi2-cs0L$#$spi2-rxL###spi2-tx L"#"uart0uart0-xfer LK)#)uart0-ctsK*#*uart0-rtsK+#+uart1uart1-xfer L K,#,uart1-cts Kuart1-rts Kuart2uart2-xfer LK-#-uart3uart3-xfer LK.#.uart3-cts Kuart3-rts Kuart4uart4-xfer  L K/#/uart4-ctsKuart4-rtsKtsadcotp-out K4#4pwm0pwm0-pinK>#>pwm1pwm1-pinK?#?pwm2pwm2-pinK@#@pwm3pwm3-pinKA#Agmacrgmii-pinsKKKKMMMMKKK MMKKrmii-pinsKKKKKKKKKKphy-int Lphy-pmebLphy-rstNpcfg-output-highN#Npcfg-output-lowO#Oact8846pwr-holdN<#<pmic-vselO;#;hym8563rtc-intL:#:keyspwr-keyLR#Rledspower-ledKU#Uwork-ledKT#Tusb_hosthost-vbus-drvKW#Wusbhub-rstN6#6usb_otgotg-vbus-drv KY#Yirir-intLP#Pexternal-gmac-clock fixed-clock~[sY@ kext_gmacir-receivergpio-ir-receiver'default5P 9gpio-keys gpio-keysbutton@0  Q 0GPIO Power6t'default5Rleds gpio-ledswork S0firefly:blue:user Arc-feedback'default5Tpower S0firefly:green:power Adefault-on'default5Uvsys-regulatorregulator-fixedvcc_sysLK@LK@8#8sdmmc-regulatorregulator-fixed W9 'default5Vvcc_sd2Z2Z\ # flash-regulatorregulator-fixed vcc_flashw@w@#usb-regulatorregulator-fixedvcc_5vLK@LK@8X#Xusb-host-regulatorregulator-fixedm WQ'default5W vcc_host_5vLK@LK@Xusb-otg-regulatorregulator-fixedm WQ 'default5Y vcc_otg_5vLK@LK@X #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typeregenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandlerangesinterrupts#dma-cellsclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplybroken-cdnon-removablevqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-names#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplysystem-power-controller#pwm-cells#reset-cellsassigned-clocksassigned-clock-ratesiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsoutput-highoutput-lowgpiosgpio-key,wakeuplabellinux,codelinux,default-triggergpiostartup-delay-usenable-active-high