8(Qualcomm APQ8084/IFC6540"!qcom,apq8084-ifc6540qcom,apq8084,chosenaliasesmemory=memoryIcpuscpu@0=cpu !qcom,kraitIMqcom,kpss-acc-v2[lcpu@1=cpu !qcom,kraitIMqcom,kpss-acc-v2[lcpu@2=cpu !qcom,kraitIMqcom,kpss-acc-v2[lcpu@3=cpu !qcom,kraitIMqcom,kpss-acc-v2[ll2-cache!qcom,arch-cacheucpu-pmu!qcom,krait-pmu timer!arm,armv7-timer0$soc !simple-businterrupt-controller@f9000000!qcom,msm-qgic2I timer@f9020000!arm,armv7-timer-memI$frame@f9021000I frame@f9023000 I0 disabledframe@f9024000 I@ disabledframe@f9025000 IP disabledframe@f9026000 I` disabledframe@f9027000 Ip disabledframe@f9028000 I disabledregulator@f9012000 !qcom,saw2I clock-controller@f9088000!qcom,kpss-acc-v2Iclock-controller@f9098000!qcom,kpss-acc-v2I clock-controller@f90a8000!qcom,kpss-acc-v2I clock-controller@f90b8000!qcom,kpss-acc-v2I restart@fc4ab000 !qcom,psholdIJclock-controller@fc400000!qcom,gcc-apq8084 I@@pinctrl@fd510000!qcom,apq8084-pinctrlIQ@(   serial@f995e000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmI r4~ ;coreifaceokaysdhci@f9824900!qcom,sdhci-msm-v4II@Ghc_memcore_mem{Qhc_irqpwr_irq4 ;coreifaceokayaksdhci@f98a4900!qcom,sdhci-msm-v4II@Ghc_memcore_mem}Qhc_irqpwr_irq4 ;coreiface disabled y za #address-cells#size-cellsmodelcompatibleinterrupt-parentdevice_typeregenable-methodnext-level-cacheqcom,acccache-levelqcom,sawlinux,phandleinterruptsclock-frequencyrangesinterrupt-controller#interrupt-cellsframe-numberstatusregulator#clock-cells#reset-cellsgpio-controller#gpio-cellsclocksclock-namesreg-namesinterrupt-namesbus-widthnon-removablecd-gpios