Ð þí“8Ø(» Qualcomm APQ8074 Dragonboard&!qcom,apq8074-dragonboardqcom,apq8074,chosenaliasesmemory=memoryIcpus M cpu@0 !qcom,kraitXqcom,kpss-acc-v2=cpuIfwcpu@1 !qcom,kraitXqcom,kpss-acc-v2=cpuIfwcpu@2 !qcom,kraitXqcom,kpss-acc-v2=cpuIfwcpu@3 !qcom,kraitXqcom,kpss-acc-v2=cpuIfwl2-cache!cache€Œ•›cpu-pmu!qcom,krait-pmu Mtimer!arm,armv7-timer0M£$øsoc³ !simple-businterrupt-controller@f9000000!qcom,msm-qgic2ºÏIùù •›timer@f9020000³!arm,armv7-timer-memIù£$øframe@f9021000àMIùù frame@f9023000à M Iù0 ídisabledframe@f9024000à M Iù@ ídisabledframe@f9025000à M IùP ídisabledframe@f9026000à M Iù` ídisabledframe@f9027000à M Iùp ídisabledframe@f9028000à MIù€ ídisabledregulator@f9012000 !qcom,saw2Iù ô•›clock-controller@f9088000!qcom,kpss-acc-v2Iù€ù€•›clock-controller@f9098000!qcom,kpss-acc-v2Iù €ù€•›clock-controller@f90a8000!qcom,kpss-acc-v2Iù €ù€•›clock-controller@f90b8000!qcom,kpss-acc-v2Iù €ù€•›restart@fc4ab000 !qcom,psholdIüJ°clock-controller@fc400000!qcom,gcc-msm8974þ Iü@@•›clock-controller@fd8c0000!qcom,mmcc-msm8974þ IýŒ`serial@f991e000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmIù‘à MlgW coreifaceíoksdhci@f9824900!qcom,sdhci-msm-v4Iù‚Iù‚@+hc_memcore_memM{Š5hc_irqpwr_irqØ× coreifaceíokEOsdhci@f98a4900!qcom,sdhci-msm-v4IùŠIùŠ@+hc_memcore_memM}Ý5hc_irqpwr_irqÛÚ coreiface ídisabled ] >Erng@f9bff000 !qcom,prngIù¿ðÃcorepinctrl@fd510000!qcom,msm8974-pinctrlIýQ@fvºÏ MЕ › i2c11• › mux‚gpio83gpio84 ‡blsp_i2c11spi8_defaultmosi‚gpio45 ‡blsp_spi8miso‚gpio46 ‡blsp_spi8cs‚gpio47 ‡blsp_spi8clk‚gpio48 ‡blsp_spi8i2c@f9967000íokay!qcom,i2c-qup-v2.1.1Iù–p Mi{q coreiface£ @ šdefaulteeprom@52 !atmel,24c128IR¨ ± #address-cells#size-cellsmodelcompatibleinterrupt-parentdevice_typereginterruptsenable-methodnext-level-cacheqcom,acccache-levelqcom,sawlinux,phandleclock-frequencyrangesinterrupt-controller#interrupt-cellsframe-numberstatusregulator#clock-cells#reset-cellsclocksclock-namesreg-namesinterrupt-namesbus-widthnon-removablecd-gpiosgpio-controller#gpio-cellspinsfunctionpinctrl-0pinctrl-namespagesizeread-only