Ð þíá 8×`( ©×("ti,omap4-sdpti,omap4430ti,omap4&7TI OMAP4 SDP boardchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@48350000Q/ocp/serial@4806a000Y/ocp/serial@4806c000a/ocp/serial@48020000i/ocp/serial@4806e000+q/ocp/dss@58000000/encoder@58004000/display+z/ocp/dss@58000000/encoder@58005000/display ƒ/connector@0memoryŒmemory˜€@cpuscpu@0arm,cortex-a9Œcpuœ˜­´cpuÀ“à Γà£è 'ÀO€ 5èa€ûßñ¬¬cpu@1arm,cortex-a9Œcpuœ˜interrupt-controller@48241000arm,cortex-a9-gic 5˜H$H$l2-cache-controller@48242000arm,pl310-cache˜H$ FTlocal-timer@48240600arm,cortex-a9-twd-timer­˜H$  ` socti,omap-inframpu ti,omap4-mpukmpuudsp ti,omap3-c64kdspiva ti,ivahdkivaocpti,omap4-l3-nocsimple-buszkl3_main_1l3_main_2l3_main_3˜DD€ E`  cm1@4a004000 ti,omap4-cm1˜J@ clocksextalt_clkin_ck fixed-clockŽ„DÀHHpad_clks_src_ck fixed-clockŽ·pad_clks_ckti,gate-clock­ž˜%%pad_slimbus_core_clks_ck fixed-clockŽ·TTsecure_32k_clk_src_ck fixed-clockŽ€slimbus_src_clk fixed-clockŽ·slimbus_clkti,gate-clock­ž ˜&&sys_32k_ck fixed-clockŽ€++virt_12000000_ck fixed-clockŽ·,,virt_13000000_ck fixed-clockŽÆ]@--virt_16800000_ck fixed-clockŽY..virt_19200000_ck fixed-clockŽ$ø//virt_26000000_ck fixed-clockŽŒº€00virt_27000000_ck fixed-clockŽ›üÀ11virt_38400000_ck fixed-clockŽIð22tie_low_clock_ck fixed-clockŽ77utmi_phy_clkout_ck fixed-clockŽ“‡[[xclk60mhsp1_ck fixed-clockŽ“‡WWxclk60mhsp2_ck fixed-clockŽ“‡YYxclk60motg_ck fixed-clockŽ“‡\\dpll_abe_ckti,omap4-dpll-m4xen-clock­ ˜àäìè  dpll_abe_x2_ckti,omap4-dpll-x2-clock­ ˜ð  dpll_abe_m2x2_ckti,divider-clock­ «¶˜ðÈß  abe_24m_fclkfixed-factor-clock­ ö!!abe_clkti,divider-clock­ «˜   aess_fclkti,divider-clock­ ž«˜(dpll_abe_m3x2_ckti,divider-clock­ «¶˜ôÈßcore_hsd_byp_clk_mux_ck ti,mux-clock­ž˜,dpll_core_ckti,omap4-dpll-core-clock­˜ $,(dpll_core_x2_ckti,omap4-dpll-x2-clock­dpll_core_m6x2_ckti,divider-clock­«¶˜@Èß66dpll_core_m2_ckti,divider-clock­«¶˜0Èßddrphy_ckfixed-factor-clock­ödpll_core_m5x2_ckti,divider-clock­«¶˜<Èßdiv_core_ckti,divider-clock­˜«div_iva_hs_clkti,divider-clock­«˜Ü div_mpu_hs_clkti,divider-clock­«˜œ dpll_core_m4x2_ckti,divider-clock­«¶˜8Èßdll_clk_div_ckfixed-factor-clock­ödpll_abe_m2_ckti,divider-clock­ «˜ðÈ  dpll_core_m3x2_gate_ck ti,composite-no-wait-gate-clock­ž˜4dpll_core_m3x2_div_ckti,composite-divider-clock­«˜4Èdpll_core_m3x2_ckti,composite-clock­``dpll_core_m7x2_ckti,divider-clock­«¶˜DÈßKKiva_hsd_byp_clk_mux_ck ti,mux-clock­ž˜¬dpll_iva_ckti,omap4-dpll-clock­˜ ¤¬¨dpll_iva_x2_ckti,omap4-dpll-x2-clock­dpll_iva_m4x2_ckti,divider-clock­«¶˜¸Èßdpll_iva_m5x2_ckti,divider-clock­«¶˜¼Èßdpll_mpu_ckti,omap4-dpll-clock­˜`dlhdpll_mpu_m2_ckti,divider-clock­«¶˜pÈßper_hs_clk_div_ckfixed-factor-clock­ö<<usb_hs_clk_div_ckfixed-factor-clock­öBBl3_div_ckti,divider-clock­ž«˜l4_div_ckti,divider-clock­ž«˜^^lp_clk_div_ckfixed-factor-clock­ ö33mpu_periphclkfixed-factor-clock­öocp_abe_iclkti,divider-clock­ž˜(!per_abe_24m_fclkfixed-factor-clock­ öRRdmic_sync_mux_ck ti,mux-clock ­!"#ž˜8$$func_dmic_abe_gfclk ti,mux-clock ­$%&ž˜8mcasp_sync_mux_ck ti,mux-clock ­!"#ž˜@''func_mcasp_abe_gfclk ti,mux-clock ­'%&ž˜@mcbsp1_sync_mux_ck ti,mux-clock ­!"#ž˜H((func_mcbsp1_gfclk ti,mux-clock ­(%&ž˜Hmcbsp2_sync_mux_ck ti,mux-clock ­!"#ž˜P))func_mcbsp2_gfclk ti,mux-clock ­)%&ž˜Pmcbsp3_sync_mux_ck ti,mux-clock ­!"#ž˜X**func_mcbsp3_gfclk ti,mux-clock ­*%&ž˜Xslimbus1_fclk_1ti,gate-clock­#ž ˜`slimbus1_fclk_0ti,gate-clock­!ž˜`slimbus1_fclk_2ti,gate-clock­%ž ˜`slimbus1_slimbus_clkti,gate-clock­&ž ˜`timer5_sync_mux ti,mux-clock­"+ž˜htimer6_sync_mux ti,mux-clock­"+ž˜ptimer7_sync_mux ti,mux-clock­"+ž˜xtimer8_sync_mux ti,mux-clock­"+ž˜€dummy_ck fixed-clockŽclockdomainsprm@4a306000 ti,omap4-prm˜J0`0 ` clockssys_clkin_ck ti,mux-clock­,-./012˜Èabe_dpll_bypass_clk_mux_ck ti,mux-clock­+ž˜  abe_dpll_refclk_mux_ck ti,mux-clock­+˜ dbgclk_mux_ckfixed-factor-clock­öl4_wkup_clk_mux_ck ti,mux-clock­3˜UUsyc_clk_div_ckti,divider-clock­˜«""gpio1_dbclkti,gate-clock­+ž˜8dmt1_clk_mux ti,mux-clock­+ž˜@usim_ckti,divider-clock­4ž˜X!55usim_fclkti,gate-clock­5ž˜Xpmd_stm_clock_mux_ck ti,mux-clock ­67ž˜ 88pmd_trace_clk_mux_ck ti,mux-clock ­67ž˜ 99stm_clk_div_ckti,divider-clock­8ž«@˜  trace_clk_div_div_ckti,divider-clock­9ž˜ !::trace_clk_div_ckti,clkdm-gate-clock­:;;bandgap_fclkti,gate-clock­+ž˜ˆclockdomainsemu_sys_clkdmti,clockdomain­;cm2@4a008000 ti,omap4-cm2˜J€0clocksper_hsd_byp_clk_mux_ck ti,mux-clock­<ž˜L==dpll_per_ckti,omap4-dpll-clock­=˜@DLH>>dpll_per_m2_ckti,divider-clock­>«˜PÈFFdpll_per_x2_ckti,omap4-dpll-x2-clock­>˜P??dpll_per_m2x2_ckti,divider-clock­?«¶˜PÈßEEdpll_per_m3x2_gate_ck ti,composite-no-wait-gate-clock­?ž˜T@@dpll_per_m3x2_div_ckti,composite-divider-clock­?«˜TÈAAdpll_per_m3x2_ckti,composite-clock­@Aaadpll_per_m4x2_ckti,divider-clock­?«¶˜XÈß44dpll_per_m5x2_ckti,divider-clock­?«¶˜\ÈßIIdpll_per_m6x2_ckti,divider-clock­?«¶˜`ÈßDDdpll_per_m7x2_ckti,divider-clock­?«¶˜dÈßLLdpll_usb_ckti,omap4-dpll-j-type-clock­B˜€„ŒˆCCdpll_usb_clkdcoldo_ckti,fixed-factor-clock­C-¶˜´:ßdpll_usb_m2_ckti,divider-clock­C«¶˜ÈßGGducati_clk_mux_ck ti,mux-clock­D˜func_12m_fclkfixed-factor-clock­Eöfunc_24m_clkfixed-factor-clock­Fö##func_24mc_fclkfixed-factor-clock­EöSSfunc_48m_fclkti,divider-clock­E˜!QQfunc_48mc_fclkfixed-factor-clock­EöJJfunc_64m_fclkti,divider-clock­4˜!PPfunc_96m_fclkti,divider-clock­E˜!MMinit_60m_fclkti,divider-clock­G˜!VVper_abe_nc_fclkti,divider-clock­ ˜«NNaes1_fckti,gate-clock­ž˜ aes2_fckti,gate-clock­ž˜¨dss_sys_clkti,gate-clock­"ž ˜ ¡¡dss_tv_clkti,gate-clock­Hž ˜   dss_dss_clkti,gate-clock­Iž˜ HŸŸdss_48mhz_clkti,gate-clock­Jž ˜ §§fdif_fckti,divider-clock­4ž«˜( gpio2_dbclkti,gate-clock­+ž˜`gpio3_dbclkti,gate-clock­+ž˜hgpio4_dbclkti,gate-clock­+ž˜pgpio5_dbclkti,gate-clock­+ž˜xgpio6_dbclkti,gate-clock­+ž˜€sgx_clk_mux ti,mux-clock­KLž˜ hsi_fckti,divider-clock­Ež«˜8 iss_ctrlclkti,gate-clock­Mž˜ mcbsp4_sync_mux_ck ti,mux-clock­MNž˜àOOper_mcbsp4_gfclk ti,mux-clock­O%ž˜àhsmmc1_fclk ti,mux-clock­PMž˜(hsmmc2_fclk ti,mux-clock­PMž˜0ocp2scp_usb_phy_phy_48mti,gate-clock­Qž˜àsha2md5_fckti,gate-clock­ž˜Èslimbus2_fclk_1ti,gate-clock­Rž ˜8slimbus2_fclk_0ti,gate-clock­Sž˜8slimbus2_slimbus_clkti,gate-clock­Tž ˜8smartreflex_core_fckti,gate-clock­Už˜8smartreflex_iva_fckti,gate-clock­Už˜0smartreflex_mpu_fckti,gate-clock­Už˜(cm2_dm10_mux ti,mux-clock­+ž˜(cm2_dm11_mux ti,mux-clock­+ž˜0cm2_dm2_mux ti,mux-clock­+ž˜8cm2_dm3_mux ti,mux-clock­+ž˜@cm2_dm4_mux ti,mux-clock­+ž˜Hcm2_dm9_mux ti,mux-clock­+ž˜Pusb_host_fs_fckti,gate-clock­Jž˜Ð__utmi_p1_gfclk ti,mux-clock­VWž˜XXXusb_host_hs_utmi_p1_clkti,gate-clock­Xž˜Xutmi_p2_gfclk ti,mux-clock­VYž˜XZZusb_host_hs_utmi_p2_clkti,gate-clock­Zž ˜Xusb_host_hs_utmi_p3_clkti,gate-clock­Vž ˜Xusb_host_hs_hsic480m_p1_clkti,gate-clock­Gž ˜Xusb_host_hs_hsic60m_p1_clkti,gate-clock­Vž ˜Xusb_host_hs_hsic60m_p2_clkti,gate-clock­Vž ˜Xusb_host_hs_hsic480m_p2_clkti,gate-clock­Gž˜Xusb_host_hs_func48mclkti,gate-clock­Jž˜Xusb_host_hs_fckti,gate-clock­Vž˜Xotg_60m_gfclk ti,mux-clock­[\ž˜`]]usb_otg_hs_xclkti,gate-clock­]ž˜`usb_otg_hs_ickti,gate-clock­ž˜`usb_phy_cm_clk32kti,gate-clock­+ž˜@œœusb_tll_hs_usb_ch2_clkti,gate-clock­Vž ˜husb_tll_hs_usb_ch0_clkti,gate-clock­Vž˜husb_tll_hs_usb_ch1_clkti,gate-clock­Vž ˜husb_tll_hs_ickti,gate-clock­^ž˜hclockdomainsl3_init_clkdmti,clockdomain­C_scrm@4a30a000ti,omap4-scrm˜J0  clocksauxclk0_src_gate_ck ti,composite-no-wait-gate-clock­`ž˜bbauxclk0_src_mux_ckti,composite-mux-clock ­`až˜ccauxclk0_src_ckti,composite-clock­bcddauxclk0_ckti,divider-clock­dž«˜ttauxclk1_src_gate_ck ti,composite-no-wait-gate-clock­`ž˜eeauxclk1_src_mux_ckti,composite-mux-clock ­`až˜ffauxclk1_src_ckti,composite-clock­efggauxclk1_ckti,divider-clock­gž«˜uuauxclk2_src_gate_ck ti,composite-no-wait-gate-clock­`ž˜hhauxclk2_src_mux_ckti,composite-mux-clock ­`až˜iiauxclk2_src_ckti,composite-clock­hijjauxclk2_ckti,divider-clock­jž«˜vvauxclk3_src_gate_ck ti,composite-no-wait-gate-clock­`ž˜kkauxclk3_src_mux_ckti,composite-mux-clock ­`až˜llauxclk3_src_ckti,composite-clock­klmmauxclk3_ckti,divider-clock­mž«˜wwauxclk4_src_gate_ck ti,composite-no-wait-gate-clock­`ž˜ nnauxclk4_src_mux_ckti,composite-mux-clock ­`až˜ ooauxclk4_src_ckti,composite-clock­noppauxclk4_ckti,divider-clock­pž«˜ xxauxclk5_src_gate_ck ti,composite-no-wait-gate-clock­`ž˜$qqauxclk5_src_mux_ckti,composite-mux-clock ­`až˜$rrauxclk5_src_ckti,composite-clock­qrssauxclk5_ckti,divider-clock­sž«˜$yyauxclkreq0_ck ti,mux-clock­tuvwxyž˜auxclkreq1_ck ti,mux-clock­tuvwxyž˜auxclkreq2_ck ti,mux-clock­tuvwxyž˜auxclkreq3_ck ti,mux-clock­tuvwxyž˜auxclkreq4_ck ti,mux-clock­tuvwxyž˜ auxclkreq5_ck ti,mux-clock­tuvwxyž˜$clockdomainscounter@4a304000ti,omap-counter32k˜J0@  kcounter_32kpinmux@4a100040 ti,omap4-padconfpinctrl-single˜J@–5 [yÿ–default¤z{}}pinmux_uart2_pins ®ØÚÜÞ~~pinmux_uart3_pins ®pinmux_uart4_pins®€€pinmux_twl6040_pins®à`……pinmux_mcpdm_pins(®ÆÈÊÌΖ–pinmux_dmic_pins ®ÐÒÔÖ——pinmux_mcbsp1_pins ®¾ÀÂĘ˜pinmux_mcbsp2_pins ®¶¸º¼™™pinmux_mcspi1_pins ®òôöøŽŽpinmux_dss_hdmi_pins®Z\^zzpinmux_tpd12s015_pins®"HX {{pinmux_i2c1_pins®âäpinmux_i2c2_pins®æ芊pinmux_i2c3_pins®êì‹‹pinmux_i2c4_pins®îðŒŒpinmux_wl12xx_gpio®<µµpinmux_wl12xx_pins8®:  ””pinmux_twl6030_pins®^A‚‚pinmux@4a31e040 ti,omap4-padconfpinctrl-single˜J1à@85 [yÿpinmux_twl6030_wkup_pins®ƒƒtisyscon@4a1005a0syscon˜J p||pbias_regulatorti,pbias-omap˜`Â|pbias_mmc_omap4Épbias_mmc_omap4Øw@ð-ÆÀ‘‘ocmcram@40304000 mmio-sram˜@0@ dma-controller@4a056000ti,omap4430-sdma˜J`0`    gpio@4a310000ti,omap4-gpio˜J1 `kgpio1-?O 5­­gpio@48055000ti,omap4-gpio˜HP `kgpio2?O 5gpio@48057000ti,omap4-gpio˜Hp `kgpio3?O 5gpio@48059000ti,omap4-gpio˜H ` kgpio4?O 5††gpio@4805b000ti,omap4-gpio˜H° `!kgpio5?O 5¯¯gpio@4805d000ti,omap4-gpio˜HÐ `"kgpio6?O 5®®gpmc@50000000ti,omap4430-gpmc˜P `[gkgpmcy­´fckserial@4806a000ti,omap4-uart˜H  `Hkuart1ŽÜlserial@4806c000ti,omap4-uart˜HÀŒI}Ükuart2ŽÜl–default¤~serial@48020000ti,omap4-uart˜HŒJ}kuart3ŽÜl–default¤serial@4806e000ti,omap4-uart˜HàŒF}kuart4ŽÜl–default¤€spinlock@4a0f6000ti,omap4-hwspinlock˜J` kspinlock i2c@48070000 ti,omap4-i2c˜H `8ki2c1–default¤Ž€twl@48˜H `& ti,twl6030 5–default¤‚ƒrtcti,twl4030-rtc` regulator-vaux1ti,twl6030-vaux1ØB@ð-ÆÀ““regulator-vaux2ti,twl6030-vaux2ØO€ð*¹€regulator-vaux3ti,twl6030-vaux3ØB@ð-ÆÀregulator-vmmcti,twl6030-vmmcØO€ð-ÆÀ’’regulator-vppti,twl6030-vppØw@ð&% regulator-vusimti,twl6030-vusimØO€ð,@ regulator-vdacti,twl6030-vdac¨¨regulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxio®¢¢regulator-vusbti,twl6030-vusb„„regulator-v1v8ti,twl6030-v1v8®‡‡regulator-v2v1ti,twl6030-v2v1®ˆˆusb-comparatorti,twl6030-usb` „pwmti,twl6030-pwmÍ°°pwmledti,twl6030-pwmledͱ±twl@4b ti,twl6040˜K–default¤… `w& ؆é‡ôˆ‰"‰´´vibra1@O ` i2c@48072000 ti,omap4-i2c˜H  `9ki2c2–default¤ŠŽ€i2c@48060000 ti,omap4-i2c˜H `=ki2c3–default¤‹Ž€tmp105@48 ti,tmp105˜Hbh1780@29 rohm,bh1780˜)i2c@48350000 ti,omap4-i2c˜H5 `>ki2c4–default¤ŒŽ€hmc5843@1ehoneywell,hmc5843˜spi@48098000ti,omap4-mcspi˜H € `Akmcspi1q@#$%&'()* „tx0rx0tx1rx1tx2rx2tx3rx3–default¤Žeth@0ks8851Žn6˜&` spi@4809a000ti,omap4-mcspi˜H   `Bkmcspi2q +,-.„tx0rx0tx1rx1spi@480b8000ti,omap4-mcspi˜H € `[kmcspi3q„tx0rx0spi@480ba000ti,omap4-mcspi˜H   `0kmcspi4qFG„tx0rx0mmc@4809c000ti,omap4-hsmmc˜H À `Skmmc1«¸=>„txrxÏ‘Ü’èmmc@480b4000ti,omap4-hsmmc˜H @ `Vkmmc2¸/0„txrxÜ“èòmmc@480ad000ti,omap4-hsmmc˜H Ð `^kmmc3¸MN„txrx disabledmmc@480d1000ti,omap4-hsmmc˜H  ``kmmc4¸9:„txrx disabledmmc@480d5000ti,omap4-hsmmc˜H P `;kmmc5¸;<„txrx–default¤”Ü•õè mmu@4a066000ti,omap4-iommu˜J` `kmmu_dspmmu@55082000ti,omap4-iommu˜U  `dkmmu_ipuwdt@4a314000ti,omap4-wdtti,omap3-wdt˜J1@€ `P kwd_timer2mcpdm@40132000ti,omap4-mcpdm˜@ I 3mpudma `pkmcpdmAB„up_linkdn_linkokay–default¤–²²dmic@4012e000ti,omap4-dmic˜@àIà3mpudma `rkdmicC„up_linkokay–default¤—³³mcbsp@40122000ti,omap4-mcbsp˜@ ÿI ÿ3mpudma `=commonM€kmcbsp1!"„txrxokay–default¤˜mcbsp@40124000ti,omap4-mcbsp˜@@ÿI@ÿ3mpudma `=commonM€kmcbsp2„txrxokay–default¤™mcbsp@40126000ti,omap4-mcbsp˜@`ÿI`ÿ3mpudma `=commonM€kmcbsp3„txrx disabledmcbsp@48096000ti,omap4-mcbsp˜H `ÿ3mpu `=commonM€kmcbsp4 „txrx disabledkeypad@4a31c000ti,omap4-keypad˜J1À€ `x3mpukkbd\lf?ð* !"ç@ð%-./kAð4:,N0;Bð9<sð&i#$=Cr2j1žðg”•ÊË>ð`lŒdmm@4e000000 ti,omap4-dmm˜N `qkdmmemif@4c000000 ti,emif-4d˜L `nkemif1y¦¯ÆÛî÷šemif@4d000000 ti,emif-4d˜M `okemif2y¦¯ÆÛî÷šocp2scp@4a0ad000ti,omap-ocp2scp˜J Ðzkocp2scp_usb_phyusb2phy@4a0ad080 ti,omap-usb2˜J ЀX›­œ´wkupclkmailbox@4a0f4000ti,omap4-mailbox˜J@ `kmailbox(:mbox_ipu L Wmbox_dsp L Wtimer@4a318000ti,omap3430-timer˜J1€€ `%ktimer1btimer@48032000ti,omap3430-timer˜H € `&ktimer2timer@48034000ti,omap4430-timer˜H@€ `'ktimer3timer@48036000ti,omap4430-timer˜H`€ `(ktimer4timer@40138000ti,omap4430-timer˜@€€I€€ `)ktimer5qtimer@4013a000ti,omap4430-timer˜@ €I € `*ktimer6qtimer@4013c000ti,omap4430-timer˜@À€IÀ€ `+ktimer7qtimer@4013e000ti,omap4430-timer˜@à€Ià€ `,ktimer8~qtimer@4803e000ti,omap4430-timer˜Hà€ `-ktimer9~timer@48086000ti,omap3430-timer˜H`€ `.ktimer10~timer@48088000ti,omap4430-timer˜H€€ `/ktimer11~usbhstll@4a062000 ti,usbhs-tll˜J  `N kusb_tll_hsusbhshost@4a064000ti,usbhs-host˜J@ kusb_host_hsz ­VWY3´refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2ohci@4a064800ti,ohci-omap3˜JH& `Lehci@4a064c00 ti,ehci-omap˜JL& `Mcontrol-phy@4a002300ti,control-phy-usb2˜J#3power››control-phy@4a00233cti,control-phy-otghs˜J#<3otghs_controlžžusb_otg_hs@4a0ab000ti,omap4-musb˜J °ÿ`\]=mcdma kusb_otg_hs‹“ ˜usb2-phy¢­µ ž¾ÍÒ2aes@4b501000 ti,omap4-aeskaes˜KP  `Uon„txrxdes@480a5000 ti,omap4-deskdes˜H P  `Rut„txrxregulator-abb-mpu ti,abb-v2Éabb_mpuØ€­ñ2okay˜J0{ÐJ0`3base-addressint-addressx£èO€èû1Èregulator-abb-iva ti,abb-v2Éabb_ivaØ€­ñ2 disabled˜J0{ØJ0`3base-addressint-addressdss@58000000 ti,omap4-dss˜X€ok kdss_core­Ÿ´fckzdispc@58001000ti,omap4-dispc˜X ` kdss_dispc­Ÿ´fckencoder@58002000ti,omap4-rfbi˜X  disabled kdss_rfbi­Ÿ´fckickencoder@58003000ti,omap4-venc˜X0 disabled kdss_venc­ ´fckencoder@58004000 ti,omap4-dsi˜X@XB@XC 3protophypll `5ok kdss_dsi1­Ÿ¡ ´fcksys_clk ¢portendpoint£.¤¤displaytpo,taalpanel-dsi-cm4lcd0 :†portendpoint¤££encoder@58005000 ti,omap4-dsi˜XPXR@XS 3protophypll `Tok kdss_dsi2­Ÿ¡ ´fcksys_clk ¢portendpoint¥.¦¦displaytpo,taalpanel-dsi-cm4lcd1 :†portendpoint¦¥¥encoder@58006000ti,omap4-hdmi ˜X`XbXcXd3wppllphycore `eok kdss_hdmi­§¡ ´fcksys_clkL „audio_txF¨portendpoint©¶¶bandgap˜J"`J#,ti,omap4430-bandgapRªªthermal-zonescpu_thermalhú~茪tripscpu_alertœ† ¨Ð“passive««cpu_critœèH¨Ð “criticalcooling-mapsmap0³« ¸¬ÿÿÿÿÿÿÿÿlpddr2#Elpida,ECB240ABACNjedec,lpddr2-s4ÇÏ Øæóÿ)5BO^ššlpddr2-timings@0jedec,lpddr2-timingsk˜–€tׄ}RƒFPˆ:˜Œ¤•'šLŸL£L¨:˜¯|ºÃP¿_Å~@ËB@Ópßplpddr2-timings@1jedec,lpddr2-timingsk˜–€t ëÂ}RƒFPˆ:˜Œ¤•'š'ŸL£L¨:˜¯|ºÃP¿_Å~@ËB@Ópßpfixedregulator-vdd-ethregulator-fixedÉVDD_ETHØ2Z ð2Z  äòfixedregulator-vbatregulator-fixedÉVBATØ98pð98pò‰‰leds gpio-ledsdebug04omap4:green:debug0 @debug14omap4:green:debug1 @­debug24omap4:green:debug2 @­debug34omap4:green:debug3 @­debug44omap4:green:debug4 @user14omap4:blue:user @® user24omap4:red:user @® user34omap4:green:user @¯ pwmleds pwm-ledskpad4omap4::keypad °w5” charging4omap4:green:chrg ±w5” ÿbacklightpwm-backlight °w5”8  (2<FPZdnx * soundti,abe-twl6040 CSDP4430 L ^Ið k² t³ |´{ ‡Headset StereophoneHSOLHeadset StereophoneHSOREarphone SpkEPExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRVibratorVIBRALVibratorVIBRARHSMICHeadset MicHeadset MicHeadset Mic BiasMAINMICMain Handset MicMain Handset MicMain Mic BiasSUBMICSub Handset MicSub Handset MicMain Mic BiasAFMLLine InAFMRLine InDMicDigital MicDigital MicDigital Mic1 Biaswl12xx_vmmc–default¤µregulator-fixedÉvwl1271Øw@ðw@ ä ˜p••encoder@0 ti,tpd12s015$@ portsport@0˜endpoint@0¶©©port@1˜endpoint@0·¸¸connector@0hdmi-connector4hdmi“cportendpoint¸·· #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3display0display1display2device_typeregnext-level-cacheclocksclock-namesclock-latencyoperating-pointscooling-min-levelcooling-max-level#cooling-cellslinux,phandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptsti,hwmodssramranges#clock-cellsclock-frequencyti,bit-shiftti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitclock-multclock-divti,index-power-of-twoti,dividersti,clock-divti,clock-multti,set-rate-parentpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initinterrupts-extended#hwlock-cellsregulator-always-onusb-supply#pwm-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highvddvibl-supplyvddvibr-supplyti,vibldrv-resti,vibrdrv-resti,viblmotor-resti,vibrmotor-resti,spi-num-csdmasdma-namesspi-max-frequencyvdd-supplyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablestatuscap-power-off-cardti,iommu-bus-err-backreg-namesinterrupt-namesti,buffer-sizekeypad,num-rowskeypad,num-columnslinux,keymaplinux,input-no-autorepeatphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handlectrl-module#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmusb-phyphysphy-namesmultipointnum-epsram-bitsinterface-typemodepowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_inforemote-endpointlaneslabelreset-gpiosvdda-supply#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedregulator-boot-onpwmsmax-brightnessbrightness-levelsdefault-brightness-levelti,modelti,jack-detectionti,mclk-freqti,mcpdmti,dmicti,twl6040ti,audio-routingstartup-delay-us