8x( *@Fcompulab,omap3-sbc-t3530compulab,omap3-cm-t3530ti,omap34xxti,omap3&!7CompuLab SBC-T3530 with CM-T3530chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000 d/connector@0 m/connector@1memoryvmemorycpuscpu@0arm,cortex-a8vcpucpu(HАg8 Odp` 'ppmuarm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocpti,omap3-l3-smxsimple-bush l3_mainaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocksvirt_16_8m_ck fixed-clockY  osc_sys_ck ti,mux-clock  @  sys_ckti,divider-clock 'p2 sys_clkout1ti,gate-clock  pdpll3_x2_ckfixed-factor-clock ITdpll3_m2x2_ckfixed-factor-clock IT dpll4_x2_ckfixed-factor-clockITcorex2_fckfixed-factor-clockIT wkup_l4_ickfixed-factor-clockIT BBcorex2_d3_fckfixed-factor-clockIT yycorex2_d5_fckfixed-factor-clockIT zzclockdomainscm@48004000 ti,omap3-cmH@@clocksdummy_apb_pclk fixed-clockomap_32k_fck fixed-clock 22virt_12m_ck fixed-clock virt_13m_ck fixed-clock]@ virt_19200000_ck fixed-clock$ virt_26000000_ck fixed-clock virt_38_4m_ck fixed-clockI  dpll4_ckti,omap3-dpll-per-clock D 0 dpll4_m2_ckti,divider-clock'? H2 dpll4_m2x2_mul_ckfixed-factor-clockIT dpll4_m2x2_ckti,gate-clock ^ omap_96m_alwon_fckfixed-factor-clockIT dpll3_ckti,omap3-dpll-core-clock @ 0  dpll3_m3_ckti,divider-clock '@2 dpll3_m3x2_mul_ckfixed-factor-clockIT dpll3_m3x2_ckti,gate-clock  ^ emu_core_alwon_ckfixed-factor-clockIT VVsys_altclk fixed-clock  mcbsp_clks fixed-clock 99dpll3_m2_ckti,divider-clock ' @2  core_ckfixed-factor-clock IT dpll1_fckti,divider-clock' @2 dpll1_ckti,omap3-dpll-clock  $ @ 4 dpll1_x2_ckfixed-factor-clockIT dpll1_x2m2_ckti,divider-clock' D2 ..cm_96m_fckfixed-factor-clockIT omap_96m_fck ti,mux-clock @ 77dpll4_m3_ckti,divider-clock' @2 dpll4_m3x2_mul_ckfixed-factor-clockIT dpll4_m3x2_ckti,gate-clock ^ omap_54m_fck ti,mux-clock  @ **cm_96m_d2_fckfixed-factor-clockIT !!omap_48m_fck ti,mux-clock!  @ ""omap_12m_fckfixed-factor-clock"IT ;;dpll4_m4_ckti,divider-clock' @2 ##dpll4_m4x2_mul_ckti,fixed-factor-clock#t $$dpll4_m4x2_ckti,gate-clock$ ^ }}dpll4_m5_ckti,divider-clock'?@2 %%dpll4_m5x2_mul_ckti,fixed-factor-clock%t &&dpll4_m5x2_ckti,gate-clock& ^ ^^dpll4_m6_ckti,divider-clock'?@2 ''dpll4_m6x2_mul_ckfixed-factor-clock'IT ((dpll4_m6x2_ckti,gate-clock( ^ ))emu_per_alwon_ckfixed-factor-clock)IT WWclkout2_src_gate_ck ti,composite-no-wait-gate-clock p ++clkout2_src_mux_ckti,composite-mux-clock* p ,,clkout2_src_ckti,composite-clock+, --sys_clkout2ti,divider-clock-'@ pmpu_ckfixed-factor-clock.IT //arm_fckti,divider-clock/ $'emu_mpu_alwon_ckfixed-factor-clock/IT XXl3_ickti,divider-clock' @2 00l4_ickti,divider-clock0' @2 11rm_ickti,divider-clock1' @2gpt10_gate_fckti,composite-gate-clock   33gpt10_mux_fckti,composite-mux-clock2 @ 44gpt10_fckti,composite-clock34gpt11_gate_fckti,composite-gate-clock   55gpt11_mux_fckti,composite-mux-clock2 @ 66gpt11_fckti,composite-clock56core_96m_fckfixed-factor-clock7IT 88mmchs2_fckti,wait-gate-clock8  mmchs1_fckti,wait-gate-clock8  i2c3_fckti,wait-gate-clock8  i2c2_fckti,wait-gate-clock8  i2c1_fckti,wait-gate-clock8  mcbsp5_gate_fckti,composite-gate-clock9   mcbsp1_gate_fckti,composite-gate-clock9   core_48m_fckfixed-factor-clock"IT ::mcspi4_fckti,wait-gate-clock:  mcspi3_fckti,wait-gate-clock:  mcspi2_fckti,wait-gate-clock:  mcspi1_fckti,wait-gate-clock:  uart2_fckti,wait-gate-clock:  uart1_fckti,wait-gate-clock:   core_12m_fckfixed-factor-clock;IT <<hdq_fckti,wait-gate-clock<  core_l3_ickfixed-factor-clock0IT ==sdrc_ickti,wait-gate-clock=  ~~gpmc_fckfixed-factor-clock=ITcore_l4_ickfixed-factor-clock1IT >>mmchs2_ickti,omap3-interface-clock>  mmchs1_ickti,omap3-interface-clock>  hdq_ickti,omap3-interface-clock>  mcspi4_ickti,omap3-interface-clock>  mcspi3_ickti,omap3-interface-clock>  mcspi2_ickti,omap3-interface-clock>  mcspi1_ickti,omap3-interface-clock>  i2c3_ickti,omap3-interface-clock>  i2c2_ickti,omap3-interface-clock>  i2c1_ickti,omap3-interface-clock>  uart2_ickti,omap3-interface-clock>  uart1_ickti,omap3-interface-clock>   gpt11_ickti,omap3-interface-clock>   gpt10_ickti,omap3-interface-clock>   mcbsp5_ickti,omap3-interface-clock>   mcbsp1_ickti,omap3-interface-clock>   omapctrl_ickti,omap3-interface-clock>  dss_tv_fckti,gate-clock* dss_96m_fckti,gate-clock7 dss2_alwon_fckti,gate-clock dummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clock  ??gpt1_mux_fckti,composite-mux-clock2 @ @@gpt1_fckti,composite-clock?@aes2_ickti,omap3-interface-clock>  wkup_32k_fckfixed-factor-clock2IT AAgpio1_dbckti,gate-clockA  sha12_ickti,omap3-interface-clock>  wdt2_fckti,wait-gate-clockA  wdt2_ickti,omap3-interface-clockB  wdt1_ickti,omap3-interface-clockB  gpio1_ickti,omap3-interface-clockB  omap_32ksync_ickti,omap3-interface-clockB  gpt12_ickti,omap3-interface-clockB  gpt1_ickti,omap3-interface-clockB  per_96m_fckfixed-factor-clockIT per_48m_fckfixed-factor-clock"IT CCuart3_fckti,wait-gate-clockC  gpt2_gate_fckti,composite-gate-clock DDgpt2_mux_fckti,composite-mux-clock2@ EEgpt2_fckti,composite-clockDEgpt3_gate_fckti,composite-gate-clock FFgpt3_mux_fckti,composite-mux-clock2@ GGgpt3_fckti,composite-clockFGgpt4_gate_fckti,composite-gate-clock HHgpt4_mux_fckti,composite-mux-clock2@ IIgpt4_fckti,composite-clockHIgpt5_gate_fckti,composite-gate-clock JJgpt5_mux_fckti,composite-mux-clock2@ KKgpt5_fckti,composite-clockJKgpt6_gate_fckti,composite-gate-clock LLgpt6_mux_fckti,composite-mux-clock2@ MMgpt6_fckti,composite-clockLMgpt7_gate_fckti,composite-gate-clock NNgpt7_mux_fckti,composite-mux-clock2@ OOgpt7_fckti,composite-clockNOgpt8_gate_fckti,composite-gate-clock  PPgpt8_mux_fckti,composite-mux-clock2@ QQgpt8_fckti,composite-clockPQgpt9_gate_fckti,composite-gate-clock  RRgpt9_mux_fckti,composite-mux-clock2@ SSgpt9_fckti,composite-clockRSper_32k_alwon_fckfixed-factor-clock2IT TTgpio6_dbckti,gate-clockT gpio5_dbckti,gate-clockT gpio4_dbckti,gate-clockT gpio3_dbckti,gate-clockT gpio2_dbckti,gate-clockT  wdt3_fckti,wait-gate-clockT  per_l4_ickfixed-factor-clock1IT UUgpio6_ickti,omap3-interface-clockU gpio5_ickti,omap3-interface-clockU gpio4_ickti,omap3-interface-clockU gpio3_ickti,omap3-interface-clockU gpio2_ickti,omap3-interface-clockU  wdt3_ickti,omap3-interface-clockU  uart3_ickti,omap3-interface-clockU  uart4_ickti,omap3-interface-clockU gpt9_ickti,omap3-interface-clockU  gpt8_ickti,omap3-interface-clockU  gpt7_ickti,omap3-interface-clockU gpt6_ickti,omap3-interface-clockU gpt5_ickti,omap3-interface-clockU gpt4_ickti,omap3-interface-clockU gpt3_ickti,omap3-interface-clockU gpt2_ickti,omap3-interface-clockU mcbsp2_ickti,omap3-interface-clockU mcbsp3_ickti,omap3-interface-clockU mcbsp4_ickti,omap3-interface-clockU mcbsp2_gate_fckti,composite-gate-clock9 mcbsp3_gate_fckti,composite-gate-clock9 mcbsp4_gate_fckti,composite-gate-clock9 emu_src_mux_ck ti,mux-clockVWX@ YYemu_src_ckti,clkdm-gate-clockY ZZpclk_fckti,divider-clockZ'@2pclkx2_fckti,divider-clockZ'@2atclk_fckti,divider-clockZ'@2traceclk_src_fck ti,mux-clockVWX@ [[traceclk_fckti,divider-clock[ '@2secure_32k_fck fixed-clock \\gpt12_fckfixed-factor-clock\ITwdt1_fckfixed-factor-clock\ITsecurity_l4_ick2fixed-factor-clock1IT ]]aes1_ickti,omap3-interface-clock] rng_ickti,omap3-interface-clock] sha11_ickti,omap3-interface-clock] des1_ickti,omap3-interface-clock] cam_mclkti,gate-clock^cam_ick!ti,omap3-no-wait-interface-clock1 csi2_96m_fckti,gate-clock8 security_l3_ickfixed-factor-clock0IT __pka_ickti,omap3-interface-clock_ icr_ickti,omap3-interface-clock> des2_ickti,omap3-interface-clock> mspro_ickti,omap3-interface-clock> mailboxes_ickti,omap3-interface-clock> ssi_l4_ickfixed-factor-clock1IT ffsr1_fckti,wait-gate-clock sr2_fckti,wait-gate-clock sr_l4_ickfixed-factor-clock1ITdpll2_fckti,divider-clock'@2 ``dpll2_ckti,omap3-dpll-clock`$@4 aadpll2_m2_ckti,divider-clocka'D2 bbiva2_ckti,wait-gate-clockb modem_fckti,omap3-interface-clock  sad2d_ickti,omap3-interface-clock0  mad2d_ickti,omap3-interface-clock0  mspro_fckti,wait-gate-clock8 ssi_ssr_gate_fck_3430es2 ti,composite-no-wait-gate-clock  ccssi_ssr_div_fck_3430es2ti,composite-divider-clock @$ ddssi_ssr_fck_3430es2ti,composite-clockcd eessi_sst_fck_3430es2fixed-factor-clockeIT hsotgusb_ick_3430es2"ti,omap3-hsotgusb-interface-clock=  ssi_ick_3430es2ti,omap3-ssi-interface-clockf  usim_gate_fckti,composite-gate-clock7   qqsys_d2_ckfixed-factor-clockIT hhomap_96m_d2_fckfixed-factor-clock7IT iiomap_96m_d4_fckfixed-factor-clock7IT jjomap_96m_d8_fckfixed-factor-clock7IT kkomap_96m_d10_fckfixed-factor-clock7IT  lldpll5_m2_d4_ckfixed-factor-clockgIT mmdpll5_m2_d8_ckfixed-factor-clockgIT nndpll5_m2_d16_ckfixed-factor-clockgIT oodpll5_m2_d20_ckfixed-factor-clockgIT ppusim_mux_fckti,composite-mux-clock(hijklmnop @2 rrusim_fckti,composite-clockqrusim_ickti,omap3-interface-clockB   dpll5_ckti,omap3-dpll-clock  $ L 4 ssdpll5_m2_ckti,divider-clocks' P2 ggsgx_gate_fckti,composite-gate-clock  {{core_d3_ckfixed-factor-clockIT ttcore_d4_ckfixed-factor-clockIT uucore_d6_ckfixed-factor-clockIT vvomap_192m_alwon_fckfixed-factor-clockIT wwcore_d2_ckfixed-factor-clockIT xxsgx_mux_fckti,composite-mux-clock tuvwxyz @ ||sgx_fckti,composite-clock{|sgx_ickti,wait-gate-clock0  cpefuse_fckti,gate-clock  ts_fckti,gate-clock2  usbtll_fckti,wait-gate-clockg  usbtll_ickti,omap3-interface-clock>  mmchs3_ickti,omap3-interface-clock>  mmchs3_fckti,wait-gate-clock8  dss1_alwon_fck_3430es2ti,dss-gate-clock} dss_ick_3430es2ti,omap3-dss-interface-clock1 usbhost_120m_fckti,gate-clockg usbhost_48m_fckti,dss-gate-clock" usbhost_ickti,omap3-dss-interface-clock1 clockdomainscore_l3_clkdmti,clockdomain~dpll3_clkdmti,clockdomain dpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainZdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainad2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainssgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain scrm@48002000ti,omap3-scrmH clocksmcbsp5_mux_fckti,composite-mux-clock89 mcbsp5_fckti,composite-clockmcbsp1_mux_fckti,composite-mux-clock89t mcbsp1_fckti,composite-clockmcbsp2_mux_fckti,composite-mux-clock9t mcbsp2_fckti,composite-clockmcbsp3_mux_fckti,composite-mux-clock9 mcbsp3_fckti,composite-clockmcbsp4_mux_fckti,composite-mux-clock9 mcbsp4_fckti,composite-clockclockdomainscounter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH  dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH` # 0` pinmux@48002030 ti,omap3-padconfpinctrl-singleH 08=[xdefaultpinmux_uart3_pinsnp pinmux_mmc1_pins0 pinmux_green_led_pins pinmux_dss_dpi_pins_common pinmux_dss_dpi_pins_cm_t35x0 pinmux_ads7846_pins pinmux_mcspi1_pins  pinmux_i2c1_pins pinmux_mcbsp2_pins   pinmux_smsc1_pinsj pinmux_hsusb0_pins`rtvxz|~ pinmux_twl4030_pinsA pinmux_mmc2_pinsP(*,.02468: pinmux_smsc2_pins pinmux_tfp410_pins pinmux_i2c3_pins pinmux_sb_t35_audio_amp pinmux_sb_t35_usb_hub_pins pinmux@48002a00 ti,omap3-padconfpinctrl-singleH*\=[pinmux_twl4030_vpins  tisyscon@48002270sysconH"p pbias_regulatorti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@- gpio@48310000ti,omap3-gpioH1gpio1 gpio@49050000ti,omap3-gpioIgpio2  gpio@49052000ti,omap3-gpioI gpio3  gpio@49054000ti,omap3-gpioI@ gpio4 gpio@49056000ti,omap3-gpioI`!gpio5 gpio@49058000ti,omap3-gpioI"gpio6  serial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3lxdefaulti2c@48070000 ti,omap3-i2cH8txrxi2c1xdefaultat24@50 at24,24c02,Ptwl@48H& ti,twl4030xdefaultaudioti,twl4030-audio   codecrtcti,twl4030-rtc bciti,twl4030-bci 5watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 '  regulator-vdacti,twl4030-vdacw@w@ regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0 regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5 regulator-vusb1v8ti,twl4030-vusb1v8 regulator-vusb3v1ti,twl4030-vusb3v1 regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio CO twl4030-usbti,twl4030-usb Zhv pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad$0iglj. madcti,twl4030-madci2c@48072000 ti,omap3-i2cH 9txrxi2c2i2c@48060000 ti,omap3-i2cH=txrxi2c3xdefaultat24@50 at24,24c02,Pmailbox@48094000ti,omap3-mailboxmailboxH @dsp   spi@48098000ti,omap2-mcspiH Amcspi1+@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3xdefaultads7846@0xdefault ti,ads78469D`& Vclu~ spi@4809a000ti,omap2-mcspiH Bmcspi2+ +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [mcspi3+ tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0mcspi4+FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1=>txrxxdefault mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxxdefault+mmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx >disabledmmu@480bd400ti,omap2-iommuH mmu_ispEmmu@5d000000ti,omap2-iommu]mmu_iva >disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@Umpu ;< _commontxrxomcbsp1 txrx >disabledmcbsp@49022000ti,omap3-mcbspI I Umpusidetone>?_commontxrxsidetoneomcbsp2mcbsp2_sidetone!"txrx>okxdefault   mcbsp@49024000ti,omap3-mcbspI@I UmpusidetoneYZ_commontxrxsidetoneomcbsp3mcbsp3_sidetonetxrx >disabledmcbsp@49026000ti,omap3-mcbspI`Umpu 67 _commontxrxomcbsp4txrx >disabledmcbsp@48096000ti,omap3-mcbspH `Umpu QR _commontxrxomcbsp5txrx >disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH timer@48318000ti,omap3430-timerH1%timer1~timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12~usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs ehci-phy ehci-phyohci@48064400ti,ohci-omap3HD&Lehci@48064800 ti,ehci-omapHH&Mgpmc@6e000000ti,omap3430-gpmcgpmcn0,-nand@0,0 sw!/xAxSbxuxZZH<xx'9Zpartition@0Qxloaderpartition@0x80000Qubootpartition@0x260000Quboot environment&partition@0x2a0000Qlinux*@partition@0x6a0000Qrootfsjethernet@gpmcsmsc,lan9221smsc,lan9115Wb|!/ASbu(--xKK9'xdefault& ethernet@4,0smsc,lan9221smsc,lan9115xdefault& Wb|!/ASbu(--xKK9'usb_otg_hs@480ab000ti,omap3-musbH \]_mcdma usb_otg_hs(0 xdefault9H Pusb2-phyZ2dss@48050000 ti,omap3-dssH>ok dss_corefckxdefaultdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H Uprotophypll >disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH >disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH >ok dss_vencfck`portendpointl|   portendpointl ssi-controller@48058000 ti,omap3-ssissi>okHHUsysgddG_gdd_mpu e ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHUtxrx&CDssi-port@4805b000ti,omap3-ssi-portHHUtxrx&EFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$=[leds gpio-ledsxdefaultledb Qcm-t3x:green  heartbeathsusb1_power_regregulator-fixed hsusb1_vbus2Z2Zp   hsusb2_power_regregulator-fixed hsusb2_vbus2Z2Zp   hsusb1_phyusb-nop-xceiv9   hsusb2_phyusb-nop-xceiv9   ads7846-regregulator-fixed ads7846-reg2Z2Z connector@1svideo-connectorQtvportendpointl  soundti,omap-twl4030cm-t35  regulator-vddvarioregulator-fixed vddvario regulator-vdd33aregulator-fixedvdd33a regulator-mmc2-sdio-resetregulator-fixedregulator-mmc2-sdio-reset2Z2Z ^ encoder@0 ti,tfp410 xdefaultportsport@0endpoint@0l port@1endpoint@0l connector@0dvi-connectorQdviportendpointl audio_ampregulator-fixed audio_ampxdefault ^  #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2display0display1device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsrangesdmasdma-names#clock-cellsclock-frequencylinux,phandleti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersinterrupt-controller#interrupt-cells#dma-cellsdma-channelsdma-requestspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpagesizebci3v1-supplyti,use-ledsti,pullupsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-replinux,wakeupti,dual-voltpbias-supplybus-widthvmmc-supplycd-gpiosnon-removablecap-power-off-cardstatusti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsdata-lineslinux,default-triggerstartup-delay-usreset-gpiosti,modelti,mcbspti,codecregulator-always-onenable-active-highpowerdown-gpiosenable-active-low