8h(0Dcompulab,omap3-sbc-t3517compulab,omap3-cm-t3517ti,am3517ti,omap3&!7CompuLab SBC-T3517 with CM-T3517chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@4809e000 l/connector@0 u/connector@1memory~memorycpuscpu@0arm,cortex-a8~cpucpupmuarm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocpti,omap3-l3-smxsimple-bush l3_mainaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocksvirt_16_8m_ck fixed-clockY  osc_sys_ck ti,mux-clock  @  sys_ckti,divider-clock  p$sys_clkout1ti,gate-clock  p dpll3_x2_ckfixed-factor-clock ;Fdpll3_m2x2_ckfixed-factor-clock ;Fdpll4_x2_ckfixed-factor-clock ;Fcorex2_fckfixed-factor-clock;Fwkup_l4_ickfixed-factor-clock;FAAcorex2_d3_fckfixed-factor-clock;Fbbcorex2_d5_fckfixed-factor-clock;Fccclockdomainscm@48004000 ti,omap3-cmH@@clocksdummy_apb_pclk fixed-clockomap_32k_fck fixed-clock11virt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ckti,omap3-dpll-per-clock D 0  dpll4_m2_ckti,divider-clock ? H$dpll4_m2x2_mul_ckfixed-factor-clock;Fdpll4_m2x2_ckti,gate-clock  Pomap_96m_alwon_fckfixed-factor-clock;Fdpll3_ckti,omap3-dpll-core-clock @ 0  dpll3_m3_ckti,divider-clock  @$dpll3_m3x2_mul_ckfixed-factor-clock;Fdpll3_m3x2_ckti,gate-clock  Pemu_core_alwon_ckfixed-factor-clock;FUUsys_altclk fixed-clockmcbsp_clks fixed-clock88dpll3_m2_ckti,divider-clock   @$  core_ckfixed-factor-clock ;Fdpll1_fckti,divider-clock  @$dpll1_ckti,omap3-dpll-clock  $ @ 4dpll1_x2_ckfixed-factor-clock;Fdpll1_x2m2_ckti,divider-clock D$--cm_96m_fckfixed-factor-clock;Fomap_96m_fck ti,mux-clock  @66dpll4_m3_ckti,divider-clock   @$dpll4_m3x2_mul_ckfixed-factor-clock;Fdpll4_m3x2_ckti,gate-clock  Pomap_54m_fck ti,mux-clock  @))cm_96m_d2_fckfixed-factor-clock;F  omap_48m_fck ti,mux-clock   @!!omap_12m_fckfixed-factor-clock!;F::dpll4_m4_ckti,divider-clock  @$""dpll4_m4x2_mul_ckti,fixed-factor-clock"ft##dpll4_m4x2_ckti,gate-clock#  Pggdpll4_m5_ckti,divider-clock ?@$$$dpll4_m5x2_mul_ckti,fixed-factor-clock$ft%%dpll4_m5x2_ckti,gate-clock%  Pdpll4_m6_ckti,divider-clock  ?@$&&dpll4_m6x2_mul_ckfixed-factor-clock&;F''dpll4_m6x2_ckti,gate-clock'  P((emu_per_alwon_ckfixed-factor-clock(;FVVclkout2_src_gate_ck ti,composite-no-wait-gate-clock  p**clkout2_src_mux_ckti,composite-mux-clock) p++clkout2_src_ckti,composite-clock*+,,sys_clkout2ti,divider-clock, @ pmpu_ckfixed-factor-clock-;F..arm_fckti,divider-clock. $emu_mpu_alwon_ckfixed-factor-clock.;FWWl3_ickti,divider-clock @$//l4_ickti,divider-clock/  @$00rm_ickti,divider-clock0  @$gpt10_gate_fckti,composite-gate-clock  22gpt10_mux_fckti,composite-mux-clock1  @33gpt10_fckti,composite-clock23gpt11_gate_fckti,composite-gate-clock  44gpt11_mux_fckti,composite-mux-clock1  @55gpt11_fckti,composite-clock45core_96m_fckfixed-factor-clock6;F77mmchs2_fckti,wait-gate-clock7  mmchs1_fckti,wait-gate-clock7  i2c3_fckti,wait-gate-clock7  i2c2_fckti,wait-gate-clock7  i2c1_fckti,wait-gate-clock7  mcbsp5_gate_fckti,composite-gate-clock8  mcbsp1_gate_fckti,composite-gate-clock8  core_48m_fckfixed-factor-clock!;F99mcspi4_fckti,wait-gate-clock9  mcspi3_fckti,wait-gate-clock9  mcspi2_fckti,wait-gate-clock9  mcspi1_fckti,wait-gate-clock9  uart2_fckti,wait-gate-clock9  uart1_fckti,wait-gate-clock9  core_12m_fckfixed-factor-clock:;F;;hdq_fckti,wait-gate-clock;  core_l3_ickfixed-factor-clock/;F<<sdrc_ickti,wait-gate-clock<  hhgpmc_fckfixed-factor-clock<;Fcore_l4_ickfixed-factor-clock0;F==mmchs2_ickti,omap3-interface-clock=  mmchs1_ickti,omap3-interface-clock=  hdq_ickti,omap3-interface-clock=  mcspi4_ickti,omap3-interface-clock=  mcspi3_ickti,omap3-interface-clock=  mcspi2_ickti,omap3-interface-clock=  mcspi1_ickti,omap3-interface-clock=  i2c3_ickti,omap3-interface-clock=  i2c2_ickti,omap3-interface-clock=  i2c1_ickti,omap3-interface-clock=  uart2_ickti,omap3-interface-clock=  uart1_ickti,omap3-interface-clock=  gpt11_ickti,omap3-interface-clock=  gpt10_ickti,omap3-interface-clock=  mcbsp5_ickti,omap3-interface-clock=  mcbsp1_ickti,omap3-interface-clock=  omapctrl_ickti,omap3-interface-clock=  dss_tv_fckti,gate-clock) dss_96m_fckti,gate-clock6 dss2_alwon_fckti,gate-clock dummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clock  >>gpt1_mux_fckti,composite-mux-clock1 @??gpt1_fckti,composite-clock>?aes2_ickti,omap3-interface-clock=  wkup_32k_fckfixed-factor-clock1;F@@gpio1_dbckti,gate-clock@  sha12_ickti,omap3-interface-clock=  wdt2_fckti,wait-gate-clock@  wdt2_ickti,omap3-interface-clockA  wdt1_ickti,omap3-interface-clockA  gpio1_ickti,omap3-interface-clockA  omap_32ksync_ickti,omap3-interface-clockA  gpt12_ickti,omap3-interface-clockA  gpt1_ickti,omap3-interface-clockA  per_96m_fckfixed-factor-clock;Fper_48m_fckfixed-factor-clock!;FBBuart3_fckti,wait-gate-clockB oogpt2_gate_fckti,composite-gate-clock CCgpt2_mux_fckti,composite-mux-clock1@DDgpt2_fckti,composite-clockCDgpt3_gate_fckti,composite-gate-clock EEgpt3_mux_fckti,composite-mux-clock1 @FFgpt3_fckti,composite-clockEFgpt4_gate_fckti,composite-gate-clock GGgpt4_mux_fckti,composite-mux-clock1 @HHgpt4_fckti,composite-clockGHgpt5_gate_fckti,composite-gate-clock IIgpt5_mux_fckti,composite-mux-clock1 @JJgpt5_fckti,composite-clockIJgpt6_gate_fckti,composite-gate-clock KKgpt6_mux_fckti,composite-mux-clock1 @LLgpt6_fckti,composite-clockKLgpt7_gate_fckti,composite-gate-clock MMgpt7_mux_fckti,composite-mux-clock1 @NNgpt7_fckti,composite-clockMNgpt8_gate_fckti,composite-gate-clock OOgpt8_mux_fckti,composite-mux-clock1 @PPgpt8_fckti,composite-clockOPgpt9_gate_fckti,composite-gate-clock QQgpt9_mux_fckti,composite-mux-clock1 @RRgpt9_fckti,composite-clockQRper_32k_alwon_fckfixed-factor-clock1;FSSgpio6_dbckti,gate-clockS ppgpio5_dbckti,gate-clockS qqgpio4_dbckti,gate-clockS rrgpio3_dbckti,gate-clockS ssgpio2_dbckti,gate-clockS ttwdt3_fckti,wait-gate-clockS uuper_l4_ickfixed-factor-clock0;FTTgpio6_ickti,omap3-interface-clockT vvgpio5_ickti,omap3-interface-clockT wwgpio4_ickti,omap3-interface-clockT xxgpio3_ickti,omap3-interface-clockT yygpio2_ickti,omap3-interface-clockT zzwdt3_ickti,omap3-interface-clockT {{uart3_ickti,omap3-interface-clockT ||uart4_ickti,omap3-interface-clockT }}gpt9_ickti,omap3-interface-clockT ~~gpt8_ickti,omap3-interface-clockT gpt7_ickti,omap3-interface-clockT gpt6_ickti,omap3-interface-clockT gpt5_ickti,omap3-interface-clockT gpt4_ickti,omap3-interface-clockT gpt3_ickti,omap3-interface-clockT gpt2_ickti,omap3-interface-clockT mcbsp2_ickti,omap3-interface-clockT mcbsp3_ickti,omap3-interface-clockT mcbsp4_ickti,omap3-interface-clockT mcbsp2_gate_fckti,composite-gate-clock8 mcbsp3_gate_fckti,composite-gate-clock8 mcbsp4_gate_fckti,composite-gate-clock8 emu_src_mux_ck ti,mux-clockUVW@XXemu_src_ckti,clkdm-gate-clockXYYpclk_fckti,divider-clockY @$pclkx2_fckti,divider-clockY @$atclk_fckti,divider-clockY @$traceclk_src_fck ti,mux-clockUVW @ZZtraceclk_fckti,divider-clockZ @$secure_32k_fck fixed-clock[[gpt12_fckfixed-factor-clock[;Fwdt1_fckfixed-factor-clock[;Fipss_ickti,am35xx-interface-clock<  iirmii_ck fixed-clockpclk_ck fixed-clockuart4_ick_am35xxti,omap3-interface-clock=  uart4_fck_am35xxti,wait-gate-clock9  dpll5_ckti,omap3-dpll-clock  $ L 4\\dpll5_m2_ckti,divider-clock\ P$ffsgx_gate_fckti,composite-gate-clock  ddcore_d3_ckfixed-factor-clock;F]]core_d4_ckfixed-factor-clock;F^^core_d6_ckfixed-factor-clock;F__omap_192m_alwon_fckfixed-factor-clock;F``core_d2_ckfixed-factor-clock;Faasgx_mux_fckti,composite-mux-clock ]^_`abc @eesgx_fckti,composite-clockdesgx_ickti,wait-gate-clock/  cpefuse_fckti,gate-clock  ts_fckti,gate-clock1  usbtll_fckti,wait-gate-clockf  usbtll_ickti,omap3-interface-clock=  mmchs3_ickti,omap3-interface-clock=  mmchs3_fckti,wait-gate-clock7  dss1_alwon_fck_3430es2ti,dss-gate-clockg dss_ick_3430es2ti,omap3-dss-interface-clock0 usbhost_120m_fckti,gate-clockf usbhost_48m_fckti,dss-gate-clock! usbhost_ickti,omap3-dss-interface-clock0 clockdomainscore_l3_clkdmti,clockdomainhijklmndpll3_clkdmti,clockdomain dpll1_clkdmti,clockdomainper_clkdmti,clockdomainhopqrstuvwxyz{|}~emu_clkdmti,clockdomainYdpll4_clkdmti,clockdomain wkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomain\sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain scrm@48002000ti,omap3-scrmH clocksmcbsp5_mux_fckti,composite-mux-clock78 mcbsp5_fckti,composite-clockmcbsp1_mux_fckti,composite-mux-clock78 tmcbsp1_fckti,composite-clockmcbsp2_mux_fckti,composite-mux-clock8 tmcbsp2_fckti,composite-clockmcbsp3_mux_fckti,composite-mux-clock8mcbsp3_fckti,composite-clockmcbsp4_mux_fckti,composite-mux-clock8 mcbsp4_fckti,composite-clockemac_ickti,am35xx-gate-clocki jjemac_fckti,gate-clock vpfe_ickti,am35xx-gate-clocki kkvpfe_fckti,gate-clock hsotgusb_ick_am35xxti,am35xx-gate-clocki llhsotgusb_fck_am35xxti,gate-clock mmhecc_ckti,am35xx-gate-clock nnclockdomainscounter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `pinmux@48002030 ti,omap3-padconfpinctrl-singleH 08-JdefaultXpinmux_uart3_pinsbnppinmux_mmc1_pins0bpinmux_green_led_pinsbpinmux_dss_dpi_pins_commonbpinmux_dss_dpi_pins_cm_t35x0bpinmux_ads7846_pinsbpinmux_mcspi1_pins bpinmux_i2c1_pinsbpinmux_mcbsp2_pins b pinmux_hsusb1_phy_reset_pinsbHpinmux_hsusb2_phy_reset_pinsbJpinmux_otg_drv_vbusbpinmux_mmc2_pins0b(*,.02pinmux_wl12xx_core_pinsbFpinmux_usb_hub_pinsbTpinmux_smsc2_pinsbpinmux_tfp410_pinsbpinmux_i2c3_pinsbpinmux_sb_t35_audio_ampbpinmux_mmc1_aux_pinsbDpinmux_sb_t35_usb_hub_pinsbpinmux@48002a00 ti,omap3-padconfpinctrl-singleH*\-pinmux_wl12xx_wkup_pinsbtisyscon@48002270sysconH"ppbias_regulatorti,pbias-omapvpbias_mmc_omap2430}pbias_mmc_omap2430w@-gpio@48310000ti,omap3-gpioH1gpio1gpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6serial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3lJdefaultXi2c@48070000 ti,omap3-i2cH8txrxi2c1JdefaultXat24@50 at24,24c02Pi2c@48072000 ti,omap3-i2cH 9txrxi2c2i2c@48060000 ti,omap3-i2cH=txrxi2c3JdefaultXat24@50 at24,24c02Pmailbox@48094000ti,omap3-mailboxmailboxH @% disableddsp 7 Bspi@48098000ti,omap2-mcspiH Amcspi1M@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3JdefaultXads7846@0JdefaultX ti,ads7846[f`& x spi@4809a000ti,omap2-mcspiH Bmcspi2M +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [mcspi3M tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0mcspi4MFGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1=>txrxJdefaultX * 6 ?mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxJdefaultX*HX fmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_ispy disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrx disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxokJdefaultXmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrx disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrx disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH  disabledtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs ehci-phy ehci-phyohci@48064400ti,ohci-omap3HD&Lehci@48064800 ti,ehci-omapHH&Mgpmc@6e000000ti,omap3430-gpmcgpmcn -nand@0,0 $3EswUcxuxxxZZH<9xJx[mZpartition@0xloaderpartition@0x80000ubootpartition@0x260000uboot environment&partition@0x2a0000linux*@partition@0x6a0000rootfsjethernet@4,0smsc,lan9221smsc,lan9115JdefaultX& 3Ucu(--9JxKKm[ .;usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hsQ\d dss@48050000 ti,omap3-dssHok dss_corefckJdefaultXdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckportendpointm}portendpointmssi-controller@48058000 ti,omap3-ssissi disabledHHsysgddGgdd_mpussi-port@4805a000ti,omap3-ssi-portHHtxrx&CDssi-port@4805b000ti,omap3-ssi-portHHtxrx&EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hsokay\GmcJdefaultXethernet@0x5c000000ti,am3517-emac davinci_emacokay\CDEFv ethernet@0x5c030000ti,davinci_mdio davinci_mdiookay\'B@serial@4809e000ti,omap3-uartuart4 disabledH T76txrxlleds gpio-ledsJdefaultXledb cm-t3x:green 9 0heartbeathsusb1_power_regregulator-fixed }hsusb1_vbus2Z2ZFphsusb2_power_regregulator-fixed }hsusb2_vbus2Z2ZFphsusb1_phyusb-nop-xceiv[JdefaultX Whsusb2_phyusb-nop-xceiv[JdefaultX Wads7846-regregulator-fixed }ads7846-reg2Z2Zconnector@1svideo-connectortvportendpointmregulator-vmmcregulator-fixed}vmmc2Z2Zwl12xx_vmmc2regulator-fixed}vw1271JdefaultXw@w@ FN cwl12xx_vaux2regulator-fixed}vwl1271_vaux2w@w@encoder@0 ti,tfp410 vJdefaultXportsport@0endpoint@0mport@1endpoint@0mconnector@0dvi-connectordviportendpointmaudio_ampregulator-fixed }audio_ampJdefaultX regulator-vddvario-sb-t35regulator-fixed }vddvarioregulator-vdd33a-sb-t35regulator-fixed}vdd33a #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusrangesdmasdma-names#clock-cellsclock-frequencylinux,phandleti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockinterrupt-controller#interrupt-cells#dma-cellsdma-channelsdma-requestspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-replinux,wakeupti,dual-voltpbias-supplybus-widthvmmc-supplywp-gpioscd-gpiosvmmc_aux-supplynon-removablecap-power-off-cardti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsremote-endpointti,channelsdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqlinux,default-triggerstartup-delay-usreset-gpiosenable-active-highpowerdown-gpiosenable-active-lowregulator-always-on