Ð þíìR8äx(Úä@&nokia,omap3-n950ti,omap36xxti,omap3& 7Nokia N950chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@49042000memorylmemoryx€@cpuscpu@0arm,cortex-a8lcpux|ƒcpu“à“às 'ÀO€ 57È®pmuarm,cortex-a8-pmuxT€ºÅdebugsssocti,omap-inframpu ti,omap3-mpuÅmpuiva ti,iva2.2Åivadsp ti,omap3-c64ocpti,omap3-l3-smxsimple-busxhº ÏÅl3_mainaes@480c5000 ti,omap3-aesÅaesxH PPºÖABÛtxrx ådisabledprm@48306000 ti,omap3-prmxH0`@º clocksvirt_16_8m_ckì fixed-clockùY  osc_sys_ckì ti,mux-clock| x @  sys_ckìti,divider-clock| $xp/ sys_clkout1ìti,gate-clock| x pdpll3_x2_ckìfixed-factor-clock| FQdpll3_m2x2_ckìfixed-factor-clock| FQ dpll4_x2_ckìfixed-factor-clock|FQcorex2_fckìfixed-factor-clock|FQ wkup_l4_ickìfixed-factor-clock|FQ BBcorex2_d3_fckìfixed-factor-clock|FQ yycorex2_d5_fckìfixed-factor-clock|FQ zzclockdomainscm@48004000 ti,omap3-cmxH@@clocksdummy_apb_pclkì fixed-clockùomap_32k_fckì fixed-clockù€ 22virt_12m_ckì fixed-clockù· virt_13m_ckì fixed-clockùÆ]@ virt_19200000_ckì fixed-clockù$ø virt_26000000_ckì fixed-clockùŒº€ virt_38_4m_ckì fixed-clockùIð  dpll4_ckìti,omap3-dpll-per-j-type-clock|x D 0 dpll4_m2_ckìti,divider-clock|$?x H/ dpll4_m2x2_mul_ckìfixed-factor-clock|FQ dpll4_m2x2_ckìti,hsdiv-gate-clock|x [ omap_96m_alwon_fckìfixed-factor-clock|FQ dpll3_ckìti,omap3-dpll-core-clock|x @ 0  dpll3_m3_ckìti,divider-clock| $x@/ dpll3_m3x2_mul_ckìfixed-factor-clock|FQ dpll3_m3x2_ckìti,hsdiv-gate-clock| x [ emu_core_alwon_ckìfixed-factor-clock|FQ VVsys_altclkì fixed-clockù  mcbsp_clksì fixed-clockù 99dpll3_m2_ckìti,divider-clock| $x @/  core_ckìfixed-factor-clock| FQ dpll1_fckìti,divider-clock|$x @/ dpll1_ckìti,omap3-dpll-clock|x  $ @ 4 dpll1_x2_ckìfixed-factor-clock|FQ dpll1_x2m2_ckìti,divider-clock|$x D/ ..cm_96m_fckìfixed-factor-clock|FQ omap_96m_fckì ti,mux-clock|x @ 77dpll4_m3_ckìti,divider-clock|$ x@/ dpll4_m3x2_mul_ckìfixed-factor-clock|FQ dpll4_m3x2_ckìti,hsdiv-gate-clock|x [ omap_54m_fckì ti,mux-clock| x @ **cm_96m_d2_fckìfixed-factor-clock|FQ !!omap_48m_fckì ti,mux-clock|! x @ ""omap_12m_fckìfixed-factor-clock|"FQ ;;dpll4_m4_ckìti,divider-clock|$ x@/ ##dpll4_m4x2_mul_ckìti,fixed-factor-clock|#qŒ $$dpll4_m4x2_ckìti,gate-clock|$x [Œ }}dpll4_m5_ckìti,divider-clock|$?x@/ %%dpll4_m5x2_mul_ckìti,fixed-factor-clock|%qŒ &&dpll4_m5x2_ckìti,hsdiv-gate-clock|&x [Œ ^^dpll4_m6_ckìti,divider-clock|$?x@/ ''dpll4_m6x2_mul_ckìfixed-factor-clock|'FQ ((dpll4_m6x2_ckìti,hsdiv-gate-clock|(x [ ))emu_per_alwon_ckìfixed-factor-clock|)FQ WWclkout2_src_gate_ckì ti,composite-no-wait-gate-clock|x p ++clkout2_src_mux_ckìti,composite-mux-clock|*x p ,,clkout2_src_ckìti,composite-clock|+, --sys_clkout2ìti,divider-clock|-$@x pŸmpu_ckìfixed-factor-clock|.FQ //arm_fckìti,divider-clock|/x $$emu_mpu_alwon_ckìfixed-factor-clock|/FQ XXl3_ickìti,divider-clock|$x @/ 00l4_ickìti,divider-clock|0$x @/ 11rm_ickìti,divider-clock|1$x @/gpt10_gate_fckìti,composite-gate-clock| x  33gpt10_mux_fckìti,composite-mux-clock|2x @ 44gpt10_fckìti,composite-clock|34gpt11_gate_fckìti,composite-gate-clock| x  55gpt11_mux_fckìti,composite-mux-clock|2x @ 66gpt11_fckìti,composite-clock|56core_96m_fckìfixed-factor-clock|7FQ 88mmchs2_fckìti,wait-gate-clock|8x  ©©mmchs1_fckìti,wait-gate-clock|8x  ªªi2c3_fckìti,wait-gate-clock|8x  ««i2c2_fckìti,wait-gate-clock|8x  ¬¬i2c1_fckìti,wait-gate-clock|8x  ­­mcbsp5_gate_fckìti,composite-gate-clock|9 x  ØØmcbsp1_gate_fckìti,composite-gate-clock|9 x  ÚÚcore_48m_fckìfixed-factor-clock|"FQ ::mcspi4_fckìti,wait-gate-clock|:x  ®®mcspi3_fckìti,wait-gate-clock|:x  ¯¯mcspi2_fckìti,wait-gate-clock|:x  °°mcspi1_fckìti,wait-gate-clock|:x  ±±uart2_fckìti,wait-gate-clock|:x  ²²uart1_fckìti,wait-gate-clock|:x   ³³core_12m_fckìfixed-factor-clock|;FQ <<hdq_fckìti,wait-gate-clock|<x  ´´core_l3_ickìfixed-factor-clock|0FQ ==sdrc_ickìti,wait-gate-clock|=x  ~~gpmc_fckìfixed-factor-clock|=FQcore_l4_ickìfixed-factor-clock|1FQ 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LLgpt6_mux_fckìti,composite-mux-clock|2x@ MMgpt6_fckìti,composite-clock|LMgpt7_gate_fckìti,composite-gate-clock|x NNgpt7_mux_fckìti,composite-mux-clock|2x@ OOgpt7_fckìti,composite-clock|NOgpt8_gate_fckìti,composite-gate-clock| x PPgpt8_mux_fckìti,composite-mux-clock|2x@ QQgpt8_fckìti,composite-clock|PQgpt9_gate_fckìti,composite-gate-clock| x RRgpt9_mux_fckìti,composite-mux-clock|2x@ SSgpt9_fckìti,composite-clock|RSper_32k_alwon_fckìfixed-factor-clock|2FQ TTgpio6_dbckìti,gate-clock|Tx gpio5_dbckìti,gate-clock|Tx ‚‚gpio4_dbckìti,gate-clock|Tx ƒƒgpio3_dbckìti,gate-clock|Tx „„gpio2_dbckìti,gate-clock|Tx  ……wdt3_fckìti,wait-gate-clock|Tx  ††per_l4_ickìfixed-factor-clock|1FQ UUgpio6_ickìti,omap3-interface-clock|Ux ‡‡gpio5_ickìti,omap3-interface-clock|Ux ˆˆgpio4_ickìti,omap3-interface-clock|Ux ‰‰gpio3_ickìti,omap3-interface-clock|Ux ŠŠgpio2_ickìti,omap3-interface-clock|Ux  ‹‹wdt3_ickìti,omap3-interface-clock|Ux  ŒŒuart3_ickìti,omap3-interface-clock|Ux  uart4_ickìti,omap3-interface-clock|Ux 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rng_ickìti,omap3-interface-clock|]x sha11_ickìti,omap3-interface-clock|]x des1_ickìti,omap3-interface-clock|]x cam_mclkìti,gate-clock|^xŒcam_ickì!ti,omap3-no-wait-interface-clock|1x ÎÎcsi2_96m_fckìti,gate-clock|8x ÏÏsecurity_l3_ickìfixed-factor-clock|0FQ __pka_ickìti,omap3-interface-clock|_x icr_ickìti,omap3-interface-clock|>x des2_ickìti,omap3-interface-clock|>x mspro_ickìti,omap3-interface-clock|>x mailboxes_ickìti,omap3-interface-clock|>x ssi_l4_ickìfixed-factor-clock|1FQ ffsr1_fckìti,wait-gate-clock|x sr2_fckìti,wait-gate-clock|x sr_l4_ickìfixed-factor-clock|1FQdpll2_fckìti,divider-clock|$x@/ ``dpll2_ckìti,omap3-dpll-clock|`x$@4µÇÏ aadpll2_m2_ckìti,divider-clock|a$xD/ bbiva2_ckìti,wait-gate-clock|bx ÐÐmodem_fckìti,omap3-interface-clock|x  ÑÑsad2d_ickìti,omap3-interface-clock|0x  ÒÒmad2d_ickìti,omap3-interface-clock|0x  ÓÓmspro_fckìti,wait-gate-clock|8x ssi_ssr_gate_fck_3430es2ì ti,composite-no-wait-gate-clock|x  ccssi_ssr_div_fck_3430es2ìti,composite-divider-clock|x @$ã ddssi_ssr_fck_3430es2ìti,composite-clock|cd eessi_sst_fck_3430es2ìfixed-factor-clock|eFQ ëëhsotgusb_ick_3430es2ì"ti,omap3-hsotgusb-interface-clock|=x  ssi_ick_3430es2ìti,omap3-ssi-interface-clock|fx  ììusim_gate_fckìti,composite-gate-clock|7 x  qqsys_d2_ckìfixed-factor-clock|FQ hhomap_96m_d2_fckìfixed-factor-clock|7FQ iiomap_96m_d4_fckìfixed-factor-clock|7FQ jjomap_96m_d8_fckìfixed-factor-clock|7FQ kkomap_96m_d10_fckìfixed-factor-clock|7FQ  lldpll5_m2_d4_ckìfixed-factor-clock|gFQ mmdpll5_m2_d8_ckìfixed-factor-clock|gFQ nndpll5_m2_d16_ckìfixed-factor-clock|gFQ oodpll5_m2_d20_ckìfixed-factor-clock|gFQ ppusim_mux_fckìti,composite-mux-clock(|hijklmnopx @/ rrusim_fckìti,composite-clock|qrusim_ickìti,omap3-interface-clock|Bx   ££dpll5_ckìti,omap3-dpll-clock|x  $ L 4µÇ ssdpll5_m2_ckìti,divider-clock|s$x P/ ggsgx_gate_fckìti,composite-gate-clock|x  {{core_d3_ckìfixed-factor-clock|FQ ttcore_d4_ckìfixed-factor-clock|FQ uucore_d6_ckìfixed-factor-clock|FQ vvomap_192m_alwon_fckìfixed-factor-clock|FQ wwcore_d2_ckìfixed-factor-clock|FQ xxsgx_mux_fckìti,composite-mux-clock |tuvwxyzx @ ||sgx_fckìti,composite-clock|{|sgx_ickìti,wait-gate-clock|0x  ÔÔcpefuse_fckìti,gate-clock|x  ÈÈts_fckìti,gate-clock|2x  ÉÉusbtll_fckìti,wait-gate-clock|gx  ÊÊusbtll_ickìti,omap3-interface-clock|>x  ËËmmchs3_ickìti,omap3-interface-clock|>x  ÌÌmmchs3_fckìti,wait-gate-clock|8x  ÍÍdss1_alwon_fck_3430es2ìti,dss-gate-clock|}xŒ §§dss_ick_3430es2ìti,omap3-dss-interface-clock|1x ¨¨usbhost_120m_fckìti,gate-clock|gx ÕÕusbhost_48m_fckìti,dss-gate-clock|"x ÖÖusbhost_ickìti,omap3-dss-interface-clock|1x ××uart4_fckìti,wait-gate-clock|Cx ššclockdomainscore_l3_clkdmti,clockdomain|~dpll3_clkdmti,clockdomain| dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|€‚ƒ„…†‡ˆ‰Š‹ŒŽ‘’“”•–—˜™šemu_clkdmti,clockdomain|Zdpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain$|›œžŸ ¡¢£dss_clkdmti,clockdomain|¤¥¦§¨core_l4_clkdmti,clockdomain”|©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍcam_clkdmti,clockdomain|ÎÏiva2_clkdmti,clockdomain|Ðdpll2_clkdmti,clockdomain|ad2d_clkdmti,clockdomain |ÑÒÓdpll5_clkdmti,clockdomain|ssgx_clkdmti,clockdomain|Ôusbhost_clkdmti,clockdomain |ÕÖ×scrm@48002000ti,omap3-scrmxH clocksmcbsp5_mux_fckìti,composite-mux-clock|89xØ ÙÙmcbsp5_fckìti,composite-clock|ØÙmcbsp1_mux_fckìti,composite-mux-clock|89xt ÛÛmcbsp1_fckìti,composite-clock|ÚÛmcbsp2_mux_fckìti,composite-mux-clock|Ü9xt ÞÞmcbsp2_fckìti,composite-clock|ÝÞmcbsp3_mux_fckìti,composite-mux-clock|Ü9xØ ààmcbsp3_fckìti,composite-clock|ßàmcbsp4_mux_fckìti,composite-mux-clock|Ü9xØ ââmcbsp4_fckìti,composite-clock|áâclockdomainscounter@48320000ti,omap-counter32kxH2  Åcounter_32kinterrupt-controller@48200000ti,omap3-intcïxH  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#address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsrangesdmasdma-namesstatus#clock-cellsclock-frequencylinux,phandleti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersinterrupt-controller#interrupt-cells#dma-cellsdma-channelsdma-requestspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsti,use_poweroff#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplypinctrl-namespinctrl-0vmmc-supplybus-widthti,non-removableti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-readgpmc,burst-wrapgpmc,burst-writegpmc,device-widthgpmc,mux-add-datagpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsgpmc,sync-clk-pslabelmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespower#address-cellti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infogpiostartup-delay-usenable-active-high