F8 (&)isee,omap3-igep0030ti,omap36xxti,omap3&*7IGEP COM MODULE Rev. E (TI OMAP AM/DM37x)chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@49042000memorylmemoryx cpuscpu@0arm,cortex-a8lcpux|cpus 'O 57pmuarm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocpti,omap3-l3-smxsimple-busxh l3_mainaes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocksvirt_16_8m_ck fixed-clockY  osc_sys_ck ti,mux-clock| x @  sys_ckti,divider-clock| xpsys_clkout1ti,gate-clock| x pdpll3_x2_ckfixed-factor-clock| 3>dpll3_m2x2_ckfixed-factor-clock| 3>dpll4_x2_ckfixed-factor-clock| 3>corex2_fckfixed-factor-clock|3>wkup_l4_ickfixed-factor-clock|3>AAcorex2_d3_fckfixed-factor-clock|3>xxcorex2_d5_fckfixed-factor-clock|3>yyclockdomainscm@48004000 ti,omap3-cmxH@@clocksdummy_apb_pclk fixed-clockomap_32k_fck fixed-clock11virt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ckti,omap3-dpll-per-j-type-clock|x D 0  dpll4_m2_ckti,divider-clock| ?x Hdpll4_m2x2_mul_ckfixed-factor-clock|3>dpll4_m2x2_ckti,hsdiv-gate-clock|x Homap_96m_alwon_fckfixed-factor-clock|3>dpll3_ckti,omap3-dpll-core-clock|x @ 0  dpll3_m3_ckti,divider-clock| x@dpll3_m3x2_mul_ckfixed-factor-clock|3>dpll3_m3x2_ckti,hsdiv-gate-clock| x Hemu_core_alwon_ckfixed-factor-clock|3>UUsys_altclk fixed-clockmcbsp_clks fixed-clock88dpll3_m2_ckti,divider-clock| x @  core_ckfixed-factor-clock| 3>dpll1_fckti,divider-clock|x @dpll1_ckti,omap3-dpll-clock|x  $ @ 4dpll1_x2_ckfixed-factor-clock|3>dpll1_x2m2_ckti,divider-clock|x D--cm_96m_fckfixed-factor-clock|3>omap_96m_fck ti,mux-clock|x @66dpll4_m3_ckti,divider-clock|  x@dpll4_m3x2_mul_ckfixed-factor-clock|3>dpll4_m3x2_ckti,hsdiv-gate-clock|x Homap_54m_fck ti,mux-clock|x @))cm_96m_d2_fckfixed-factor-clock|3>  omap_48m_fck ti,mux-clock| x @!!omap_12m_fckfixed-factor-clock|!3>::dpll4_m4_ckti,divider-clock|  x@""dpll4_m4x2_mul_ckti,fixed-factor-clock|"^ly##dpll4_m4x2_ckti,gate-clock|#x Hy||dpll4_m5_ckti,divider-clock| ?x@$$dpll4_m5x2_mul_ckti,fixed-factor-clock|$^ly%%dpll4_m5x2_ckti,hsdiv-gate-clock|%x Hy]]dpll4_m6_ckti,divider-clock| ?x@&&dpll4_m6x2_mul_ckfixed-factor-clock|&3>''dpll4_m6x2_ckti,hsdiv-gate-clock|'x H((emu_per_alwon_ckfixed-factor-clock|(3>VVclkout2_src_gate_ck ti,composite-no-wait-gate-clock|x p**clkout2_src_mux_ckti,composite-mux-clock|)x p++clkout2_src_ckti,composite-clock|*+,,sys_clkout2ti,divider-clock|,@x pmpu_ckfixed-factor-clock|-3>..arm_fckti,divider-clock|.x $emu_mpu_alwon_ckfixed-factor-clock|.3>WWl3_ickti,divider-clock|x @//l4_ickti,divider-clock|/x @00rm_ickti,divider-clock|0x @gpt10_gate_fckti,composite-gate-clock| x 22gpt10_mux_fckti,composite-mux-clock|1x @33gpt10_fckti,composite-clock|23gpt11_gate_fckti,composite-gate-clock| x 44gpt11_mux_fckti,composite-mux-clock|1x @55gpt11_fckti,composite-clock|45core_96m_fckfixed-factor-clock|63>77mmchs2_fckti,wait-gate-clock|7x mmchs1_fckti,wait-gate-clock|7x i2c3_fckti,wait-gate-clock|7x i2c2_fckti,wait-gate-clock|7x i2c1_fckti,wait-gate-clock|7x mcbsp5_gate_fckti,composite-gate-clock|8 x mcbsp1_gate_fckti,composite-gate-clock|8 x core_48m_fckfixed-factor-clock|!3>99mcspi4_fckti,wait-gate-clock|9x mcspi3_fckti,wait-gate-clock|9x mcspi2_fckti,wait-gate-clock|9x mcspi1_fckti,wait-gate-clock|9x uart2_fckti,wait-gate-clock|9x uart1_fckti,wait-gate-clock|9x  core_12m_fckfixed-factor-clock|:3>;;hdq_fckti,wait-gate-clock|;x core_l3_ickfixed-factor-clock|/3><<sdrc_ickti,wait-gate-clock|<x }}gpmc_fckfixed-factor-clock|<3>core_l4_ickfixed-factor-clock|03>==mmchs2_ickti,omap3-interface-clock|=x mmchs1_ickti,omap3-interface-clock|=x hdq_ickti,omap3-interface-clock|=x mcspi4_ickti,omap3-interface-clock|=x mcspi3_ickti,omap3-interface-clock|=x mcspi2_ickti,omap3-interface-clock|=x mcspi1_ickti,omap3-interface-clock|=x i2c3_ickti,omap3-interface-clock|=x i2c2_ickti,omap3-interface-clock|=x i2c1_ickti,omap3-interface-clock|=x uart2_ickti,omap3-interface-clock|=x uart1_ickti,omap3-interface-clock|=x  gpt11_ickti,omap3-interface-clock|=x  gpt10_ickti,omap3-interface-clock|=x  mcbsp5_ickti,omap3-interface-clock|=x  mcbsp1_ickti,omap3-interface-clock|=x  omapctrl_ickti,omap3-interface-clock|=x dss_tv_fckti,gate-clock|)xdss_96m_fckti,gate-clock|6xdss2_alwon_fckti,gate-clock|xdummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clock|x >>gpt1_mux_fckti,composite-mux-clock|1x @??gpt1_fckti,composite-clock|>?aes2_ickti,omap3-interface-clock|=x wkup_32k_fckfixed-factor-clock|13>@@gpio1_dbckti,gate-clock|@x sha12_ickti,omap3-interface-clock|=x wdt2_fckti,wait-gate-clock|@x wdt2_ickti,omap3-interface-clock|Ax wdt1_ickti,omap3-interface-clock|Ax gpio1_ickti,omap3-interface-clock|Ax omap_32ksync_ickti,omap3-interface-clock|Ax gpt12_ickti,omap3-interface-clock|Ax gpt1_ickti,omap3-interface-clock|Ax per_96m_fckfixed-factor-clock|3>per_48m_fckfixed-factor-clock|!3>BBuart3_fckti,wait-gate-clock|Bx gpt2_gate_fckti,composite-gate-clock|xCCgpt2_mux_fckti,composite-mux-clock|1x@DDgpt2_fckti,composite-clock|CDgpt3_gate_fckti,composite-gate-clock|xEEgpt3_mux_fckti,composite-mux-clock|1x@FFgpt3_fckti,composite-clock|EFgpt4_gate_fckti,composite-gate-clock|xGGgpt4_mux_fckti,composite-mux-clock|1x@HHgpt4_fckti,composite-clock|GHgpt5_gate_fckti,composite-gate-clock|xIIgpt5_mux_fckti,composite-mux-clock|1x@JJgpt5_fckti,composite-clock|IJgpt6_gate_fckti,composite-gate-clock|xKKgpt6_mux_fckti,composite-mux-clock|1x@LLgpt6_fckti,composite-clock|KLgpt7_gate_fckti,composite-gate-clock|xMMgpt7_mux_fckti,composite-mux-clock|1x@NNgpt7_fckti,composite-clock|MNgpt8_gate_fckti,composite-gate-clock| xOOgpt8_mux_fckti,composite-mux-clock|1x@PPgpt8_fckti,composite-clock|OPgpt9_gate_fckti,composite-gate-clock| xQQgpt9_mux_fckti,composite-mux-clock|1x@RRgpt9_fckti,composite-clock|QRper_32k_alwon_fckfixed-factor-clock|13>SSgpio6_dbckti,gate-clock|Sxgpio5_dbckti,gate-clock|Sxgpio4_dbckti,gate-clock|Sxgpio3_dbckti,gate-clock|Sxgpio2_dbckti,gate-clock|Sx wdt3_fckti,wait-gate-clock|Sx per_l4_ickfixed-factor-clock|03>TTgpio6_ickti,omap3-interface-clock|Txgpio5_ickti,omap3-interface-clock|Txgpio4_ickti,omap3-interface-clock|Txgpio3_ickti,omap3-interface-clock|Txgpio2_ickti,omap3-interface-clock|Tx wdt3_ickti,omap3-interface-clock|Tx uart3_ickti,omap3-interface-clock|Tx uart4_ickti,omap3-interface-clock|Txgpt9_ickti,omap3-interface-clock|Tx gpt8_ickti,omap3-interface-clock|Tx gpt7_ickti,omap3-interface-clock|Txgpt6_ickti,omap3-interface-clock|Txgpt5_ickti,omap3-interface-clock|Txgpt4_ickti,omap3-interface-clock|Txgpt3_ickti,omap3-interface-clock|Txgpt2_ickti,omap3-interface-clock|Txmcbsp2_ickti,omap3-interface-clock|Txmcbsp3_ickti,omap3-interface-clock|Txmcbsp4_ickti,omap3-interface-clock|Txmcbsp2_gate_fckti,composite-gate-clock|8xmcbsp3_gate_fckti,composite-gate-clock|8xmcbsp4_gate_fckti,composite-gate-clock|8xemu_src_mux_ck ti,mux-clock|UVWx@XXemu_src_ckti,clkdm-gate-clock|XYYpclk_fckti,divider-clock|Yx@pclkx2_fckti,divider-clock|Yx@atclk_fckti,divider-clock|Yx@traceclk_src_fck ti,mux-clock|UVWx@ZZtraceclk_fckti,divider-clock|Z x@secure_32k_fck fixed-clock[[gpt12_fckfixed-factor-clock|[3>wdt1_fckfixed-factor-clock|[3>security_l4_ick2fixed-factor-clock|03>\\aes1_ickti,omap3-interface-clock|\x rng_ickti,omap3-interface-clock|\x sha11_ickti,omap3-interface-clock|\x des1_ickti,omap3-interface-clock|\x cam_mclkti,gate-clock|]xycam_ick!ti,omap3-no-wait-interface-clock|0xcsi2_96m_fckti,gate-clock|7xsecurity_l3_ickfixed-factor-clock|/3>^^pka_ickti,omap3-interface-clock|^x icr_ickti,omap3-interface-clock|=x des2_ickti,omap3-interface-clock|=x mspro_ickti,omap3-interface-clock|=x mailboxes_ickti,omap3-interface-clock|=x ssi_l4_ickfixed-factor-clock|03>eesr1_fckti,wait-gate-clock|x sr2_fckti,wait-gate-clock|x sr_l4_ickfixed-factor-clock|03>dpll2_fckti,divider-clock|x@__dpll2_ckti,omap3-dpll-clock|_x$@4``dpll2_m2_ckti,divider-clock|`xDaaiva2_ckti,wait-gate-clock|axmodem_fckti,omap3-interface-clock|x sad2d_ickti,omap3-interface-clock|/x mad2d_ickti,omap3-interface-clock|/x mspro_fckti,wait-gate-clock|7x ssi_ssr_gate_fck_3430es2 ti,composite-no-wait-gate-clock|x bbssi_ssr_div_fck_3430es2ti,composite-divider-clock|x @$ccssi_ssr_fck_3430es2ti,composite-clock|bcddssi_sst_fck_3430es2fixed-factor-clock|d3>hsotgusb_ick_3430es2"ti,omap3-hsotgusb-interface-clock|<x ~~ssi_ick_3430es2ti,omap3-ssi-interface-clock|ex usim_gate_fckti,composite-gate-clock|6 x ppsys_d2_ckfixed-factor-clock|3>ggomap_96m_d2_fckfixed-factor-clock|63>hhomap_96m_d4_fckfixed-factor-clock|63>iiomap_96m_d8_fckfixed-factor-clock|63>jjomap_96m_d10_fckfixed-factor-clock|63> kkdpll5_m2_d4_ckfixed-factor-clock|f3>lldpll5_m2_d8_ckfixed-factor-clock|f3>mmdpll5_m2_d16_ckfixed-factor-clock|f3>nndpll5_m2_d20_ckfixed-factor-clock|f3>oousim_mux_fckti,composite-mux-clock(|ghijklmnox @qqusim_fckti,composite-clock|pqusim_ickti,omap3-interface-clock|Ax  dpll5_ckti,omap3-dpll-clock|x  $ L 4rrdpll5_m2_ckti,divider-clock|rx Pffsgx_gate_fckti,composite-gate-clock|x zzcore_d3_ckfixed-factor-clock|3>sscore_d4_ckfixed-factor-clock|3>ttcore_d6_ckfixed-factor-clock|3>uuomap_192m_alwon_fckfixed-factor-clock|3>vvcore_d2_ckfixed-factor-clock|3>wwsgx_mux_fckti,composite-mux-clock |stuvwxyx @{{sgx_fckti,composite-clock|z{sgx_ickti,wait-gate-clock|/x cpefuse_fckti,gate-clock|x ts_fckti,gate-clock|1x usbtll_fckti,wait-gate-clock|fx usbtll_ickti,omap3-interface-clock|=x mmchs3_ickti,omap3-interface-clock|=x mmchs3_fckti,wait-gate-clock|7x dss1_alwon_fck_3430es2ti,dss-gate-clock||xydss_ick_3430es2ti,omap3-dss-interface-clock|0xusbhost_120m_fckti,gate-clock|fxusbhost_48m_fckti,dss-gate-clock|!xusbhost_ickti,omap3-dss-interface-clock|0xuart4_fckti,wait-gate-clock|Bxclockdomainscore_l3_clkdmti,clockdomain|}~dpll3_clkdmti,clockdomain| dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|emu_clkdmti,clockdomain|Ydpll4_clkdmti,clockdomain| wkup_clkdmti,clockdomain$|dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|cam_clkdmti,clockdomain|iva2_clkdmti,clockdomain|dpll2_clkdmti,clockdomain|`d2d_clkdmti,clockdomain |dpll5_clkdmti,clockdomain|rsgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |scrm@48002000ti,omap3-scrmxH clocksmcbsp5_mux_fckti,composite-mux-clock|78xmcbsp5_fckti,composite-clock|mcbsp1_mux_fckti,composite-mux-clock|78xtmcbsp1_fckti,composite-clock|mcbsp2_mux_fckti,composite-mux-clock|8xtmcbsp2_fckti,composite-clock|mcbsp3_mux_fckti,composite-mux-clock|8xmcbsp3_fckti,composite-clock|mcbsp4_mux_fckti,composite-mux-clock|8xmcbsp4_fckti,composite-clock|clockdomainscounter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH`  `pinmux@48002030 ti,omap3-padconfpinctrl-singlexH 08'Epinmux_uart1_pinsbRLpinmux_uart3_pinsbnppinmux_mcbsp2_pins b pinmux_mmc1_pins0bpinmux_mmc2_pins0b(*,.02pinmux_smsc9221_pinsbpinmux_i2c1_pinsbpinmux_i2c3_pinsbpinmux_twl4030_pinsbApinmux_uart2_pins b<>@Bpinmux_lbee1usjyc_pinsb68:pinmux@48002a00 ti,omap3-padconfpinctrl-singlexH*\'Epinmux_twl4030_vpins btisyscon@48002270sysconxH"ppbias_regulatorti,pbias-omapxvpbias_mmc_omap2430}pbias_mmc_omap2430w@-gpio@48310000ti,omap3-gpioxH1gpio1gpio@49050000ti,omap3-gpioxIgpio2gpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio4gpio@49056000ti,omap3-gpioxI`!gpio5gpio@49058000ti,omap3-gpioxI"gpio6serial@4806a000ti,omap3-uartxH H12txrxuart1ldefault serial@4806c000ti,omap3-uartxHI34txrxuart2ldefault serial@49020000ti,omap3-uartxIJ56txrxuart3ldefault i2c@48070000 ti,omap3-i2cxH8txrxi2c1default '@twl@48xH& ti,twl4030default audioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio$twl4030-usbti,twl4030-usb 0>LZcpwmti,twl4030-pwmnpwmledti,twl4030-pwmlednpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadymadcti,twl4030-madci2c@48072000 ti,omap3-i2cxH 9txrxi2c2i2c@48060000 ti,omap3-i2cxH=txrxi2c3default mailbox@48094000ti,omap3-mailboxmailboxxH @dsp  spi@48098000ti,omap2-mcspixH Amcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH Bmcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0mcspi4FGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1=>txrxdefault (8mmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrxdefault (8Bmmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx Pdisabledmmu@480bd400ti,omap2-iommuxH mmu_ispWmmu@5d000000ti,omap2-iommux]mmu_iva Pdisabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@gmpu ;< qcommontxrxmcbsp1 txrx Pdisabledmcbsp@49022000ti,omap3-mcbspxI I gmpusidetone>?qcommontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxPokaydefault mcbsp@49024000ti,omap3-mcbspxI@I gmpusidetoneYZqcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx Pdisabledmcbsp@49026000ti,omap3-mcbspxI`gmpu 67 qcommontxrxmcbsp4txrx Pdisabledmcbsp@48096000ti,omap3-mcbspxH `gmpu QR qcommontxrxmcbsp5txrx Pdisabledsham@480c3000ti,omap3-shamshamxH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH timer@48318000ti,omap3430-timerxH1%timer1timer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11timer@48304000ti,omap3430-timerxH0@_timer12usbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hsohci@48064400ti,ohci-omap3xHD&Lehci@48064800 ti,ehci-omapxHH&Mgpmc@6e000000ti,omap3430-gpmcgpmcxnnand@0,0micron,mt29c4g96maz xbch8'8F,X,jy",(6@RR(partition@0SPLxpartition@80000U-Bootxpartition@1c0000 Environmentx(partition@280000Kernelx80partition@780000 Filesystemxhusb_otg_hs@480ab000ti,omap3-musbxH \]qmcdma usb_otg_hs)1 :IQ Vusb2-phy^`2dss@48050000 ti,omap3-dssxH Pdisabled dss_core|fckdispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H gprotophypll Pdisabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH Pdisabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  Pdisabled dss_venc|fcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiPokxHHgsysgddGqgdd_mpu |d ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portxHHgtxrx&CDssi-port@4805b000ti,omap3-ssi-portxHHgtxrx&EFserial@49042000ti,omap3-uartxI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 }abb_mpu_ivafxH0rH0hgbase-addressint-addresst|`sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singlexH%\'Epinmux_leds_core2_pinsb@soundti,omap-twl4030igep2regulator-vdd33regulator-fixed}vdd33gpio_leds gpio-ledsdefault user0omap3:red:user0 offuser1omap3:green:user1 offuser2omap3:red:user1 offbootomap3:green:boot  onlbee1usjyc_pdnregulator-fixed}regulator-lbee1usjyc-pdn2Z2Z  'lbee1usjyc_reset_n_wregulator-fixed}regulator-lbee1usjyc-reset-n-w2Z2Z   #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsrangesdmasdma-names#clock-cellsclock-frequencylinux,phandleti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersinterrupt-controller#interrupt-cells#dma-cellsdma-channelsdma-requestspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthnon-removablestatusti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespower#address-cellti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoti,modelti,mcbspti,codecregulator-always-ongpiosdefault-stategpiostartup-delay-usenable-active-high