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@66gpt11_fckti,composite-clockt56core_96m_fckfixed-factor-clockt7>I88mmchs2_fckti,wait-gate-clockt8p mmchs1_fckti,wait-gate-clockt8p i2c3_fckti,wait-gate-clockt8p i2c2_fckti,wait-gate-clockt8p i2c1_fckti,wait-gate-clockt8p mcbsp5_gate_fckti,composite-gate-clockt9 p mcbsp1_gate_fckti,composite-gate-clockt9 p core_48m_fckfixed-factor-clockt">I::mcspi4_fckti,wait-gate-clockt:p mcspi3_fckti,wait-gate-clockt:p mcspi2_fckti,wait-gate-clockt:p mcspi1_fckti,wait-gate-clockt:p uart2_fckti,wait-gate-clockt:p uart1_fckti,wait-gate-clockt:p  core_12m_fckfixed-factor-clockt;>I<<hdq_fckti,wait-gate-clockt<p core_l3_ickfixed-factor-clockt0>I==sdrc_ickti,wait-gate-clockt=p ~~gpmc_fckfixed-factor-clockt=>Icore_l4_ickfixed-factor-clockt1>I>>mmchs2_ickti,omap3-interface-clockt>p mmchs1_ickti,omap3-interface-clockt>p hdq_ickti,omap3-interface-clockt>p mcspi4_ickti,omap3-interface-clockt>p mcspi3_ickti,omap3-interface-clockt>p mcspi2_ickti,omap3-interface-clockt>p mcspi1_ickti,omap3-interface-clockt>p i2c3_ickti,omap3-interface-clockt>p i2c2_ickti,omap3-interface-clockt>p i2c1_ickti,omap3-interface-clockt>p uart2_ickti,omap3-interface-clockt>p uart1_ickti,omap3-interface-clockt>p  gpt11_ickti,omap3-interface-clockt>p  gpt10_ickti,omap3-interface-clockt>p  mcbsp5_ickti,omap3-interface-clockt>p  mcbsp1_ickti,omap3-interface-clockt>p  omapctrl_ickti,omap3-interface-clockt>p dss_tv_fckti,gate-clockt*pdss_96m_fckti,gate-clockt7pdss2_alwon_fckti,gate-clocktpdummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clocktp ??gpt1_mux_fckti,composite-mux-clockt2p @@@gpt1_fckti,composite-clockt?@aes2_ickti,omap3-interface-clockt>p wkup_32k_fckfixed-factor-clockt2>IAAgpio1_dbckti,gate-clocktAp sha12_ickti,omap3-interface-clockt>p wdt2_fckti,wait-gate-clocktAp wdt2_ickti,omap3-interface-clocktBp wdt1_ickti,omap3-interface-clocktBp gpio1_ickti,omap3-interface-clocktBp omap_32ksync_ickti,omap3-interface-clocktBp gpt12_ickti,omap3-interface-clocktBp gpt1_ickti,omap3-interface-clocktBp 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pRRgpt9_mux_fckti,composite-mux-clockt2p@SSgpt9_fckti,composite-clocktRSper_32k_alwon_fckfixed-factor-clockt2>ITTgpio6_dbckti,gate-clocktTpgpio5_dbckti,gate-clocktTpgpio4_dbckti,gate-clocktTpgpio3_dbckti,gate-clocktTpgpio2_dbckti,gate-clocktTp wdt3_fckti,wait-gate-clocktTp per_l4_ickfixed-factor-clockt1>IUUgpio6_ickti,omap3-interface-clocktUpgpio5_ickti,omap3-interface-clocktUpgpio4_ickti,omap3-interface-clocktUpgpio3_ickti,omap3-interface-clocktUpgpio2_ickti,omap3-interface-clocktUp wdt3_ickti,omap3-interface-clocktUp uart3_ickti,omap3-interface-clocktUp uart4_ickti,omap3-interface-clocktUpgpt9_ickti,omap3-interface-clocktUp gpt8_ickti,omap3-interface-clocktUp gpt7_ickti,omap3-interface-clocktUpgpt6_ickti,omap3-interface-clocktUpgpt5_ickti,omap3-interface-clocktUpgpt4_ickti,omap3-interface-clocktUpgpt3_ickti,omap3-interface-clocktUpgpt2_ickti,omap3-interface-clocktUpmcbsp2_ickti,omap3-interface-clocktUpmcbsp3_ickti,omap3-interface-clocktUpmcbsp4_ickti,omap3-interface-clocktUpmcbsp2_gate_fckti,composite-gate-clockt9pmcbsp3_gate_fckti,composite-gate-clockt9pmcbsp4_gate_fckti,composite-gate-clockt9pemu_src_mux_ck ti,mux-clocktVWXp@YYemu_src_ckti,clkdm-gate-clocktYZZpclk_fckti,divider-clocktZp@'pclkx2_fckti,divider-clocktZp@'atclk_fckti,divider-clocktZp@'traceclk_src_fck ti,mux-clocktVWXp@[[traceclk_fckti,divider-clockt[ p@'secure_32k_fck fixed-clock\\gpt12_fckfixed-factor-clockt\>Iwdt1_fckfixed-factor-clockt\>Isecurity_l4_ick2fixed-factor-clockt1>I]]aes1_ickti,omap3-interface-clockt]p rng_ickti,omap3-interface-clockt]p sha11_ickti,omap3-interface-clockt]p des1_ickti,omap3-interface-clockt]p cam_mclkti,gate-clockt^pcam_ick!ti,omap3-no-wait-interface-clockt1pcsi2_96m_fckti,gate-clockt8psecurity_l3_ickfixed-factor-clockt0>I__pka_ickti,omap3-interface-clockt_p icr_ickti,omap3-interface-clockt>p des2_ickti,omap3-interface-clockt>p mspro_ickti,omap3-interface-clockt>p mailboxes_ickti,omap3-interface-clockt>p ssi_l4_ickfixed-factor-clockt1>Iffsr1_fckti,wait-gate-clocktp sr2_fckti,wait-gate-clocktp sr_l4_ickfixed-factor-clockt1>Idpll2_fckti,divider-clocktp@'``dpll2_ckti,omap3-dpll-clockt`p$@4aadpll2_m2_ckti,divider-clocktapD'bbiva2_ckti,wait-gate-clocktbpmodem_fckti,omap3-interface-clocktp sad2d_ickti,omap3-interface-clockt0p mad2d_ickti,omap3-interface-clockt0p mspro_fckti,wait-gate-clockt8p ssi_ssr_gate_fck_3430es2 ti,composite-no-wait-gate-clocktp ccssi_ssr_div_fck_3430es2ti,composite-divider-clocktp @$ddssi_ssr_fck_3430es2ti,composite-clocktcdeessi_sst_fck_3430es2fixed-factor-clockte>Ihsotgusb_ick_3430es2"ti,omap3-hsotgusb-interface-clockt=p ssi_ick_3430es2ti,omap3-ssi-interface-clocktfp usim_gate_fckti,composite-gate-clockt7 p qqsys_d2_ckfixed-factor-clockt>Ihhomap_96m_d2_fckfixed-factor-clockt7>Iiiomap_96m_d4_fckfixed-factor-clockt7>Ijjomap_96m_d8_fckfixed-factor-clockt7>Ikkomap_96m_d10_fckfixed-factor-clockt7>I lldpll5_m2_d4_ckfixed-factor-clocktg>Immdpll5_m2_d8_ckfixed-factor-clocktg>Inndpll5_m2_d16_ckfixed-factor-clocktg>Ioodpll5_m2_d20_ckfixed-factor-clocktg>Ippusim_mux_fckti,composite-mux-clock(thijklmnopp @'rrusim_fckti,composite-clocktqrusim_ickti,omap3-interface-clocktBp  dpll5_ckti,omap3-dpll-clocktp  $ L 4ssdpll5_m2_ckti,divider-clocktsp P'ggsgx_gate_fckti,composite-gate-clocktp {{core_d3_ckfixed-factor-clockt>Ittcore_d4_ckfixed-factor-clockt>Iuucore_d6_ckfixed-factor-clockt>Ivvomap_192m_alwon_fckfixed-factor-clockt>Iwwcore_d2_ckfixed-factor-clockt>Ixxsgx_mux_fckti,composite-mux-clock ttuvwxyzp @||sgx_fckti,composite-clockt{|sgx_ickti,wait-gate-clockt0p cpefuse_fckti,gate-clocktp ts_fckti,gate-clockt2p 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#address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsrangesdmasdma-namesstatus#clock-cellsclock-frequencylinux,phandleti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersinterrupt-controller#interrupt-cells#dma-cellsdma-channelsdma-requestspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyspi-cphati,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplycd-gpiosbus-widthnon-removablecap-power-off-cardti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowergpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbspti,codecenable-active-low