fd8_(_#Freescale i.MX6 SoloLite EVK Board!fsl,imx6sl-evkfsl,imx6slchosenaliases),/soc/aips-bus@02100000/ethernet@02188000%6/soc/aips-bus@02000000/gpio@0209c000%Pjsw1c8>Pjsw2 52Z>sw3a">sw3b">sw4 52ZswbstLK@N0R/X/vsnvsB@->vrefddr>vgen1 5vgen2 5vgen3w@2ZR)X)vgen4w@2Zvgen5w@2Zvgen6w@2Zi2c@021a4000!fsl,imx6sl-i2cfsl,imx21-i2c@@ %kokaymdefault(wm8962@1a !wlf,wm8962fe)r*))*)++R1X1i2c@021a8000!fsl,imx6sl-i2cfsl,imx21-i2c@ &l disabledmmdc@021b0000!fsl,imx6sl-mmdcfsl,imx6q-mmdc@rngb@021b4000@@ weim@021b8000@ ocotp@021bc000!fsl,imx6sl-ocotpsyscon@RXaudmux@021d8000#!fsl,imx6sl-audmuxfsl,imx31-audmux@okaydefault,backlight!pwm-backlight -LK@  @leds !gpio-ledsdefault.userdebug & heartbeatregulators !simple-busregulator@0!regulator-fixedusb_otg1_vbusLK@LK@ #6/RXregulator@1!regulator-fixedusb_otg2_vbusLK@LK@ #6/RXregulator@2!regulator-fixedwm8962-supply-3v1500>R*X*regulator@3!regulator-fixedwm8962-supply-4v2AA>R+X+regulator@4!regulator-fixedlcd-3v3 #RXsound+!fsl,imx6sl-evk-wm8962fsl,imx-audio-wm8962 wm8962-audioA0P1c\Headphone JackHPOUTLHeadphone JackHPOUTRExt SpkSPKOUTLExt SpkSPKOUTRAMICMICBIASIN3RAMICjw #address-cells#size-cellsmodelcompatibleethernet0gpio0gpio1gpio2gpio3gpio4serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1device_typeregnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyclocksclock-namesarm-supplypu-supplysoc-supply#interrupt-cellsinterrupt-controllerlinux,phandle#clock-cellsclock-frequencyinterrupt-parentrangesinterruptscache-unifiedcache-levelarm,tag-latencyarm,data-latencystatusfsl,spi-num-chipselectscs-gpiospinctrl-namespinctrl-0spi-max-frequencydmasdma-names#sound-dai-cellsfsl,fifo-depth#pwm-cellsgpio-controller#gpio-cellslinux,keymapregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthfsl,tempmonfsl,tempmon-datafsl,anatop#reset-cellsfsl,pins#dma-cellsfsl,sdma-ram-script-namelcd-supplydisplaybits-per-pixelbus-widthnative-modehactivevactivehback-porchhfront-porchvback-porchvfront-porchhsync-lenvsync-lenhsync-activevsync-activede-activepixelclk-activefsl,usbphyfsl,usbmiscvbus-supplydisable-over-currentdr_mode#index-cellspinctrl-1phy-modepinctrl-2cd-gpioswp-gpiosregulator-boot-onregulator-ramp-delayDCVDD-supplyDBVDD-supplyAVDD-supplyCPVDD-supplyMICVDD-supplyPLLVDD-supplySPKVDD1-supplySPKVDD2-supplypwmsbrightness-levelsdefault-brightness-levellabellinux,default-triggergpioenable-active-highvin-supplyssi-controlleraudio-codecaudio-routingmux-int-portmux-ext-port