m8g(gUdoo i.MX6 Quad Board!udoo,imx6q-udoofsl,imx6qchosen',/soc/aips-bus@02100000/serial@021e8000aliases)8/soc/aips-bus@02100000/ethernet@02188000(B/soc/aips-bus@02000000/flexcan@02090000(G/soc/aips-bus@02000000/flexcan@02094000%L/soc/aips-bus@02000000/gpio@0209c000%R/soc/aips-bus@02000000/gpio@020a0000%X/soc/aips-bus@02000000/gpio@020a4000%^/soc/aips-bus@02000000/gpio@020a8000%d/soc/aips-bus@02000000/gpio@020ac000%j/soc/aips-bus@02000000/gpio@020b0000%p/soc/aips-bus@02000000/gpio@020b4000$v/soc/aips-bus@02100000/i2c@021a0000${/soc/aips-bus@02100000/i2c@021a4000$/soc/aips-bus@02100000/i2c@021a8000&/soc/aips-bus@02100000/usdhc@02190000&/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02018000memorymemory@interrupt-controller@00a01000!arm,cortex-a9-gic  &clocksckil!fsl,imx-ckilfixed-clock.;ckih1!fsl,imx-ckih1fixed-clock.;osc!fsl,imx-oscfixed-clock.;n6soc !simple-busK\dma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0c    ngpmi0gpmi1gpmi2gpmi3~j &gpmi-nand@00112000!fsl,imx6q-gpmi-nand @ gpmi-nandbch cnbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-tx disabledtimer@00a00600!arm,cortex-a9-twd-timer  c l2-cache@00a02000!arm,pl310-cache  c\   2&2pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ dbiconfigpciH\ cxnmsi!{zyxpciepcie_buspcie_phy disabledpmu!arm,cortex-a9-pmu c^aips-bus@02000000!fsl,aips-bussimple-bus\spba-bus@02000000!fsl,spba-bussimple-bus\spdif@02004000!fsl,imx35-spdif@@ c4 rxtxH5corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7 disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ cppipgper rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ c qqipgper rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ c!rripgper rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ c"ssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart@ cipgper rxtx disabledesai@02024000@@ c3ssi@02028000/!fsl,imx6q-ssifsl,imx51-ssi@ c. ipgbaud %&rxtx@ disabledssi@0202c000/!fsl,imx6q-ssifsl,imx51-ssi@ c/ ipgbaud )*rxtx@ disabledssi@02030000/!fsl,imx6q-ssifsl,imx51-ssi@ c0 ipgbaud -.rxtx@ disabledasrc@02034000@@ c2spba@0203c000@ecspi@02018000 !fsl,imx6q-ecspifsl,imx51-ecspi@ c#ttipgper   rxtx disabledvpu@02040000!fsl,imx6q-vpucnm,coda960c  nbitjpegperahbOVaipstz@0207c000@pwm@02080000[!fsl,imx6q-pwmfsl,imx27-pwm@ cS>ipgperpwm@02084000[!fsl,imx6q-pwmfsl,imx27-pwm@@ cT>ipgperpwm@02088000[!fsl,imx6q-pwmfsl,imx27-pwm@ cU>ipgperpwm@0208c000[!fsl,imx6q-pwmfsl,imx27-pwm@ cV>ipgperflexcan@02090000!fsl,imx6q-flexcan @ cnlmipgper disabledflexcan@02094000!fsl,imx6q-flexcan @@ conoipgper disabledgpt@02098000!fsl,imx6q-gptfsl,imx31-gpt @ c7wxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @cBCfv gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @cDEfv gpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@cFGfv gpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @cHIfv gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @cJKfv gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @cLMfv gpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@cNOfv  :&:kpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ cR> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ cPwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ cQ disabledccm@020c4000!fsl,imx6q-ccm @@cWX. &anatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $c16 &regulator-1p1@110!fsl,anatop-regulatorvdd1p1 5$ 57regulator-3p0@120!fsl,anatop-regulatorvdd3p0*0 $( 73@regulator-2p5@130!fsl,anatop-regulatorvdd2p5)00$7)0regulator-vddcore@140!fsl,anatop-regulatorvddarm  @Jpby$ 7  3&3regulator-vddpu@140!fsl,anatop-regulatorvddpu  @ Jpby$ 7  4&4regulator-vddsoc@140!fsl,anatop-regulatorvddsoc  @Jpby$ 7  5&5tempmon!fsl,imx6q-tempmon c1usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  c, &usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  c- &snvs@020cc000!fsl,sec-v4.0-monsimple-bus \ @snvs-rtc-lp@34!fsl,sec-v4.0-mon-rtc-lp4Xcsnvs-poweroff@38!fsl,sec-v4.0-poweroff8 disabledepit@020d0000 @ c8epit@020d4000 @@ c9src@020d8000!fsl,imx6q-srcfsl,imx51-src @c[` &gpc@020dc000!fsl,imx6q-gpc @cYZiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8 & iomuxc@020e0000!fsl,imx6q-iomuxc@ipu2ipu2grp-1\p`tdxh|lptx|imx6q-udooenetgrpDpHxL|PTlXXl\p`tdxh|t@H<@ &i2c2grp0@@ &uart2grp0 ( #&#usbhgrp0L0 &usdhc3grppYYpYpYpYpY &ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldb  disabled@!"'()*8di0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0 disabledport@0endpoint  &&&port@1endpoint  *&*port@2endpoint  -&-port@3endpoint  0&0lvds-channel@1 disabledport@0endpoint '&'port@1endpoint +&+port@2endpoint .&.port@3endpoint 1&1hdmi@0120000 cs {| iahbisfrokay!fsl,imx6q-hdmiport@0endpoint $&$port@1endpoint (&(port@2endpoint ,&,port@3endpoint /&/dcic@020e4000@@ c|dcic@020e8000@ c}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ cipgahb~imx/sdma/sdma-imx6q.bin &aips-bus@02100000!fsl,aips-bussimple-bus\caam@02100000cijaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ c+ disabledusb@02184200!fsl,imx6q-usbfsl,imx27-usbB c(okaydefault,6usb@02184400!fsl,imx6q-usbfsl,imx27-usbD c) disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF c* disabledusbmisc@02184800B!fsl,imx6q-usbmiscH &ethernet@02188000!fsl,imx6q-fec@ Ovwuu ipgahbptpokaydefault,crgmiimlb@0218c000@$c5u~usdhc@02190000!fsl,imx6q-usdhc@ c ipgahbperl disabledusdhc@02194000!fsl,imx6q-usdhc@@ c ipgahbperl disabledusdhc@02198000!fsl,imx6q-usdhc@ c ipgahbperlokaydefault,vusdhc@0219c000!fsl,imx6q-usdhc@ c ipgahbperl disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ c$} disabledi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ c%~okay;default, &i2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ c& disabledromcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ cocotp@021bc000!fsl,imx6q-ocotpsyscon@ &tzasc@021d0000@ cltzasc@021d4000@@ cmaudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@ disabledmipi@021dc000@mipi@021e0000@ disabledport@0endpoint %&%port@1endpoint  )&)port@2endpoint!port@3endpoint"vdoa@021e4000@@ cserial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ cipgper rxtxokaydefault,#serial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ cipgper rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ cipgper  rxtx disabledserial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ cipgper !"rxtx disabledipu@02400000!fsl,imx6q-ipu@@c busdi0di1Oport@0port@1port@2 6&6endpoint@0endpoint@1$ &endpoint@2% &endpoint@3& & endpoint@4' &port@3 7&7endpoint@0endpoint@1( &endpoint@2) & endpoint@3* & endpoint@4+ &sram@00900000 !mmio-sram &sata@02200000!fsl,imx6q-ahci @ c'isatasata_refahbokayipu@02800000!fsl,imx6q-ipu@c busdi0di1Oport@0port@1port@2 8&8endpoint@0endpoint@1, &endpoint@2 !&!endpoint@3- & endpoint@4. &port@3 9&9endpoint@1/ &endpoint@2 "&"endpoint@30 & endpoint@41 &cpuscpu@0!arm,cortex-a9cpu2(Otx2   (Otx2   l(h)armpll2_pfd2_396msteppll1_swpll1_sys345cpu@1!arm,cortex-a9cpu2cpu@2!arm,cortex-a9cpu2cpu@3!arm,cortex-a9cpu2display-subsystem!fsl,imx-display-subsystem6789regulators !simple-busregulator@0!regulator-fixed usb_h1_vbusLK@LK@ :  & #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1spi4device_typereg#interrupt-cellsinterrupt-controllerlinux,phandle#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesstatuscache-unifiedcache-levelarm,tag-latencyarm,data-latencynum-lanesinterrupt-map-maskinterrupt-map#sound-dai-cellsfsl,fifo-depthresetsiram#pwm-cellsgpio-controller#gpio-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthfsl,tempmonfsl,tempmon-datafsl,anatop#reset-cellsfsl,pinsgprremote-endpointddc-i2c-busfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscpinctrl-namespinctrl-0vbus-supply#index-cellsinterrupts-extendedphy-modebus-widthnon-removablenext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportsenable-active-highstartup-delay-usgpio