gP8a(Xa#DFI FS700-M60-6DL i.MX6dl Q7 Board,!dfi,fs700-m60-6dldfi,fs700e-m60fsl,imx6dlchosen9,/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000aliases)8/soc/aips-bus@02100000/ethernet@02188000(B/soc/aips-bus@02000000/flexcan@02090000(G/soc/aips-bus@02000000/flexcan@02094000%L/soc/aips-bus@02000000/gpio@0209c000%R/soc/aips-bus@02000000/gpio@020a0000%X/soc/aips-bus@02000000/gpio@020a4000%^/soc/aips-bus@02000000/gpio@020a8000%d/soc/aips-bus@02000000/gpio@020ac000%j/soc/aips-bus@02000000/gpio@020b0000%p/soc/aips-bus@02000000/gpio@020b4000$v/soc/aips-bus@02100000/i2c@021a0000${/soc/aips-bus@02100000/i2c@021a4000$/soc/aips-bus@02100000/i2c@021a8000&/soc/aips-bus@02100000/usdhc@02190000&/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca000$/soc/aips-bus@02100000/i2c@021f8000memorymemoryinterrupt-controller@00a01000!arm,cortex-a9-gic  &clocksckil!fsl,imx-ckilfixed-clock.;ckih1!fsl,imx-ckih1fixed-clock.;osc!fsl,imx-oscfixed-clock.;n6soc !simple-busK\dma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0c    ngpmi0gpmi1gpmi2gpmi3~j &gpmi-nand@00112000!fsl,imx6q-gpmi-nand @ gpmi-nandbch cnbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-tx disabledtimer@00a00600!arm,cortex-a9-twd-timer  c l2-cache@00a02000!arm,pl310-cache  c\   )&)pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ dbiconfigpciH\ cxnmsi!{zyxpciepcie_buspcie_phy disabledpmu!arm,cortex-a9-pmu c^aips-bus@02000000!fsl,aips-bussimple-bus\spba-bus@02000000!fsl,spba-bussimple-bus\spdif@02004000!fsl,imx35-spdif@@ c4 rxtxH5corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7 disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ cppipgper rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ c qqipgper rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ c!rripgper rxtxokay/ GPdefault^m25p80@0!sst,sst25vf040bm25p80h1-ecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ c"ssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart@ cipgper rxtxokayPdefault^esai@02024000@@ c3ssi@02028000z!fsl,imx6q-ssifsl,imx51-ssi@ c. ipgbaud %&rxtx disabledssi@0202c000z!fsl,imx6q-ssifsl,imx51-ssi@ c/ ipgbaud )*rxtx disabledssi@02030000z!fsl,imx6q-ssifsl,imx51-ssi@ c0 ipgbaud -.rxtx disabledasrc@02034000@@ c2spba@0203c000@vpu@02040000!fsl,imx6dl-vpucnm,coda960c  nbitjpegperahb aipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ cS>ipgperpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ cT>ipgperpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ cU>ipgperpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ cV>ipgperflexcan@02090000!fsl,imx6q-flexcan @ cnlmipgper disabledflexcan@02094000!fsl,imx6q-flexcan @@ conoipgper disabledgpt@02098000!fsl,imx6q-gptfsl,imx31-gpt @ c7wxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @cBC gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @cDE  &gpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@cFG  /&/gpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @cHI  &gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @cJK gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @cLM gpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@cNO kpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ cR> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ cPwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ cQ disabledccm@020c4000!fsl,imx6q-ccm @@cWX. &anatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $c16 & regulator-1p1@110!fsl,anatop-regulatorvdd1p1 5  2G\o 5regulator-3p0@120!fsl,anatop-regulatorvdd3p0*0   2G\o( 3@regulator-2p5@130!fsl,anatop-regulatorvdd2p5)0  02G\o)0regulator-vddcore@140!fsl,anatop-regulatorvddarm    @2Gp\o   *&*regulator-vddpu@140!fsl,anatop-regulatorvddpu    @2 Gp\o   +&+regulator-vddsoc@140!fsl,anatop-regulatorvddsoc    @2Gp\o   ,&,tempmon!fsl,imx6q-tempmon c1  usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  c,  &usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  c-  &snvs@020cc000!fsl,sec-v4.0-monsimple-bus \ @snvs-rtc-lp@34!fsl,sec-v4.0-mon-rtc-lp4Xcsnvs-poweroff@38!fsl,sec-v4.0-poweroff8 disabledepit@020d0000 @ c8epit@020d4000 @@ c9src@020d8000!fsl,imx6q-srcfsl,imx51-src @c[` &gpc@020dc000!fsl,imx6q-gpc @cYZiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8 & iomuxc@020e0000!fsl,imx6dl-iomuxc@Pdefault^ imx6qdl-dfi-fs700-m60hoggrp`l<0 & enetgrp $( @ &i2c2grp0p@Dt@ &uart1grp0L`Pd &usbotggrppY &usdhc2grppY 0YpYpYpYpYt &usdhc3grppY  4YpYpYpY pY &usdhc4grp<$pY8 8Y@(pYD,pYH0pYL4pYP8pYT<pYX@pY\DpY &ecspi3grp` &ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldb  disabled0!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0 disabledport@0endpoint #&#port@1endpoint '&'lvds-channel@1 disabledport@0endpoint $&$port@1endpoint (&(hdmi@0120000 cs {| iahbisfr disabled!fsl,imx6dl-hdmiport@0endpoint !&!port@1endpoint %&%dcic@020e4000@@ c|dcic@020e8000@ c}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ cipgahb~-imx/sdma/sdma-imx6q.bin &pxp@020f0000@ cbepdc@020f4000@@ calcdif@020f8000@ c'aips-bus@02100000!fsl,aips-bussimple-bus\caam@02100000cijaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ c+FQokay]Pdefault^i~hostusb@02184200!fsl,imx6q-usbfsl,imx27-usbB c(FQokayusb@02184400!fsl,imx6q-usbfsl,imx27-usbD c)Q disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF c*Q disabledusbmisc@02184800!fsl,imx6q-usbmiscH &ethernet@02188000!fsl,imx6q-fec@ vwuu ipgahbptpokayPdefault^rgmiimlb@0218c000@$c5u~usdhc@02190000!fsl,imx6q-usdhc@ c ipgahbper disabledusdhc@02194000!fsl,imx6q-usdhc@@ c ipgahbperokayPdefault^ usdhc@02198000!fsl,imx6q-usdhc@ c ipgahbper disabledPdefault^usdhc@0219c000!fsl,imx6q-usdhc@ c ipgahbperokayPdefault^i2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ c$} disabledi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ c%~okayPdefault^i2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ c& disabledromcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ cocotp@021bc000!fsl,imx6q-ocotpsyscon@ & tzasc@021d0000@ cltzasc@021d4000@@ cmaudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@ disabledmipi@021dc000@mipi@021e0000@ disabledport@0endpoint "&"port@1endpoint  &&&vdoa@021e4000@@ cserial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ cipgper rxtx disabledserial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ cipgper rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ cipgper  rxtx disabledserial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ cipgper !"rxtx disabledi2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c@ c#t disabledipu@02400000!fsl,imx6q-ipu@@c busdi0di1port@0port@1port@2 -&-endpoint@0endpoint@1! &endpoint@2" &endpoint@3# &endpoint@4$ &port@3 .&.endpoint@0endpoint@1% &endpoint@2& & endpoint@3' &endpoint@4( &sram@00900000 !mmio-sram & cpuscpu@0!arm,cortex-a9cpu)2  g82   l(h)armpll2_pfd2_396msteppll1_swpll1_sys*%+/,cpu@1!arm,cortex-a9cpu)display-subsystem!fsl,imx-display-subsystem:-.regulators !simple-busregulator@0!regulator-fixed dummy-supplyregulator@1!regulator-fixed usb_otg_vbusLK@LK@ @/E & #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3device_typereg#interrupt-cellsinterrupt-controllerlinux,phandle#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesstatuscache-unifiedcache-levelarm,tag-latencyarm,data-latencynum-lanesinterrupt-map-maskinterrupt-mapfsl,spi-num-chipselectscs-gpiospinctrl-namespinctrl-0spi-max-frequency#sound-dai-cellsfsl,fifo-depthresetsiram#pwm-cellsgpio-controller#gpio-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthfsl,tempmonfsl,tempmon-datafsl,anatop#reset-cellsfsl,pinsgprremote-endpointfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-modebus-widthcd-gpiosnon-removablenext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportsgpioenable-active-high