e8(e(ti,am3517-craneboardti,am3517ti,omap3&#7TI AM3517 CraneBoard (TMDSEVM3517)chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@4809e000memorylmemoryxcpuscpu@0arm,cortex-a8lcpux|cpupmuarm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocpti,omap3-l3-smxsimple-busxh l3_mainaes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocksvirt_16_8m_ck fixed-clockY  osc_sys_ck ti,mux-clock| x @  sys_ckti,divider-clock| xpsys_clkout1ti,gate-clock| x pdpll3_x2_ckfixed-factor-clock| )4dpll3_m2x2_ckfixed-factor-clock| )4dpll4_x2_ckfixed-factor-clock| )4corex2_fckfixed-factor-clock|)4wkup_l4_ickfixed-factor-clock|)4AAcorex2_d3_fckfixed-factor-clock|)4bbcorex2_d5_fckfixed-factor-clock|)4ccclockdomainscm@48004000 ti,omap3-cmxH@@clocksdummy_apb_pclk fixed-clockomap_32k_fck fixed-clock11virt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ckti,omap3-dpll-per-clock|x D 0  dpll4_m2_ckti,divider-clock| ?x Hdpll4_m2x2_mul_ckfixed-factor-clock|)4dpll4_m2x2_ckti,gate-clock|x >omap_96m_alwon_fckfixed-factor-clock|)4dpll3_ckti,omap3-dpll-core-clock|x @ 0  dpll3_m3_ckti,divider-clock| x@dpll3_m3x2_mul_ckfixed-factor-clock|)4dpll3_m3x2_ckti,gate-clock| x >emu_core_alwon_ckfixed-factor-clock|)4UUsys_altclk fixed-clockmcbsp_clks fixed-clock88dpll3_m2_ckti,divider-clock| x @  core_ckfixed-factor-clock| )4dpll1_fckti,divider-clock|x @dpll1_ckti,omap3-dpll-clock|x  $ @ 4dpll1_x2_ckfixed-factor-clock|)4dpll1_x2m2_ckti,divider-clock|x D--cm_96m_fckfixed-factor-clock|)4omap_96m_fck ti,mux-clock|x @66dpll4_m3_ckti,divider-clock|  x@dpll4_m3x2_mul_ckfixed-factor-clock|)4dpll4_m3x2_ckti,gate-clock|x >omap_54m_fck ti,mux-clock|x @))cm_96m_d2_fckfixed-factor-clock|)4  omap_48m_fck ti,mux-clock| x @!!omap_12m_fckfixed-factor-clock|!)4::dpll4_m4_ckti,divider-clock|  x@""dpll4_m4x2_mul_ckti,fixed-factor-clock|"Tbo##dpll4_m4x2_ckti,gate-clock|#x >oggdpll4_m5_ckti,divider-clock| ?x@$$dpll4_m5x2_mul_ckti,fixed-factor-clock|$Tbo%%dpll4_m5x2_ckti,gate-clock|%x >odpll4_m6_ckti,divider-clock| ?x@&&dpll4_m6x2_mul_ckfixed-factor-clock|&)4''dpll4_m6x2_ckti,gate-clock|'x >((emu_per_alwon_ckfixed-factor-clock|()4VVclkout2_src_gate_ck ti,composite-no-wait-gate-clock|x p**clkout2_src_mux_ckti,composite-mux-clock|)x p++clkout2_src_ckti,composite-clock|*+,,sys_clkout2ti,divider-clock|,@x pmpu_ckfixed-factor-clock|-)4..arm_fckti,divider-clock|.x $emu_mpu_alwon_ckfixed-factor-clock|.)4WWl3_ickti,divider-clock|x @//l4_ickti,divider-clock|/x @00rm_ickti,divider-clock|0x @gpt10_gate_fckti,composite-gate-clock| x 22gpt10_mux_fckti,composite-mux-clock|1x @33gpt10_fckti,composite-clock|23gpt11_gate_fckti,composite-gate-clock| x 44gpt11_mux_fckti,composite-mux-clock|1x @55gpt11_fckti,composite-clock|45core_96m_fckfixed-factor-clock|6)477mmchs2_fckti,wait-gate-clock|7x mmchs1_fckti,wait-gate-clock|7x i2c3_fckti,wait-gate-clock|7x i2c2_fckti,wait-gate-clock|7x i2c1_fckti,wait-gate-clock|7x mcbsp5_gate_fckti,composite-gate-clock|8 x mcbsp1_gate_fckti,composite-gate-clock|8 x core_48m_fckfixed-factor-clock|!)499mcspi4_fckti,wait-gate-clock|9x mcspi3_fckti,wait-gate-clock|9x mcspi2_fckti,wait-gate-clock|9x mcspi1_fckti,wait-gate-clock|9x uart2_fckti,wait-gate-clock|9x uart1_fckti,wait-gate-clock|9x  core_12m_fckfixed-factor-clock|:)4;;hdq_fckti,wait-gate-clock|;x core_l3_ickfixed-factor-clock|/)4<<sdrc_ickti,wait-gate-clock|<x hhgpmc_fckfixed-factor-clock|<)4core_l4_ickfixed-factor-clock|0)4==mmchs2_ickti,omap3-interface-clock|=x mmchs1_ickti,omap3-interface-clock|=x hdq_ickti,omap3-interface-clock|=x mcspi4_ickti,omap3-interface-clock|=x mcspi3_ickti,omap3-interface-clock|=x mcspi2_ickti,omap3-interface-clock|=x mcspi1_ickti,omap3-interface-clock|=x i2c3_ickti,omap3-interface-clock|=x i2c2_ickti,omap3-interface-clock|=x i2c1_ickti,omap3-interface-clock|=x uart2_ickti,omap3-interface-clock|=x uart1_ickti,omap3-interface-clock|=x  gpt11_ickti,omap3-interface-clock|=x  gpt10_ickti,omap3-interface-clock|=x  mcbsp5_ickti,omap3-interface-clock|=x  mcbsp1_ickti,omap3-interface-clock|=x  omapctrl_ickti,omap3-interface-clock|=x dss_tv_fckti,gate-clock|)xdss_96m_fckti,gate-clock|6xdss2_alwon_fckti,gate-clock|xdummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clock|x >>gpt1_mux_fckti,composite-mux-clock|1x @??gpt1_fckti,composite-clock|>?aes2_ickti,omap3-interface-clock|=x wkup_32k_fckfixed-factor-clock|1)4@@gpio1_dbckti,gate-clock|@x sha12_ickti,omap3-interface-clock|=x wdt2_fckti,wait-gate-clock|@x wdt2_ickti,omap3-interface-clock|Ax wdt1_ickti,omap3-interface-clock|Ax gpio1_ickti,omap3-interface-clock|Ax omap_32ksync_ickti,omap3-interface-clock|Ax gpt12_ickti,omap3-interface-clock|Ax gpt1_ickti,omap3-interface-clock|Ax per_96m_fckfixed-factor-clock|)4per_48m_fckfixed-factor-clock|!)4BBuart3_fckti,wait-gate-clock|Bx oogpt2_gate_fckti,composite-gate-clock|xCCgpt2_mux_fckti,composite-mux-clock|1x@DDgpt2_fckti,composite-clock|CDgpt3_gate_fckti,composite-gate-clock|xEEgpt3_mux_fckti,composite-mux-clock|1x@FFgpt3_fckti,composite-clock|EFgpt4_gate_fckti,composite-gate-clock|xGGgpt4_mux_fckti,composite-mux-clock|1x@HHgpt4_fckti,composite-clock|GHgpt5_gate_fckti,composite-gate-clock|xIIgpt5_mux_fckti,composite-mux-clock|1x@JJgpt5_fckti,composite-clock|IJgpt6_gate_fckti,composite-gate-clock|xKKgpt6_mux_fckti,composite-mux-clock|1x@LLgpt6_fckti,composite-clock|KLgpt7_gate_fckti,composite-gate-clock|xMMgpt7_mux_fckti,composite-mux-clock|1x@NNgpt7_fckti,composite-clock|MNgpt8_gate_fckti,composite-gate-clock| xOOgpt8_mux_fckti,composite-mux-clock|1x@PPgpt8_fckti,composite-clock|OPgpt9_gate_fckti,composite-gate-clock| xQQgpt9_mux_fckti,composite-mux-clock|1x@RRgpt9_fckti,composite-clock|QRper_32k_alwon_fckfixed-factor-clock|1)4SSgpio6_dbckti,gate-clock|Sxppgpio5_dbckti,gate-clock|Sxqqgpio4_dbckti,gate-clock|Sxrrgpio3_dbckti,gate-clock|Sxssgpio2_dbckti,gate-clock|Sx ttwdt3_fckti,wait-gate-clock|Sx uuper_l4_ickfixed-factor-clock|0)4TTgpio6_ickti,omap3-interface-clock|Txvvgpio5_ickti,omap3-interface-clock|Txwwgpio4_ickti,omap3-interface-clock|Txxxgpio3_ickti,omap3-interface-clock|Txyygpio2_ickti,omap3-interface-clock|Tx zzwdt3_ickti,omap3-interface-clock|Tx {{uart3_ickti,omap3-interface-clock|Tx ||uart4_ickti,omap3-interface-clock|Tx}}gpt9_ickti,omap3-interface-clock|Tx ~~gpt8_ickti,omap3-interface-clock|Tx gpt7_ickti,omap3-interface-clock|Txgpt6_ickti,omap3-interface-clock|Txgpt5_ickti,omap3-interface-clock|Txgpt4_ickti,omap3-interface-clock|Txgpt3_ickti,omap3-interface-clock|Txgpt2_ickti,omap3-interface-clock|Txmcbsp2_ickti,omap3-interface-clock|Txmcbsp3_ickti,omap3-interface-clock|Txmcbsp4_ickti,omap3-interface-clock|Txmcbsp2_gate_fckti,composite-gate-clock|8xmcbsp3_gate_fckti,composite-gate-clock|8xmcbsp4_gate_fckti,composite-gate-clock|8xemu_src_mux_ck ti,mux-clock|UVWx@XXemu_src_ckti,clkdm-gate-clock|XYYpclk_fckti,divider-clock|Yx@pclkx2_fckti,divider-clock|Yx@atclk_fckti,divider-clock|Yx@traceclk_src_fck ti,mux-clock|UVWx@ZZtraceclk_fckti,divider-clock|Z x@secure_32k_fck fixed-clock[[gpt12_fckfixed-factor-clock|[)4wdt1_fckfixed-factor-clock|[)4ipss_ickti,am35xx-interface-clock|<x iirmii_ck fixed-clockpclk_ck fixed-clockuart4_ick_am35xxti,omap3-interface-clock|=x uart4_fck_am35xxti,wait-gate-clock|9x dpll5_ckti,omap3-dpll-clock|x  $ L 4\\dpll5_m2_ckti,divider-clock|\x Pffsgx_gate_fckti,composite-gate-clock|x ddcore_d3_ckfixed-factor-clock|)4]]core_d4_ckfixed-factor-clock|)4^^core_d6_ckfixed-factor-clock|)4__omap_192m_alwon_fckfixed-factor-clock|)4``core_d2_ckfixed-factor-clock|)4aasgx_mux_fckti,composite-mux-clock |]^_`abcx @eesgx_fckti,composite-clock|desgx_ickti,wait-gate-clock|/x cpefuse_fckti,gate-clock|x ts_fckti,gate-clock|1x usbtll_fckti,wait-gate-clock|fx usbtll_ickti,omap3-interface-clock|=x mmchs3_ickti,omap3-interface-clock|=x mmchs3_fckti,wait-gate-clock|7x dss1_alwon_fck_3430es2ti,dss-gate-clock|gxodss_ick_3430es2ti,omap3-dss-interface-clock|0xusbhost_120m_fckti,gate-clock|fxusbhost_48m_fckti,dss-gate-clock|!xusbhost_ickti,omap3-dss-interface-clock|0xclockdomainscore_l3_clkdmti,clockdomain|hijklmndpll3_clkdmti,clockdomain| dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainh|opqrstuvwxyz{|}~emu_clkdmti,clockdomain|Ydpll4_clkdmti,clockdomain| wkup_clkdmti,clockdomain |dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|dpll5_clkdmti,clockdomain|\sgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |scrm@48002000ti,omap3-scrmxH clocksmcbsp5_mux_fckti,composite-mux-clock|78xmcbsp5_fckti,composite-clock|mcbsp1_mux_fckti,composite-mux-clock|78xtmcbsp1_fckti,composite-clock|mcbsp2_mux_fckti,composite-mux-clock|8xtmcbsp2_fckti,composite-clock|mcbsp3_mux_fckti,composite-mux-clock|8xmcbsp3_fckti,composite-clock|mcbsp4_mux_fckti,composite-mux-clock|8xmcbsp4_fckti,composite-clock|emac_ickti,am35xx-gate-clock|ixjjemac_fckti,gate-clock|x vpfe_ickti,am35xx-gate-clock|ixkkvpfe_fckti,gate-clock|x hsotgusb_ick_am35xxti,am35xx-gate-clock|ixllhsotgusb_fck_am35xxti,gate-clock|xmmhecc_ckti,am35xx-gate-clock|xnnclockdomainscounter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH`  `pinmux@48002030 ti,omap3-padconfpinctrl-singlexH 08pinmux_tps_pins8pinmux@48002a00 ti,omap3-padconfpinctrl-singlexH*\tisyscon@48002270sysconxH"ppbias_regulatorti,pbias-omapxLpbias_mmc_omap2430Spbias_mmc_omap2430bw@z-gpio@48310000ti,omap3-gpioxH1gpio1gpio@49050000ti,omap3-gpioxIgpio2gpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio4gpio@49056000ti,omap3-gpioxI`!gpio5gpio@49058000ti,omap3-gpioxI"gpio6serial@4806a000ti,omap3-uartxH H12txrxuart1lserial@4806c000ti,omap3-uartxHI34txrxuart2lserial@49020000ti,omap3-uartxIJ56txrxuart3li2c@48070000 ti,omap3-i2cxH8txrxi2c1'@tps@2dx- ti,tps65910default& !-9EQregulatorsregulator@0x^vrtcsregulator@1x^viosregulator@2x^vdd1 Svdd_corebOzOsregulator@3x^vdd2Svdd_shvb2Zz2Zsregulator@4x^vdd3regulator@5x^vdig1regulator@6x^vdig2regulator@7x^vpllbw@zw@sregulator@8x^vdacbw@zw@sregulator@9x ^vaux1bw@zw@sregulator@10x ^vaux2bw@zw@sregulator@11x ^vaux33regulator@12x ^vmmcb2Zz2Zsregulator@13x ^vbbi2c@48072000 ti,omap3-i2cxH 9txrxi2c2 disabledi2c@48060000 ti,omap3-i2cxH=txrxi2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxxH @ disableddsp  spi@48098000ti,omap2-mcspixH Amcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH Bmcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0mcspi4FGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1=>txrxmmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuxH mmu_isp disabledmmu@5d000000ti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@-mpu ;< 7commontxrxGmcbsp1 txrx disabledmcbsp@49022000ti,omap3-mcbspxI I -mpusidetone>?7commontxrxsidetoneGmcbsp2mcbsp2_sidetone!"txrx disabledmcbsp@49024000ti,omap3-mcbspxI@I -mpusidetoneYZ7commontxrxsidetoneGmcbsp3mcbsp3_sidetonetxrx disabledmcbsp@49026000ti,omap3-mcbspxI`-mpu 67 7commontxrxGmcbsp4txrx disabledmcbsp@48096000ti,omap3-mcbspxH `-mpu QR 7commontxrxGmcbsp5txrx disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH  disabledtimer@48318000ti,omap3430-timerxH1%timer1Vtimer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5etimer@4903a000ti,omap3430-timerxI*timer6etimer@4903c000ti,omap3430-timerxI+timer7etimer@4903e000ti,omap3430-timerxI,timer8retimer@49040000ti,omap3430-timerxI-timer9rtimer@48086000ti,omap3430-timerxH`.timer10rtimer@48088000ti,omap3430-timerxH/timer11rtimer@48304000ti,omap3430-timerxH0@_timer12Vusbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hsohci@48064400ti,ohci-omap3xHD&Lehci@48064800 ti,ehci-omapxHH&Mgpmc@6e000000ti,omap3430-gpmcgpmcxnusb_otg_hs@480ab000ti,omap3-musbxH \]7mcdma usb_otg_hs dss@48050000 ti,omap3-dssxH disabled dss_core|fckdispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H -protophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  disabled dss_venc|fckssi-controller@48058000 ti,omap3-ssissi disabledxHH-sysgddG7gdd_mpussi-port@4805a000ti,omap3-ssi-portxHH-txrx&CDssi-port@4805b000ti,omap3-ssi-portxHH-txrx&EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hs disabledx\G7mcethernet@0x5c000000ti,am3517-emac davinci_emacokayx\CDEFL 7Jethernet@0x5c030000ti,davinci_mdio davinci_mdiookayx\\B@serial@4809e000ti,omap3-uartuart4 disabledxH T76txrxlfixedregulator@0regulator-fixedSvbatbLK@zLK@ #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusrangesdmasdma-names#clock-cellsclock-frequencylinux,phandleti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockinterrupt-controller#interrupt-cells#dma-cellsdma-channelsdma-requestspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,en-ck32k-xtalvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-boot-on#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freq