x8q(p4isee,am335x-base0033isee,am335x-igep0033ti,am33xx&$7IGEP COM AM335x on AQUILA Expansionchosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000/ocp/can@481d0000/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#/ocp/usb@47400000/usb-phy@47401300#/ocp/usb@47400000/usb-phy@47401b00&/ocp/ethernet@4a100000/slave@4a100200&/ocp/ethernet@4a100000/slave@4a100300memorymemorycpuscpu@0arm,cortex-a8cpu  '( *28*cpupmuarm,cortex-a8-pmusocti,omap-inframpu ti,omap3-mpumpucontrol_module@4a002000sysconD'*-*pinmux@44e10800pinctrl-singleD85 Spinmux_i2c0_pinsp00''-'pinmux_nandflash_pinsxp000 00000p0t7|'4-4pinmux_uart0_pinspp0t'&-&pinmux_leds_pinsp\'6-6pinmux_nxp_hdmi_pinsp '9-9pinmux_nxp_hdmi_off_pinsp ':-:pinmux_leds_base_pinspT';-;ocp simple-busl3_mainprcm@44e00000 ti,am3-prcmD@clocksclk_32768_ck fixed-clock'-clk_rc32k_ck fixed-clock}'-virt_19200000_ck fixed-clock$' - virt_24000000_ck fixed-clockn6'!-!virt_25000000_ck fixed-clock}x@'"-"virt_26000000_ck fixed-clock'#-#tclkin_ck fixed-clock'-dpll_core_ckti,am3-dpll-core-clock \h'-dpll_core_x2_ckti,am3-dpll-x2-clock'-dpll_core_m4_ckti,divider-clock'-dpll_core_m5_ckti,divider-clock'-dpll_core_m6_ckti,divider-clockdpll_mpu_ckti,am3-dpll-clock  ,'-dpll_mpu_m2_ckti,divider-clockdpll_ddr_ckti,am3-dpll-no-gate-clock 4@'-dpll_ddr_m2_ckti,divider-clock'-dpll_ddr_m2_div2_ckfixed-factor-clockdpll_disp_ckti,am3-dpll-no-gate-clock HT' - dpll_disp_m2_ckti,divider-clock '-dpll_per_ck!ti,am3-dpll-no-gate-j-type-clock p' - dpll_per_m2_ckti,divider-clock ' - dpll_per_m2_div4_wkupdm_ckfixed-factor-clock dpll_per_m2_div4_ckfixed-factor-clock cefuse_fckti,gate-clock clk_24mhzfixed-factor-clock ' - clkdiv32k_ckfixed-factor-clock ' - clkdiv32k_ickti,gate-clock L'-l3_gclkfixed-factor-clock'-pruss_ocp_gclk ti,mux-clock0mmu_fckti,gate-clock timer1_fck ti,mux-clock(timer2_fck ti,mux-clock timer3_fck ti,mux-clock  timer4_fck ti,mux-clock timer5_fck ti,mux-clock timer6_fck ti,mux-clock timer7_fck ti,mux-clock usbotg_fckti,gate-clock |dpll_core_m4_div2_ckfixed-factor-clock'-ieee5000_fckti,gate-clockwdt1_fck ti,mux-clock8l4_rtc_gclkfixed-factor-clockl4hs_gclkfixed-factor-clockl3s_gclkfixed-factor-clockl4fw_gclkfixed-factor-clockl4ls_gclkfixed-factor-clock'$-$sysclk_div_ckfixed-factor-clockcpsw_125mhz_gclkfixed-factor-clock'0-0cpsw_cpts_rft_clk ti,mux-clock '1-1gpio0_dbclk_mux_ck ti,mux-clock <'-gpio0_dbclkti,gate-clockgpio1_dbclkti,gate-clockgpio2_dbclkti,gate-clockgpio3_dbclkti,gate-clocklcd_gclk ti,mux-clock  4'-mmc_clkfixed-factor-clock gfx_fclk_clksel_ck ti,mux-clock ,'-gfx_fck_div_ckti,divider-clock,sysclkout_pre_ck ti,mux-clock '-clkout2_div_ckti,divider-clock'-dbg_sysclk_ckti,gate-clock'-dbg_clka_ckti,gate-clock'-stm_pmd_clock_mux_ck ti,mux-clock'-trace_pmd_clk_mux_ck ti,mux-clock'-stm_clk_div_ckti,divider-clock@trace_clk_div_ckti,divider-clock@clkout2_ckti,gate-clockclockdomainsclk_24mhz_clkdmti,clockdomainscrm@44e10000 ti,am3-scrmD clockssys_clkin_ck ti,mux-clock !"#@'-adc_tsc_fckfixed-factor-clockdcan0_fckfixed-factor-clock')-)dcan1_fckfixed-factor-clock'+-+mcasp0_fckfixed-factor-clockmcasp1_fckfixed-factor-clocksmartreflex0_fckfixed-factor-clocksmartreflex1_fckfixed-factor-clocksha0_fckfixed-factor-clockaes0_fckfixed-factor-clockrng_fckfixed-factor-clockehrpwm0_tbclk@44e10664ti,gate-clock$dehrpwm1_tbclk@44e10664ti,gate-clock$dehrpwm2_tbclk@44e10664ti,gate-clock$dclockdomainssyscon@44e10000ti,am33xx-controlmodulesysconD'2-2interrupt-controller@48200000ti,am33xx-intc*H '-edma@49000000 ti,edma3tpcctptc0tptc1tptc2ID@  ;'%-%gpio@44e07000ti,omap4-gpiogpio1FV*Dp`gpio@4804c000ti,omap4-gpiogpio2FV*Hb'7-7gpio@481ac000ti,omap4-gpiogpio3FV*H '<-<gpio@481ae000ti,omap4-gpiogpio4FV*H>serial@44e09000ti,omap3-uartuart1lD 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.nrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15usb-phy@47401b00ti,am335x-usb-phyG@OphybokayY,'/-/usb@47401800ti,musb-am33xxbokayG@G@ Omccontrolemcuhost} /hi..............................nrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 G@G@ G@0G@@@#Ogluecontrollerschedulerqueuemgreglue;bokay'.-.epwmss@48300000ti,am33xx-pwmssH0epwmss0 bdisabled$H0H0H0H0H0H0ecap@48300100ti,am33xx-ecapH0eecap0ecap0 bdisabledehrpwm@48300200ti,am33xx-ehrpwmH0ehrpwm0 bdisabledepwmss@48302000ti,am33xx-pwmssH0 epwmss1 bdisabled$H0!H0!H0!H0!H0"H0"ecap@48302100ti,am33xx-ecapH0!/eecap1ecap1 bdisabledehrpwm@48302200ti,am33xx-ehrpwmH0"ehrpwm1 bdisabledepwmss@48304000ti,am33xx-pwmssH0@epwmss2 bdisabled$H0AH0AH0AH0AH0BH0Becap@48304100ti,am33xx-ecapH0A=eecap2ecap2 bdisabledehrpwm@48304200ti,am33xx-ehrpwmH0Behrpwm2 bdisabledethernet@4a100000ti,cpswcpgmac001 fckcpts @! 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#address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1device_typeregoperating-pointsvoltage-toleranceclocksclock-namesclock-latencycpu0-supplyinterruptsti,hwmodslinux,phandlepinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsranges#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shiftti,index-power-of-twointerrupt-controller#interrupt-cells#dma-cellsgpio-controller#gpio-cellsstatusdmasdma-namespinctrl-namespinctrl-0vcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplybus-width#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csreg-namesti,ctrl_modinterrupt-namesdr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftsysconbus_freqmac-addressphy_idphy-modermii-clock-extti,no-reset-on-init#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wait-on-readgpmc,wait-on-writegpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wait-monitoring-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nselm_idlabelgpiosdefault-statei2cpinctrl-1