&8( hgoogle,veyron-jerry-rev7google,veyron-jerry-rev6google,veyron-jerry-rev5google,veyron-jerry-rev4google,veyron-jerry-rev3google,veyron-jerrygoogle,veyronrockchip,rk3288& 7Google Jerryaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12h w@\@p@ @@OOa sB@ ~ ' 9 K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba simple-busYdma-controller@ff250000arm,pl330arm,primecell%@`k8 apb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`k8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@`k8 apb_pclkK_Q_reserved-memoryYdma-unusable@fe000000oscillator fixed-clockn6xin24mK Q timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvbiuciuciu-driveciu-sample  @ resetokay"4E W `Z~ defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswbiuciuciu-driveciu-sample ! @ resetokay4'~default dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxbiuciuciu-driveciu-sample "@ reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guybiuciuciu-driveciu-sample #@ resetokay"`5'~default saradc@ff100000rockchip,saradc $D8I[saradcapb_pclkW  saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclkV  [txrx ,default !"okayec@0google,cros-ec-spie& default#-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @ };0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclkV [txrx -default$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclkV[txrx .default()*+okay flash@0jedec,spi-nori2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault,okay,2Ddtpm@20infineon,slb9645tt [i2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault- disabledi2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault./okay,2D,ts3a227e@3b ti,ts3a227e;&0default1sKQtrackpad@15elan,ekth3000& ~2trackpad@2c hid-over-i2c& , ~2i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault3okay,,DKrQrserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 456okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault7okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault8okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault9 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault: disabledthermal-zonesreserve_thermal;cpu_thermald;tripscpu_alert0p"passiveK<Q<cpu_alert1$"passiveK=Q=cpu_crit_" criticalcooling-mapsmap0-< 2map1-= 2gpu_thermald;tripsgpu_alert0p"passiveK>Q>gpu_crit_" criticalcooling-mapsmap0-> 2tsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk  tsadc-apbinitdefaultsleep?A@K?UksokayK;Q;ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqA88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB  stmmaceth disabledusb@ff500000 generic-ehciP 8usbhostBusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otghostC usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otghost@@ D usb2-phyokayz.Dusb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultEokay,2Ddpmic@1brockchip,rk808xin32kwifibt_32kin&0defaultFEfr~G2GGKQregulatorsDCDC_REG1vdd_arm / qG _qKQregulator-state-memtDCDC_REG2vdd_gpu / 5G_qKvQvregulator-state-memB@DCDC_REG3 vcc135_ddr regulator-state-memDCDC_REG4vcc_18 /w@Gw@KQregulator-state-memw@LDO_REG1 vcc33_io /2ZG2ZK2Q2regulator-state-mem2ZLDO_REG3vdd_10 /B@GB@regulator-state-memB@LDO_REG7vdd10_lcd_pwren_h /&%G&%regulator-state-memtSWITCH_REG1 vcc33_lcd K]Q]regulator-state-memtLDO_REG6 vcc18_codec /w@Gw@K^Q^regulator-state-memtLDO_REG4 vccio_sd/w@G2ZKQregulator-state-memtLDO_REG5 vcc33_sd/2ZG2ZK Q regulator-state-memtLDO_REG8 vcc33_ccd /2ZG2Zregulator-state-mem2ZLDO_REG2mic_vcc /w@Gw@regulator-state-memti2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultHokay,2D max98090@10maxim,max98090&Imclk8qdefaultJKQpwm@ff680000rockchip,rk3288-pwmhdefaultK8^pwmokayKQpwm@ff680010rockchip,rk3288-pwmhdefaultL8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultM8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultN8^pwm disabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerh. KbQbpd_vio@9 8chgfdehilkj$OPQRSTUVWpd_hevc@11 8opXYpd_video@12 8Zpd_gpu@13 8[\reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvA$Hjk$#gׄeрxhрxhKQsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwKAQAedp-phyrockchip,rk3288-dp-phy8h24m1okayKmQmio-domains"rockchip,rk3288-io-voltage-domainokay<2FQ_2o2}]^usbphyrockchip,rk3288-usb-phyokayusb-phy@3201 8]phyclkKDQDusb-phy@334148^phyclkKBQBusb-phy@3481H8_phyclkKCQCwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk8TV_[tx 6default`A disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5V__[txrxi2s_hclki2s_clk8RdefaultaokayKQcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk  crypto-rstokayvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopb def  axiahbdclk cokayportK Q endpoint@0 dKsQsendpoint@1 eKoQoendpoint@2 fKkQkiommu@ff930300rockchip,iommu  vopb_mmub  okayKcQcvop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopb   axiahbdclk gokayportK Q endpoint@0 hKtQtendpoint@1 iKpQpendpoint@2 jKlQliommu@ff940300rockchip,iommu  vopl_mmub  okayKgQgmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 8~d refpclkb A disabledportsportendpoint@0 kKfQfendpoint@1 lKjQjdp@ff970000rockchip,rk3288-dp@ b8icdppclkmdpo dpAokaydefaultnportsport@0endpoint@0 oKeQeendpoint@1 pKiQiport@1endpoint qKQhdmi@ff980000rockchip,rk3288-dw-hdmiA g8hm iahbisfrb okay (rportsportendpoint@0 sKdQdendpoint@1 tKhQhgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu8 4ub okay Hvgpu-opp-tableoperating-points-v2KuQuopp@100000000 T [~opp@200000000 T  [~opp@300000000 T [B@opp@400000000 Tׄ [opp@500000000 Te [Oopp@600000000 T#F [qos@ffaa0000syscon K[Q[qos@ffaa0080syscon K\Q\qos@ffad0000syscon KPQPqos@ffad0100syscon KQQQqos@ffad0180syscon KRQRqos@ffad0400syscon KSQSqos@ffad0480syscon KTQTqos@ffad0500syscon KOQOqos@ffad0800syscon KUQUqos@ffad0880syscon KVQVqos@ffad0900syscon KWQWqos@ffae0000syscon KZQZqos@ffaf0000syscon KXQXqos@ffaf0080syscon KYQYinterrupt-controller@ffc01000 arm,gic-400 i ~  @ `   KQefuse@ffb40000rockchip,rk3288-efuse 8q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlAYdefaultsleepwxAwygpio0@ff750000rockchip,gpio-banku Q8@   i ~K0Q0gpio1@ff780000rockchip,gpio-bankx R8A   i ~gpio2@ff790000rockchip,gpio-banky S8B   i ~KQgpio3@ff7a0000rockchip,gpio-bankz T8C   i ~gpio4@ff7b0000rockchip,gpio-bank{ U8D   i ~KQgpio5@ff7c0000rockchip,gpio-bank| V8E   i ~KQgpio6@ff7d0000rockchip,gpio-bank} W8F   i ~KIQIgpio7@ff7e0000rockchip,gpio-bank~ X8G   i ~K Q gpio8@ff7f0000rockchip,gpio-bank Y8H   i ~hdmihdmi-ddc zzvcc50-hdmi-en zKQpcfg-pull-up K{Q{pcfg-pull-down K|Q|pcfg-pull-none KzQzpcfg-pull-none-12ma  K~Q~sleepglobal-pwroff zKwQwddrio-pwroff zddr0-retention {ddr1-retention {edpedp-hpd  |KnQni2c0i2c0-xfer zzKEQEi2c1i2c1-xfer zzK,Q,i2c2i2c2-xfer  z zKHQHi2c3i2c3-xfer zzK-Q-i2c4i2c4-xfer zzK.Q.i2c5i2c5-xfer zzK3Q3i2s0i2s0-bus` zzzzzzKaQasdmmcsdmmc-clk }KQsdmmc-cmd }KQsdmmc-cd {sdmmc-bus1 {sdmmc-bus4@ }}}}KQsdmmc-cd-disabled zKQsdmmc-cd-gpio zKQsdio0sdio0-bus1 {sdio0-bus4@ }}}}KQsdio0-cmd }KQsdio0-clk }KQsdio0-cd {sdio0-wp {sdio0-pwr {sdio0-bkpwr {sdio0-int {wifienable-h zKQbt-enable-l zKQsdio1sdio1-bus1 {sdio1-bus4@ {{{{sdio1-cd {sdio1-wp {sdio1-bkpwr {sdio1-int {sdio1-cmd {sdio1-clk zsdio1-pwr  {emmcemmc-clk }KQemmc-cmd }KQemmc-pwr  {emmc-bus1 {emmc-bus4@ {{{{emmc-bus8 }}}}}}}}KQemmc-reset  zKQspi0spi0-clk  {KQspi0-cs0  {K"Q"spi0-tx {K Q spi0-rx {K!Q!spi0-cs1 {spi1spi1-clk  {K$Q$spi1-cs0  {K'Q'spi1-rx {K&Q&spi1-tx {K%Q%spi2spi2-cs1 {spi2-clk {K(Q(spi2-cs0 {K+Q+spi2-rx {K*Q*spi2-tx  {K)Q)uart0uart0-xfer {zK4Q4uart0-cts {K5Q5uart0-rts zK6Q6uart1uart1-xfer { zK7Q7uart1-cts  {uart1-rts  zuart2uart2-xfer {zK8Q8uart3uart3-xfer {zK9Q9uart3-cts  {uart3-rts  zuart4uart4-xfer  { zK:Q:uart4-cts {uart4-rts ztsadcotp-gpio zK?Q?otp-out zK@Q@pwm0pwm0-pin zKKQKpwm1pwm1-pin zKLQLpwm2pwm2-pin zKMQMpwm3pwm3-pin zKNQNgmacrgmii-pins zzzz~~~~zzz ~~zzrmii-pins zzzzzzzzzzspdifspdif-tx  zK`Q`pcfg-pull-none-drv-8ma  K}Q}pcfg-pull-up-drv-8ma  pcfg-output-high KQpcfg-output-low KQbuttonspwr-key-l {KQap-lid-int-l {KQpmicpmic-int-l {KFQFdvs-1  |dvs-2 |rebootap-warm-reset-h zKQrecovery-switchrec-mode-l {tpmtpm-int-h zwrite-protectfw-wp-ap zcodechp-det {KQint-codec |KJQJmic-det  {KQheadsetts3a227e-int-l {K1Q1backlightbl-en zKQbl_pwr_en  zKQchargerac-present-ap {KQcros-ecec-int zK#Q#suspendsuspend-l-wake KxQxsuspend-l-sleep KyQytrackpadtrackpad-int {K/Q/usb-hosthost1-pwr-en zKQusbotg-pwren-h zKQbuck-5vdrv-5v zKQlcdlcd-en zKQavdd-1v8-disp-en  zKQmemory@0memorygpio-keys gpio-keysdefaultpower Power Z0 t dlid Lid Z0  + gpio-restart gpio-restart Z0 default <emmc-pwrseqmmc-pwrseq-emmcdefault E KQsdio-pwrseqmmc-pwrseq-simple8 ext_clockdefault EKQvcc-5vregulator-fixedvcc_5v /LK@GLK@ Q \ o defaultKGQGvcc33-sysregulator-fixed vcc33_sys /2ZG2Z QKQvcc50-hdmiregulator-fixed vcc50_hdmi  QG \ odefaultsound!rockchip,rockchip-audio-max98090default tVEYRON-I2S   I I  backlightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~    ,default ?B@ D' QKQgpio-charger gpio-charger ^mains Z0defaultpanelinnolux,n116bgesimple-panelokay Q kportsportendpoint KqQqvccsysregulator-fixedvccsys KQvcc5-host1-regulatorregulator-fixed \ o0 default vcc5_host1 vcc5v-otg-regulatorregulator-fixed \ o0 default vcc5_host2 panel-regulatorregulator-fixed \ o defaultpanel_regulator u QKQvcc18-lcdregulator-fixed \ o default vcc18_lcd  Qbacklight-regulatorregulator-fixed \ o defaultbacklight_regulator Q u:KQ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcehid-descr-addrreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosvin-supplyenable-active-highgpiorockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiosbacklight-boot-offpwmspwm-delay-uspower-supplycharger-typebacklightstartup-delay-us